Core: Handle unaligned CX86RecompilerOps::CompileLoadMemoryValue for 64bit ops
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@ -9942,6 +9942,14 @@ void CX86RecompilerOps::CompileLoadMemoryValue(asmjit::x86::Gp & AddressReg, asm
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CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_AddressErrorExceptionRead32, false, &CX86Ops::JneLabel);
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CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_AddressErrorExceptionRead32, false, &CX86Ops::JneLabel);
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m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp());
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m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp());
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}
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}
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else if (ValueSize == 64)
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{
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m_Assembler.MoveX86regToVariable(&m_TempValue32, "TempValue32", AddressReg);
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m_Assembler.test(AddressReg, 7);
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m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() + g_System->CountPerOp());
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CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_AddressErrorExceptionRead32, false, &CX86Ops::JneLabel);
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m_RegWorkingSet.SetBlockCycleCount(m_RegWorkingSet.GetBlockCycleCount() - g_System->CountPerOp());
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}
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m_Assembler.mov(TempReg, AddressReg);
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m_Assembler.mov(TempReg, AddressReg);
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m_Assembler.shr(TempReg, 12);
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m_Assembler.shr(TempReg, 12);
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