[Android] Add Arm32Opcode handling for AndArmRegToArmReg
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@ -131,15 +131,35 @@ void CArmOps::AddConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t Const)
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}
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}
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void CArmOps::AndArmRegToArmReg(ArmReg SourceReg, ArmReg DestReg)
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void CArmOps::AndArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg)
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{
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CPU_Message(" and\t%s, %s", ArmRegName(DestReg), ArmRegName(SourceReg));
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if (DestReg <= 0x7 && SourceReg <= 0x7 )
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{
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CPU_Message(" ands\t%s, %s", ArmRegName(DestReg), ArmRegName(SourceReg));
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ArmThumbOpcode op = {0};
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op.Reg2.rn = DestReg;
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op.Reg2.rm = SourceReg;
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op.Reg2.opcode = 0x100;
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AddCode16(op.Hex);
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}
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else
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{
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CPU_Message(" and.w\t%s, %s, %s", ArmRegName(DestReg), ArmRegName(DestReg), ArmRegName(SourceReg));
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Arm32Opcode op = {0};
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op.imm5.rn = DestReg;
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op.imm5.s = 0;
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op.imm5.opcode = 0x750;
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op.imm5.rm = SourceReg;
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op.imm5.type = 0;
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op.imm5.imm2 = 0;
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op.imm5.rd = DestReg;
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op.imm5.imm3 = 0;
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op.imm5.opcode2 = 0;
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AddCode32(op.Hex);
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}
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}
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void CArmOps::BranchLabel8(ArmBranchCompare CompareType, const char * Label)
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{
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@ -135,7 +135,7 @@ protected:
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static void AddArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg1, ArmReg SourceReg2);
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static void AddConstToArmReg(ArmReg DestReg, uint32_t Const);
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static void AddConstToArmReg(ArmReg DestReg, ArmReg SourceReg, uint32_t Const);
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static void AndArmRegToArmReg(ArmReg SourceReg, ArmReg DestReg);
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static void AndArmRegToArmReg(ArmReg DestReg, ArmReg SourceReg);
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static void BranchLabel8(ArmBranchCompare CompareType, const char * Label);
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static void BranchLabel20(ArmBranchCompare CompareType, const char * Label);
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static void CallFunction(void * Function, const char * FunctionName);
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