Core: convert DoTrapException to TriggerException

This commit is contained in:
zilmar 2023-05-18 10:49:58 +09:30
parent 74912ca8c2
commit 17df17805d
3 changed files with 37 additions and 29 deletions

View File

@ -1602,7 +1602,7 @@ void R4300iOp::SPECIAL_TEQ()
{ {
if (_GPR[m_Opcode.rs].DW == _GPR[m_Opcode.rt].DW) if (_GPR[m_Opcode.rs].DW == _GPR[m_Opcode.rt].DW)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1610,7 +1610,7 @@ void R4300iOp::SPECIAL_TGE()
{ {
if (_GPR[m_Opcode.rs].DW >= _GPR[m_Opcode.rt].DW) if (_GPR[m_Opcode.rs].DW >= _GPR[m_Opcode.rt].DW)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1618,7 +1618,7 @@ void R4300iOp::SPECIAL_TGEU()
{ {
if (_GPR[m_Opcode.rs].UDW >= _GPR[m_Opcode.rt].UDW) if (_GPR[m_Opcode.rs].UDW >= _GPR[m_Opcode.rt].UDW)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1626,7 +1626,7 @@ void R4300iOp::SPECIAL_TLT()
{ {
if (_GPR[m_Opcode.rs].DW < _GPR[m_Opcode.rt].DW) if (_GPR[m_Opcode.rs].DW < _GPR[m_Opcode.rt].DW)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1634,7 +1634,7 @@ void R4300iOp::SPECIAL_TLTU()
{ {
if (_GPR[m_Opcode.rs].UDW < _GPR[m_Opcode.rt].UDW) if (_GPR[m_Opcode.rs].UDW < _GPR[m_Opcode.rt].UDW)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1642,7 +1642,7 @@ void R4300iOp::SPECIAL_TNE()
{ {
if (_GPR[m_Opcode.rs].DW != _GPR[m_Opcode.rt].DW) if (_GPR[m_Opcode.rs].DW != _GPR[m_Opcode.rt].DW)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1772,7 +1772,7 @@ void R4300iOp::REGIMM_TEQI()
{ {
if (_GPR[m_Opcode.rs].DW == (int64_t)((int16_t)m_Opcode.immediate)) if (_GPR[m_Opcode.rs].DW == (int64_t)((int16_t)m_Opcode.immediate))
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1780,7 +1780,7 @@ void R4300iOp::REGIMM_TGEI()
{ {
if (_GPR[m_Opcode.rs].DW >= (int64_t)((int16_t)m_Opcode.immediate)) if (_GPR[m_Opcode.rs].DW >= (int64_t)((int16_t)m_Opcode.immediate))
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1792,7 +1792,7 @@ void R4300iOp::REGIMM_TGEIU()
imm64 = imm32; imm64 = imm32;
if (_GPR[m_Opcode.rs].UDW >= (uint64_t)imm64) if (_GPR[m_Opcode.rs].UDW >= (uint64_t)imm64)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1800,7 +1800,7 @@ void R4300iOp::REGIMM_TLTI()
{ {
if (_GPR[m_Opcode.rs].DW < (int64_t)((int16_t)m_Opcode.immediate)) if (_GPR[m_Opcode.rs].DW < (int64_t)((int16_t)m_Opcode.immediate))
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1812,7 +1812,7 @@ void R4300iOp::REGIMM_TLTIU()
imm64 = imm32; imm64 = imm32;
if (_GPR[m_Opcode.rs].UDW < (uint64_t)imm64) if (_GPR[m_Opcode.rs].UDW < (uint64_t)imm64)
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }
@ -1820,7 +1820,7 @@ void R4300iOp::REGIMM_TNEI()
{ {
if (_GPR[m_Opcode.rs].DW != (int64_t)((int16_t)m_Opcode.immediate)) if (_GPR[m_Opcode.rs].DW != (int64_t)((int16_t)m_Opcode.immediate))
{ {
g_Reg->DoTrapException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP); g_Reg->TriggerException(EXC_TRAP);
} }
} }

View File

@ -641,23 +641,6 @@ void CRegisters::DoFloatingPointException(bool DelaySlot)
m_PROGRAM_COUNTER = 0x80000180; m_PROGRAM_COUNTER = 0x80000180;
} }
void CRegisters::DoTrapException(bool DelaySlot)
{
CAUSE_REGISTER.ExceptionCode = EXC_TRAP;
CAUSE_REGISTER.CoprocessorUnitNumber = 0;
if (DelaySlot)
{
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
CAUSE_REGISTER.BranchDelay = 1;
}
else
{
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
CAUSE_REGISTER.BranchDelay = 0;
}
m_PROGRAM_COUNTER = 0x80000180;
}
void CRegisters::DoCopUnusableException(bool DelaySlot, int32_t Coprocessor) void CRegisters::DoCopUnusableException(bool DelaySlot, int32_t Coprocessor)
{ {
if (HaveDebugger()) if (HaveDebugger())
@ -872,3 +855,27 @@ void CRegisters::DoSysCallException(bool DelaySlot)
STATUS_REGISTER |= STATUS_EXL; STATUS_REGISTER |= STATUS_EXL;
m_PROGRAM_COUNTER = 0x80000180; m_PROGRAM_COUNTER = 0x80000180;
} }
void CRegisters::TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor)
{
if (GenerateLog() && LogExceptions())
{
if (ExceptionCode != EXC_INT)
{
LogMessage("%08X: Exception %d", m_PROGRAM_COUNTER, ExceptionCode);
}
else if (!LogNoInterrupts())
{
LogMessage("%08X: Interrupt generated", m_PROGRAM_COUNTER);
}
}
CAUSE_REGISTER.ExceptionCode = ExceptionCode;
CAUSE_REGISTER.CoprocessorUnitNumber = Coprocessor;
CAUSE_REGISTER.BranchDelay = m_System->m_PipelineStage == PIPELINE_STAGE_JUMP;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - (CAUSE_REGISTER.BranchDelay ? 4 : 0));
STATUS_REGISTER |= STATUS_EXL;
m_PROGRAM_COUNTER = 0x80000180;
m_System->m_PipelineStage = PIPELINE_STAGE_JUMP;
m_System->m_JumpToLocation = (*_PROGRAM_COUNTER);
}

View File

@ -417,6 +417,7 @@ public:
void FixFpuLocations(); void FixFpuLocations();
void Reset(); void Reset();
void SetAsCurrentSystem(); void SetAsCurrentSystem();
void TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor = 0);
uint64_t Cop0_MF(COP0Reg Reg); uint64_t Cop0_MF(COP0Reg Reg);
void Cop0_MT(COP0Reg Reg, uint64_t Value); void Cop0_MT(COP0Reg Reg, uint64_t Value);