Core: Improve R4300iOp::COP1_S_CMP
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@ -2396,6 +2396,7 @@ void R4300iOp::COP1_S_CMP()
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return;
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}
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_FPCR[31] &= ~0x0003F000;
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float Temp0 = *(float *)_FPR_S[m_Opcode.fs];
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float Temp1 = *(float *)_FPR_S[m_Opcode.ft];
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@ -2405,7 +2406,19 @@ void R4300iOp::COP1_S_CMP()
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less = false;
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equal = false;
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unorded = true;
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if ((m_Opcode.funct & 8) != 0)
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bool QuietNan = false;
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if ((*(uint32_t *)_FPR_S[m_Opcode.fs] >= 0x7FC00000 && *(uint32_t *)_FPR_S[m_Opcode.fs] <= 0x7FFFFFFF) ||
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(*(uint32_t *)_FPR_S[m_Opcode.fs] >= 0xFFC00000 && *(uint32_t *)_FPR_S[m_Opcode.fs] <= 0xFFFFFFFF))
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{
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QuietNan = true;
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}
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else if ((*(uint32_t *)_FPR_S[m_Opcode.ft] >= 0x7FC00000 && *(uint32_t *)_FPR_S[m_Opcode.ft] <= 0x7FFFFFFF) ||
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(*(uint32_t *)_FPR_S[m_Opcode.ft] >= 0xFFC00000 && *(uint32_t *)_FPR_S[m_Opcode.ft] <= 0xFFFFFFFF))
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{
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QuietNan = true;
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}
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if ((m_Opcode.funct & 8) != 0 || QuietNan)
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{
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FPStatusReg & StatusReg = (FPStatusReg &)_FPCR[31];
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StatusReg.Cause.InvalidOperation = 1;
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