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[Project64] Change Loop Analysis.cpp to use standard types

This commit is contained in:
zilmar 2015-11-10 07:10:34 +11:00
parent 8f694e157f
commit 0c00b90334
2 changed files with 1129 additions and 1037 deletions
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346
Source/Project64/N64 System/Recompiler/Loop Analysis.cpp
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@ -19,7 +19,7 @@ bool DelaySlotEffectsCompare(uint32_t PC, uint32_t Reg1, uint32_t Reg2);
LoopAnalysis::LoopAnalysis(CCodeBlock * CodeBlock, CCodeSection * Section) : LoopAnalysis::LoopAnalysis(CCodeBlock * CodeBlock, CCodeSection * Section) :
m_EnterSection(Section), m_EnterSection(Section),
m_BlockInfo(CodeBlock), m_BlockInfo(CodeBlock),
m_PC((DWORD)-1), m_PC((uint32_t)-1),
m_NextInstruction(NORMAL), m_NextInstruction(NORMAL),
m_Test(m_BlockInfo->NextTest()) m_Test(m_BlockInfo->NextTest())
{ {
@ -93,7 +93,8 @@ bool LoopAnalysis::SetupEnterSection ( CCodeSection * Section, bool & bChanged,
RegisterMap::iterator Jump_itr = m_JumpRegisters.find(Parent->m_SectionID); RegisterMap::iterator Jump_itr = m_JumpRegisters.find(Parent->m_SectionID);
CCodeSection * TargetSection[] = { Parent->m_ContinueSection, Parent->m_JumpSection }; CCodeSection * TargetSection[] = { Parent->m_ContinueSection, Parent->m_JumpSection };
CRegInfo * JumpRegInfo[] = { CRegInfo * JumpRegInfo[] =
{
Continue_itr == m_ContinueRegisters.end() ? &Parent->m_Cont.RegSet : Continue_itr->second, Continue_itr == m_ContinueRegisters.end() ? &Parent->m_Cont.RegSet : Continue_itr->second,
Jump_itr == m_JumpRegisters.end() ? &Parent->m_Jump.RegSet : Jump_itr->second Jump_itr == m_JumpRegisters.end() ? &Parent->m_Jump.RegSet : Jump_itr->second
}; };
@ -105,7 +106,9 @@ bool LoopAnalysis::SetupEnterSection ( CCodeSection * Section, bool & bChanged,
{ {
bFirstParent = false; bFirstParent = false;
RegEnter = *JumpRegInfo[i]; RegEnter = *JumpRegInfo[i];
} else { }
else
{
if (*JumpRegInfo[i] == RegEnter) if (*JumpRegInfo[i] == RegEnter)
{ {
continue; continue;
@ -128,7 +131,9 @@ bool LoopAnalysis::SetupEnterSection ( CCodeSection * Section, bool & bChanged,
{ {
bChanged = true; bChanged = true;
} }
} else { }
else
{
m_EnterRegisters.insert(RegisterMap::value_type(Section->m_SectionID, new CRegInfo(RegEnter))); m_EnterRegisters.insert(RegisterMap::value_type(Section->m_SectionID, new CRegInfo(RegEnter)));
} }
return true; return true;
@ -163,10 +168,11 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg = itr != m_EnterRegisters.end() ? *(itr->second) : Section->m_RegEnter; m_Reg = itr != m_EnterRegisters.end() ? *(itr->second) : Section->m_RegEnter;
m_NextInstruction = NORMAL; m_NextInstruction = NORMAL;
DWORD ContinueSectionPC = Section->m_ContinueSection ? Section->m_ContinueSection->m_EnterPC : (DWORD)-1; uint32_t ContinueSectionPC = Section->m_ContinueSection ? Section->m_ContinueSection->m_EnterPC : (uint32_t)-1;
CPU_Message("ContinueSectionPC = %08X", ContinueSectionPC); CPU_Message("ContinueSectionPC = %08X", ContinueSectionPC);
do { do
{
if (!g_MMU->LW_VAddr(m_PC, m_Command.Hex)) if (!g_MMU->LW_VAddr(m_PC, m_Command.Hex))
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
@ -174,9 +180,11 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
} }
CPU_Message(" %08X: %s", m_PC, R4300iOpcodeName(m_Command.Hex, m_PC)); CPU_Message(" %08X: %s", m_PC, R4300iOpcodeName(m_Command.Hex, m_PC));
CPU_Message(" %s state: %X value: %X", CRegName::GPR[3], m_Reg.GetMipsRegState(3), m_Reg.GetMipsRegLo(3)); CPU_Message(" %s state: %X value: %X", CRegName::GPR[3], m_Reg.GetMipsRegState(3), m_Reg.GetMipsRegLo(3));
switch (m_Command.op) { switch (m_Command.op)
{
case R4300i_SPECIAL: case R4300i_SPECIAL:
switch (m_Command.funct) { switch (m_Command.funct)
{
case R4300i_SPECIAL_SLL: SPECIAL_SLL(); break; case R4300i_SPECIAL_SLL: SPECIAL_SLL(); break;
case R4300i_SPECIAL_SRL: SPECIAL_SRL(); break; case R4300i_SPECIAL_SRL: SPECIAL_SRL(); break;
case R4300i_SPECIAL_SRA: SPECIAL_SRA(); break; case R4300i_SPECIAL_SRA: SPECIAL_SRA(); break;
@ -234,20 +242,21 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
} }
break; break;
case R4300i_REGIMM: case R4300i_REGIMM:
switch (m_Command.rt) { switch (m_Command.rt)
{
case R4300i_REGIMM_BLTZ: case R4300i_REGIMM_BLTZ:
case R4300i_REGIMM_BGEZ: case R4300i_REGIMM_BGEZ:
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8 && if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL && Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4 && if (Section->m_Jump.TargetPC != m_PC + ((int16_t)m_Command.offset << 2) + 4 &&
Section->m_JumpSection != NULL && Section->m_JumpSection != NULL &&
Section->m_Jump.TargetPC != (DWORD)-1) Section->m_Jump.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
@ -266,22 +275,22 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8 && if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL && Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
if (Section->m_Jump.TargetPC != m_PC + 4 && if (Section->m_Jump.TargetPC != m_PC + 4 &&
Section->m_JumpSection != NULL && Section->m_JumpSection != NULL &&
Section->m_Jump.TargetPC != (DWORD)-1) Section->m_Jump.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
/*if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4) /*if (Section->m_Jump.TargetPC != m_PC + ((int16_t)m_Command.offset << 2) + 4)
{ {
g_Notify->BreakPoint(__FILEW__,__LINE__); g_Notify->BreakPoint(__FILEW__,__LINE__);
}*/ }*/
if (m_PC == m_PC + ((short)m_Command.offset << 2) + 4) if (m_PC == m_PC + ((int16_t)m_Command.offset << 2) + 4)
{ {
if (!DelaySlotEffectsCompare(m_PC, m_Command.rs, 0) && !Section->m_Jump.PermLoop) if (!DelaySlotEffectsCompare(m_PC, m_Command.rs, 0) && !Section->m_Jump.PermLoop)
{ {
@ -296,9 +305,11 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Cont.TargetPC = m_PC + 8; Section->m_Cont.TargetPC = m_PC + 8;
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4; Section->m_Jump.TargetPC = m_PC + ((int16_t)m_Command.offset << 2) + 4;
if (m_PC == Section->m_Jump.TargetPC) { if (m_PC == Section->m_Jump.TargetPC)
if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,0)) { {
if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,0))
{
Section->m_Jump.PermLoop = true; Section->m_Jump.PermLoop = true;
} }
} }
@ -310,19 +321,22 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
if (m_Reg.IsConst(m_Command.rs)) if (m_Reg.IsConst(m_Command.rs))
{ {
__int64 Value; int64_t Value;
if (m_Reg.Is32Bit(m_Command.rs)) if (m_Reg.Is32Bit(m_Command.rs))
{ {
Value = m_Reg.GetMipsRegLo_S(m_Command.rs); Value = m_Reg.GetMipsRegLo_S(m_Command.rs);
} else { } else {
Value = m_Reg.GetMipsReg_S(m_Command.rs); Value = m_Reg.GetMipsReg_S(m_Command.rs);
} }
if (Value >= 0) { if (Value >= 0)
{
m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4; Section->m_Jump.TargetPC = m_PC + ((int16_t)m_Command.offset << 2) + 4;
if (m_PC == Section->m_Jump.TargetPC) { if (m_PC == Section->m_Jump.TargetPC)
if (!DelaySlotEffectsCompare(m_PC,31,0)) { {
if (!DelaySlotEffectsCompare(m_PC,31,0))
{
Section->m_Jump.PermLoop = true; Section->m_Jump.PermLoop = true;
} }
} }
@ -330,13 +344,14 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
} }
} }
m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Cont.TargetPC = m_PC + 8; Section->m_Cont.TargetPC = m_PC + 8;
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4; Section->m_Jump.TargetPC = m_PC + ((int16_t)m_Command.offset << 2) + 4;
if (m_PC == Section->m_Jump.TargetPC) { if (m_PC == Section->m_Jump.TargetPC)
if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,0)) { {
if (!DelaySlotEffectsCompare(m_PC,m_Command.rs,0))
{
Section->m_Jump.PermLoop = true; Section->m_Jump.PermLoop = true;
} }
} }
@ -360,8 +375,10 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg.GetMipsRegLo(31) = m_PC + 8; m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Jump.TargetPC = (m_PC & 0xF0000000) + (m_Command.target << 2); Section->m_Jump.TargetPC = (m_PC & 0xF0000000) + (m_Command.target << 2);
if (m_PC == Section->m_Jump.TargetPC) { if (m_PC == Section->m_Jump.TargetPC)
if (!DelaySlotEffectsCompare(m_PC,31,0)) { {
if (!DelaySlotEffectsCompare(m_PC,31,0))
{
Section->m_Jump.PermLoop = true; Section->m_Jump.PermLoop = true;
} }
} }
@ -381,7 +398,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
#endif #endif
break; break;
case R4300i_BEQ: case R4300i_BEQ:
if (m_PC + ((short)m_Command.offset << 2) + 4 != m_PC + 8) if (m_PC + ((int16_t)m_Command.offset << 2) + 4 != m_PC + 8)
{ {
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
@ -389,17 +406,19 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
{ {
if (Section->m_Cont.TargetPC != m_PC + 8 && if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL && Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
} else { }
if (Section->m_Cont.TargetPC != (DWORD)-1) else
{
if (Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
//g_Notify->BreakPoint(__FILEW__,__LINE__); //g_Notify->BreakPoint(__FILEW__,__LINE__);
} }
} }
if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4) if (Section->m_Jump.TargetPC != m_PC + ((int16_t)m_Command.offset << 2) + 4)
{ {
//g_Notify->BreakPoint(__FILEW__,__LINE__); //g_Notify->BreakPoint(__FILEW__,__LINE__);
} }
@ -416,19 +435,19 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
case R4300i_BNE: case R4300i_BNE:
case R4300i_BLEZ: case R4300i_BLEZ:
case R4300i_BGTZ: case R4300i_BGTZ:
if (m_PC + ((short)m_Command.offset << 2) + 4 != m_PC + 8) if (m_PC + ((int16_t)m_Command.offset << 2) + 4 != m_PC + 8)
{ {
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8 && if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL && Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4 && if (Section->m_Jump.TargetPC != m_PC + ((int16_t)m_Command.offset << 2) + 4 &&
Section->m_JumpSection != NULL && Section->m_JumpSection != NULL &&
Section->m_Jump.TargetPC != (DWORD)-1) Section->m_Jump.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
@ -446,7 +465,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
case R4300i_ADDIU: case R4300i_ADDIU:
if (m_Command.rt == 0) { break; } if (m_Command.rt == 0) { break; }
/*if (m_Command.rs == 0) { /*if (m_Command.rs == 0) {
m_Reg.GetMipsRegLo(m_Command.rt) = (short)m_Command.immediate; m_Reg.GetMipsRegLo(m_Command.rt) = (int16_t)m_Command.immediate;
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32_SIGN);
} else {*/ } else {*/
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
@ -461,7 +480,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
if (m_Command.rt == 0) { break; } if (m_Command.rt == 0) { break; }
if (!m_Reg.IsModified(m_Command.rt)) if (!m_Reg.IsModified(m_Command.rt))
{ {
m_Reg.SetMipsRegLo(m_Command.rt,((short)m_Command.offset << 16)); m_Reg.SetMipsRegLo(m_Command.rt, ((int16_t)m_Command.offset << 16));
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_32_SIGN);
} }
break; break;
@ -478,7 +497,8 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
if (m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rt, m_Reg.GetMipsRegLo(m_Command.rs) | m_Command.immediate); m_Reg.SetMipsRegLo(m_Command.rt, m_Reg.GetMipsRegLo(m_Command.rs) | m_Command.immediate);
} else { }
else {
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
} }
break; break;
@ -488,15 +508,19 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
{ {
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rt, m_Reg.GetMipsRegLo(m_Command.rs) ^ m_Command.immediate); m_Reg.SetMipsRegLo(m_Command.rt, m_Reg.GetMipsRegLo(m_Command.rs) ^ m_Command.immediate);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
} }
break; break;
case R4300i_CP0: case R4300i_CP0:
switch (m_Command.rs) { switch (m_Command.rs)
{
case R4300i_COP0_MF: case R4300i_COP0_MF:
if (m_Command.rt == 0) { break; } if (m_Command.rt == 0) { break; }
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
@ -536,18 +560,19 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
break; break;
case R4300i_COP1_BC: case R4300i_COP1_BC:
switch (m_Command.ft) { switch (m_Command.ft)
{
case R4300i_COP1_BC_BCFL: case R4300i_COP1_BC_BCFL:
case R4300i_COP1_BC_BCTL: case R4300i_COP1_BC_BCTL:
m_NextInstruction = LIKELY_DELAY_SLOT; m_NextInstruction = LIKELY_DELAY_SLOT;
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8 && if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL && Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
if (m_PC == m_PC + ((short)m_Command.offset << 2) + 4) if (m_PC == m_PC + ((int16_t)m_Command.offset << 2) + 4)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
#ifdef tofix #ifdef tofix
@ -568,11 +593,11 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8 && if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL && Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4) if (Section->m_Jump.TargetPC != m_PC + ((int16_t)m_Command.offset << 2) + 4)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
@ -610,7 +635,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_Cont.TargetPC != m_PC + 8 && if (Section->m_Cont.TargetPC != m_PC + 8 &&
Section->m_ContinueSection != NULL && Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
@ -618,11 +643,11 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
{ {
//g_Notify->BreakPoint(__FILEW__,__LINE__); //g_Notify->BreakPoint(__FILEW__,__LINE__);
} }
/*if (Section->m_Jump.TargetPC != m_PC + ((short)m_Command.offset << 2) + 4) /*if (Section->m_Jump.TargetPC != m_PC + ((int16_t)m_Command.offset << 2) + 4)
{ {
g_Notify->BreakPoint(__FILEW__,__LINE__); g_Notify->BreakPoint(__FILEW__,__LINE__);
}*/ }*/
if (m_PC == m_PC + ((short)m_Command.offset << 2) + 4) if (m_PC == m_PC + ((int16_t)m_Command.offset << 2) + 4)
{ {
if (!DelaySlotEffectsCompare(m_PC, m_Command.rs, m_Command.rt) && !Section->m_Jump.PermLoop) if (!DelaySlotEffectsCompare(m_PC, m_Command.rs, m_Command.rt) && !Section->m_Jump.PermLoop)
{ {
@ -638,16 +663,22 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
{ {
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rs))
if (m_Reg.Is64Bit(m_Command.rs)) { {
int imm32 = (short)m_Command.immediate; if (m_Reg.Is64Bit(m_Command.rs))
__int64 imm64 = imm32; {
int imm32 = (int16_t)m_Command.immediate;
int64_t imm64 = imm32;
m_Reg.SetMipsReg_S(m_Command.rt, m_Reg.GetMipsRegLo_S(m_Command.rs) + imm64); m_Reg.SetMipsReg_S(m_Command.rt, m_Reg.GetMipsRegLo_S(m_Command.rs) + imm64);
} else { }
m_Reg.SetMipsReg_S(m_Command.rt, m_Reg.GetMipsRegLo_S(m_Command.rs) + (short)m_Command.immediate); else
{
m_Reg.SetMipsReg_S(m_Command.rt, m_Reg.GetMipsRegLo_S(m_Command.rs) + (int16_t)m_Command.immediate);
} }
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_CONST_64);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rt, CRegInfo::STATE_MODIFIED);
} }
break; break;
@ -704,8 +735,10 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
} }
m_NextInstruction = END_BLOCK; m_NextInstruction = END_BLOCK;
SetJumpRegSet(Section, m_Reg); SetJumpRegSet(Section, m_Reg);
} else { }
switch (m_NextInstruction) { else {
switch (m_NextInstruction)
{
case NORMAL: case NORMAL:
m_PC += 4; m_PC += 4;
break; break;
@ -735,7 +768,9 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
if (Section->m_CompiledLocation) if (Section->m_CompiledLocation)
{ {
} else { }
else
{
//Section->m_Jump.RegSet = m_Reg; //Section->m_Jump.RegSet = m_Reg;
//Section->m_Jump.DoneDelaySlot = true; //Section->m_Jump.DoneDelaySlot = true;
} }
@ -750,7 +785,8 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
SetContinueRegSet(Section, m_Reg); SetContinueRegSet(Section, m_Reg);
} }
if ((m_PC & 0xFFFFF000) != (m_EnterSection->m_EnterPC & 0xFFFFF000)) { if ((m_PC & 0xFFFFF000) != (m_EnterSection->m_EnterPC & 0xFFFFF000))
{
if (m_NextInstruction != END_BLOCK && m_NextInstruction != NORMAL) if (m_NextInstruction != END_BLOCK && m_NextInstruction != NORMAL)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
@ -780,7 +816,9 @@ bool LoopAnalysis::SyncRegState ( CRegInfo & RegSet, const CRegInfo& SyncReg )
CPU_Message(__FUNCTION__ ": Clear state %s RegEnter State: %X Jump Reg State: %X", CRegName::GPR[x], RegSet.GetMipsRegState(x), SyncReg.GetMipsRegState(x)); CPU_Message(__FUNCTION__ ": Clear state %s RegEnter State: %X Jump Reg State: %X", CRegName::GPR[x], RegSet.GetMipsRegState(x), SyncReg.GetMipsRegState(x));
RegSet.SetMipsRegState(x, CRegInfo::STATE_MODIFIED); RegSet.SetMipsRegState(x, CRegInfo::STATE_MODIFIED);
bChanged = true; bChanged = true;
} else if (RegSet.IsConst(x) && RegSet.Is64Bit(x) && RegSet.GetMipsReg_S(x) != SyncReg.GetMipsReg_S(x)) { }
else if (RegSet.IsConst(x) && RegSet.Is64Bit(x) && RegSet.GetMipsReg_S(x) != SyncReg.GetMipsReg_S(x))
{
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
} }
@ -793,7 +831,9 @@ void LoopAnalysis::SetJumpRegSet ( CCodeSection * Section, const CRegInfo &Reg )
if (itr != m_JumpRegisters.end()) if (itr != m_JumpRegisters.end())
{ {
*(itr->second) = Reg; *(itr->second) = Reg;
} else { }
else
{
m_JumpRegisters.insert(RegisterMap::value_type(Section->m_SectionID, new CRegInfo(Reg))); m_JumpRegisters.insert(RegisterMap::value_type(Section->m_SectionID, new CRegInfo(Reg)));
} }
} }
@ -804,7 +844,9 @@ void LoopAnalysis::SetContinueRegSet ( CCodeSection * Section, const CRegInfo &R
if (itr != m_ContinueRegisters.end()) if (itr != m_ContinueRegisters.end())
{ {
*(itr->second) = Reg; *(itr->second) = Reg;
} else { }
else
{
m_ContinueRegisters.insert(RegisterMap::value_type(Section->m_SectionID, new CRegInfo(Reg))); m_ContinueRegisters.insert(RegisterMap::value_type(Section->m_SectionID, new CRegInfo(Reg)));
} }
} }
@ -830,13 +872,17 @@ void LoopAnalysis::SPECIAL_SRA()
void LoopAnalysis::SPECIAL_SLLV() void LoopAnalysis::SPECIAL_SLLV()
{ {
if (m_Command.rd == 0) { return; } if (m_Command.rd == 0) { return; }
if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd) { if (m_Command.rt == m_Command.rd || m_Command.rs == m_Command.rd)
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) << (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F)); m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) << (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -848,10 +894,13 @@ void LoopAnalysis::SPECIAL_SRLV()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F)); m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -863,10 +912,13 @@ void LoopAnalysis::SPECIAL_SRAV()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F)); m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -875,10 +927,13 @@ void LoopAnalysis::SPECIAL_JR()
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
#ifdef tofix #ifdef tofix
if (m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rs))
{
Section->m_Jump.TargetPC = m_Reg.GetMipsRegLo(m_Command.rs); Section->m_Jump.TargetPC = m_Reg.GetMipsRegLo(m_Command.rs);
} else { }
Section->m_Jump.TargetPC = (DWORD)-1; else
{
Section->m_Jump.TargetPC = (uint32_t)-1;
} }
#endif #endif
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
@ -892,8 +947,10 @@ void LoopAnalysis::SPECIAL_JALR()
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN);
if (m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rs)) {
Section->m_Jump.TargetPC = m_Reg.GetMipsRegLo(m_Command.rs); Section->m_Jump.TargetPC = m_Reg.GetMipsRegLo(m_Command.rs);
} else { }
Section->m_Jump.TargetPC = (DWORD)-1; else
{
Section->m_Jump.TargetPC = (uint32_t)-1;
} }
#endif #endif
m_NextInstruction = DELAY_SLOT; m_NextInstruction = DELAY_SLOT;
@ -903,12 +960,12 @@ void LoopAnalysis::SPECIAL_SYSCALL ( CCodeSection * Section )
{ {
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_ContinueSection != NULL && if (Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
if (Section->m_JumpSection != NULL && if (Section->m_JumpSection != NULL &&
Section->m_Jump.TargetPC != (DWORD)-1) Section->m_Jump.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
@ -923,12 +980,12 @@ void LoopAnalysis::SPECIAL_BREAK ( CCodeSection * Section )
{ {
#ifdef CHECKED_BUILD #ifdef CHECKED_BUILD
if (Section->m_ContinueSection != NULL && if (Section->m_ContinueSection != NULL &&
Section->m_Cont.TargetPC != (DWORD)-1) Section->m_Cont.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
if (Section->m_JumpSection != NULL && if (Section->m_JumpSection != NULL &&
Section->m_Jump.TargetPC != (DWORD)-1) Section->m_Jump.TargetPC != (uint32_t)-1)
{ {
g_Notify->BreakPoint(__FILEW__, __LINE__); g_Notify->BreakPoint(__FILEW__, __LINE__);
} }
@ -946,7 +1003,6 @@ void LoopAnalysis::SPECIAL_MFHI()
void LoopAnalysis::SPECIAL_MTHI() void LoopAnalysis::SPECIAL_MTHI()
{ {
} }
void LoopAnalysis::SPECIAL_MFLO() void LoopAnalysis::SPECIAL_MFLO()
@ -956,7 +1012,6 @@ void LoopAnalysis::SPECIAL_MFLO()
void LoopAnalysis::SPECIAL_MTLO() void LoopAnalysis::SPECIAL_MTLO()
{ {
} }
void LoopAnalysis::SPECIAL_DSLLV() void LoopAnalysis::SPECIAL_DSLLV()
@ -966,10 +1021,13 @@ void LoopAnalysis::SPECIAL_DSLLV()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(QWORD)m_Reg.GetMipsRegLo_S(m_Command.rt) << (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F)); m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (uint64_t)m_Reg.GetMipsRegLo_S(m_Command.rt) << (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -981,13 +1039,15 @@ void LoopAnalysis::SPECIAL_DSRLV()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(QWORD)m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F)); m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (uint64_t)m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
void LoopAnalysis::SPECIAL_DSRAV() void LoopAnalysis::SPECIAL_DSRAV()
@ -999,8 +1059,10 @@ void LoopAnalysis::SPECIAL_DSRAV()
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg_S(m_Command.rt):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F)); m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg_S(m_Command.rt) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x3F));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1072,13 +1134,16 @@ void LoopAnalysis::SPECIAL_DADD()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsReg(m_Command.rd, m_Reg.SetMipsReg(m_Command.rd,
m_Reg.Is64Bit(m_Command.rs)?m_Reg.GetMipsReg(m_Command.rs):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rs) + m_Reg.Is64Bit(m_Command.rs) ? m_Reg.GetMipsReg(m_Command.rs) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rs) +
m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rt) m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rt)
); );
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1090,13 +1155,16 @@ void LoopAnalysis::SPECIAL_DADDU()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsReg(m_Command.rd, m_Reg.SetMipsReg(m_Command.rd,
m_Reg.Is64Bit(m_Command.rs)?m_Reg.GetMipsReg(m_Command.rs):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rs) + m_Reg.Is64Bit(m_Command.rs) ? m_Reg.GetMipsReg(m_Command.rs) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rs) +
m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rt) m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rt)
); );
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1108,13 +1176,16 @@ void LoopAnalysis::SPECIAL_DSUB()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsReg(m_Command.rd, m_Reg.SetMipsReg(m_Command.rd,
m_Reg.Is64Bit(m_Command.rs)?m_Reg.GetMipsReg(m_Command.rs):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rs) - m_Reg.Is64Bit(m_Command.rs) ? m_Reg.GetMipsReg(m_Command.rs) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rs) -
m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rt) m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rt)
); );
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1126,13 +1197,16 @@ void LoopAnalysis::SPECIAL_DSUBU()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) { if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs))
{
m_Reg.SetMipsReg(m_Command.rd, m_Reg.SetMipsReg(m_Command.rd,
m_Reg.Is64Bit(m_Command.rs)?m_Reg.GetMipsReg(m_Command.rs):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rs) - m_Reg.Is64Bit(m_Command.rs) ? m_Reg.GetMipsReg(m_Command.rs) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rs) -
m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rt) m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rt)
); );
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1144,10 +1218,13 @@ void LoopAnalysis::SPECIAL_DSLL()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt)) { if (m_Reg.IsConst(m_Command.rt))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
m_Reg.SetMipsReg(m_Command.rd,m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rt) << m_Command.sa); m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rt) << m_Command.sa);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1159,10 +1236,13 @@ void LoopAnalysis::SPECIAL_DSRL()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt)) { if (m_Reg.IsConst(m_Command.rt))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg(m_Command.rt):(QWORD)m_Reg.GetMipsRegLo_S(m_Command.rt) >> m_Command.sa); m_Reg.SetMipsReg(m_Command.rd, m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg(m_Command.rt) : (uint64_t)m_Reg.GetMipsRegLo_S(m_Command.rt) >> m_Command.sa);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1174,10 +1254,13 @@ void LoopAnalysis::SPECIAL_DSRA()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt)) { if (m_Reg.IsConst(m_Command.rt))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
m_Reg.SetMipsReg_S(m_Command.rd, m_Reg.Is64Bit(m_Command.rt)?m_Reg.GetMipsReg_S(m_Command.rt):(__int64)m_Reg.GetMipsRegLo_S(m_Command.rt) >> m_Command.sa); m_Reg.SetMipsReg_S(m_Command.rd, m_Reg.Is64Bit(m_Command.rt) ? m_Reg.GetMipsReg_S(m_Command.rt) : (int64_t)m_Reg.GetMipsRegLo_S(m_Command.rt) >> m_Command.sa);
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1189,10 +1272,13 @@ void LoopAnalysis::SPECIAL_DSLL32()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt)) { if (m_Reg.IsConst(m_Command.rt))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_64);
m_Reg.SetMipsReg(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) << (m_Command.sa + 32)); m_Reg.SetMipsReg(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) << (m_Command.sa + 32));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1204,10 +1290,13 @@ void LoopAnalysis::SPECIAL_DSRL32()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt)) { if (m_Reg.IsConst(m_Command.rt))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd,(DWORD)(m_Reg.GetMipsReg(m_Command.rt) >> (m_Command.sa + 32))); m_Reg.SetMipsRegLo(m_Command.rd, (uint32_t)(m_Reg.GetMipsReg(m_Command.rt) >> (m_Command.sa + 32)));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }
@ -1219,10 +1308,13 @@ void LoopAnalysis::SPECIAL_DSRA32()
{ {
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
if (m_Reg.IsConst(m_Command.rt)) { if (m_Reg.IsConst(m_Command.rt))
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd,(DWORD)(m_Reg.GetMipsReg_S(m_Command.rt) >> (m_Command.sa + 32))); m_Reg.SetMipsRegLo(m_Command.rd, (uint32_t)(m_Reg.GetMipsReg_S(m_Command.rt) >> (m_Command.sa + 32)));
} else { }
else
{
m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED); m_Reg.SetMipsRegState(m_Command.rd, CRegInfo::STATE_MODIFIED);
} }
} }

6
Source/Project64/N64 System/Recompiler/Loop Analysis.h
View File

@ -71,16 +71,16 @@ private:
void SPECIAL_DSRL32(); void SPECIAL_DSRL32();
void SPECIAL_DSRA32(); void SPECIAL_DSRA32();
typedef std::map<int,CRegInfo *> RegisterMap; typedef std::map<int32_t, CRegInfo *> RegisterMap;
RegisterMap m_EnterRegisters; RegisterMap m_EnterRegisters;
RegisterMap m_ContinueRegisters; RegisterMap m_ContinueRegisters;
RegisterMap m_JumpRegisters; RegisterMap m_JumpRegisters;
CCodeSection * m_EnterSection; CCodeSection * m_EnterSection;
CCodeBlock * m_BlockInfo; CCodeBlock * m_BlockInfo;
DWORD m_PC; uint32_t m_PC;
CRegInfo m_Reg; CRegInfo m_Reg;
STEP_TYPE m_NextInstruction; STEP_TYPE m_NextInstruction;
OPCODE m_Command; OPCODE m_Command;
DWORD m_Test; uint32_t m_Test;
}; };