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[Project64] Add Write32RDRAMRegisters

This commit is contained in:
zilmar 2015-12-22 08:35:06 +11:00
parent d5ceb3d367
commit 0a8255bd39
2 changed files with 45 additions and 34 deletions
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63
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -2548,7 +2548,7 @@ bool CMipsMemoryVM::SB_NonMemory(uint32_t PAddr, uint8_t Value)
break; break;
default: default:
return false; return false;
} }
return true; return true;
} }
@ -2588,13 +2588,16 @@ bool CMipsMemoryVM::SH_NonMemory(uint32_t PAddr, uint16_t Value)
break; break;
default: default:
return false; return false;
} }
return true; return true;
} }
bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value) bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
{ {
m_MemLookupValue.UW[0] = Value;
m_MemLookupAddress = PAddr;
if (PAddr >= 0x10000000 && PAddr < 0x16000000) if (PAddr >= 0x10000000 && PAddr < 0x16000000)
{ {
if ((PAddr - 0x10000000) < g_Rom->GetRomSize()) if ((PAddr - 0x10000000) < g_Rom->GetRomSize())
@ -2613,7 +2616,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
{ {
return false; return false;
} }
} }
switch (PAddr & 0xFFF00000) switch (PAddr & 0xFFF00000)
{ {
@ -2645,29 +2648,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
*(uint32_t *)(m_RDRAM + PAddr) = Value; *(uint32_t *)(m_RDRAM + PAddr) = Value;
} }
break; break;
case 0x03F00000: case 0x03F00000: Write32RDRAMRegisters(); break;
switch (PAddr)
{
case 0x03F00000: g_Reg->RDRAM_CONFIG_REG = Value; break;
case 0x03F00004: g_Reg->RDRAM_DEVICE_ID_REG = Value; break;
case 0x03F00008: g_Reg->RDRAM_DELAY_REG = Value; break;
case 0x03F0000C: g_Reg->RDRAM_MODE_REG = Value; break;
case 0x03F00010: g_Reg->RDRAM_REF_INTERVAL_REG = Value; break;
case 0x03F00014: g_Reg->RDRAM_REF_ROW_REG = Value; break;
case 0x03F00018: g_Reg->RDRAM_RAS_INTERVAL_REG = Value; break;
case 0x03F0001C: g_Reg->RDRAM_MIN_INTERVAL_REG = Value; break;
case 0x03F00020: g_Reg->RDRAM_ADDR_SELECT_REG = Value; break;
case 0x03F00024: g_Reg->RDRAM_DEVICE_MANUF_REG = Value; break;
case 0x03F04004: break;
case 0x03F08004: break;
case 0x03F80004: break;
case 0x03F80008: break;
case 0x03F8000C: break;
case 0x03F80014: break;
default:
return false;
}
break;
case 0x04000000: case 0x04000000:
if (PAddr < 0x04002000) if (PAddr < 0x04002000)
{ {
@ -5699,7 +5680,7 @@ void CMipsMemoryVM::Load32Rom(void)
VirtualProtect(ROM, RomFileSize, PAGE_READONLY, &OldProtect); VirtualProtect(ROM, RomFileSize, PAGE_READONLY, &OldProtect);
} }
#endif #endif
} }
else if ((m_MemLookupAddress & 0xFFFFFFF) < g_MMU->m_RomSize) else if ((m_MemLookupAddress & 0xFFFFFFF) < g_MMU->m_RomSize)
{ {
m_MemLookupValue.UW[0] = *(uint32_t *)&g_MMU->m_Rom[(m_MemLookupAddress & 0xFFFFFFF)]; m_MemLookupValue.UW[0] = *(uint32_t *)&g_MMU->m_Rom[(m_MemLookupAddress & 0xFFFFFFF)];
@ -5714,3 +5695,31 @@ void CMipsMemoryVM::Load32Rom(void)
} }
} }
} }
void CMipsMemoryVM::Write32RDRAMRegisters(void)
{
switch ((m_MemLookupAddress & 0xFFFFFFF))
{
case 0x03F00000: g_Reg->RDRAM_CONFIG_REG = m_MemLookupValue.UW[0]; break;
case 0x03F00004: g_Reg->RDRAM_DEVICE_ID_REG = m_MemLookupValue.UW[0]; break;
case 0x03F00008: g_Reg->RDRAM_DELAY_REG = m_MemLookupValue.UW[0]; break;
case 0x03F0000C: g_Reg->RDRAM_MODE_REG = m_MemLookupValue.UW[0]; break;
case 0x03F00010: g_Reg->RDRAM_REF_INTERVAL_REG = m_MemLookupValue.UW[0]; break;
case 0x03F00014: g_Reg->RDRAM_REF_ROW_REG = m_MemLookupValue.UW[0]; break;
case 0x03F00018: g_Reg->RDRAM_RAS_INTERVAL_REG = m_MemLookupValue.UW[0]; break;
case 0x03F0001C: g_Reg->RDRAM_MIN_INTERVAL_REG = m_MemLookupValue.UW[0]; break;
case 0x03F00020: g_Reg->RDRAM_ADDR_SELECT_REG = m_MemLookupValue.UW[0]; break;
case 0x03F00024: g_Reg->RDRAM_DEVICE_MANUF_REG = m_MemLookupValue.UW[0]; break;
case 0x03F04004: break;
case 0x03F08004: break;
case 0x03F80004: break;
case 0x03F80008: break;
case 0x03F8000C: break;
case 0x03F80014: break;
default:
if (bHaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}

2
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -196,6 +196,8 @@ private:
static void Load32PifRam(void); static void Load32PifRam(void);
static void Load32Rom(void); static void Load32Rom(void);
static void Write32RDRAMRegisters(void);
CMipsMemory_CallBack * const m_CBClass; CMipsMemory_CallBack * const m_CBClass;
//Memory Locations //Memory Locations