diff --git a/Source/Project64-rsp/Cpu.cpp b/Source/Project64-rsp/Cpu.cpp index df4b35521..b332d13e6 100644 --- a/Source/Project64-rsp/Cpu.cpp +++ b/Source/Project64-rsp/Cpu.cpp @@ -35,7 +35,7 @@ DWORD Mfc0Count, SemaphoreExit = 0; void SetCPU(DWORD core) { - WaitForSingleObjectEx(hMutex, 1000 * 100, FALSE); + WaitForSingleObjectEx(hMutex, 1000 * 100, false); CPUCore = core; switch (core) { @@ -169,7 +169,7 @@ DWORD RunRecompilerCPU(DWORD Cycles); uint32_t DoRspCycles(uint32_t Cycles) { - extern Boolean AudioHle, GraphicsHle; + extern bool AudioHle, GraphicsHle; DWORD TaskType = *(DWORD *)(RSPInfo.DMEM + 0xFC0); /* if (*RSPInfo.SP_STATUS_REG & SP_STATUS_SIG0) @@ -215,7 +215,7 @@ uint32_t DoRspCycles(uint32_t Cycles) RSPInfo.ShowCFB(); } - Compiler.bAudioUcode = (TaskType == 2) ? TRUE : FALSE; + Compiler.bAudioUcode = (TaskType == 2) ? true : false; /* *RSPInfo.SP_STATUS_REG |= (0x0203 ); @@ -232,7 +232,7 @@ uint32_t DoRspCycles(uint32_t Cycles) StartTimer((DWORD)Timer_RSP_Running); } - WaitForSingleObjectEx(hMutex, 1000 * 100, FALSE); + WaitForSingleObjectEx(hMutex, 1000 * 100, false); if (BreakOnStart) { diff --git a/Source/Project64-rsp/Interpreter CPU.cpp b/Source/Project64-rsp/Interpreter CPU.cpp index e09d0e21c..81bc32065 100644 --- a/Source/Project64-rsp/Interpreter CPU.cpp +++ b/Source/Project64-rsp/Interpreter CPU.cpp @@ -380,7 +380,7 @@ void BuildInterpreterCPU(void) DWORD RunInterpreterCPU(DWORD Cycles) { DWORD CycleCount; - RSP_Running = TRUE; + RSP_Running = true; Enable_RSP_Commands_Window(); CycleCount = 0; @@ -414,15 +414,15 @@ DWORD RunInterpreterCPU(DWORD Cycles) if (Stepping_Commands) { - WaitingForStep = TRUE; + WaitingForStep = true; SetRSPCommandViewto(*PrgCount); UpdateRSPRegistersScreen(); - while (WaitingForStep == TRUE) + while (WaitingForStep == true) { Sleep(20); if (!Stepping_Commands) { - WaitingForStep = FALSE; + WaitingForStep = false; } } } @@ -453,7 +453,7 @@ DWORD RunInterpreterCPU(DWORD Cycles) case SINGLE_STEP_DONE: *PrgCount = (*PrgCount + 4) & 0xFFC; *RSPInfo.SP_STATUS_REG |= SP_STATUS_HALT; - RSP_Running = FALSE; + RSP_Running = false; break; } } diff --git a/Source/Project64-rsp/Interpreter Ops.cpp b/Source/Project64-rsp/Interpreter Ops.cpp index 4d140b0b2..fab571f3a 100644 --- a/Source/Project64-rsp/Interpreter Ops.cpp +++ b/Source/Project64-rsp/Interpreter Ops.cpp @@ -34,7 +34,7 @@ #endif extern UWORD32 Recp, RecpResult, SQroot, SQrootResult; -extern Boolean AudioHle, GraphicsHle; +extern bool AudioHle, GraphicsHle; // Opcode functions @@ -244,7 +244,7 @@ void RSP_Special_JALR(void) void RSP_Special_BREAK(void) { - RSP_Running = FALSE; + RSP_Running = false; *RSPInfo.SP_STATUS_REG |= (SP_STATUS_HALT | SP_STATUS_BROKE); if ((*RSPInfo.SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0) { @@ -348,7 +348,7 @@ void RSP_Cop0_MF(void) RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_STATUS_REG; if (Mfc0Count != 0 && RSP_MfStatusCount > Mfc0Count) { - RSP_Running = FALSE; + RSP_Running = false; } break; case 5: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.SP_DMA_FULL_REG; break; @@ -362,7 +362,7 @@ void RSP_Cop0_MF(void) { RSP_GPR[RSPOpC.rt].W = *RSPInfo.SP_SEMAPHORE_REG; *RSPInfo.SP_SEMAPHORE_REG = 1; - RSP_Running = FALSE; + RSP_Running = false; } break; case 8: RSP_GPR[RSPOpC.rt].UW = *RSPInfo.DPC_START_REG; break; @@ -414,7 +414,7 @@ void RSP_Cop0_MT(void) { *RSPInfo.MI_INTR_REG |= R4300i_SP_Intr; RSPInfo.CheckInterrupts(); - RSP_Running = FALSE; + RSP_Running = false; } if ((RSP_GPR[RSPOpC.rt].W & SP_CLR_SSTEP) != 0) { @@ -1824,8 +1824,6 @@ void RSP_Vector_VNXOR(void) void RSP_Vector_VRCP(void) { - int count, neg; - RecpResult.W = RSP_Vect[RSPOpC.rt].HW[EleSpec[RSPOpC.rs].B[(RSPOpC.rd & 0x7)]]; if (RecpResult.UW == 0) { @@ -1833,16 +1831,12 @@ void RSP_Vector_VRCP(void) } else { - if (RecpResult.W < 0) + bool neg = RecpResult.W < 0; + if (neg) { - neg = TRUE; RecpResult.W = ~RecpResult.W + 1; } - else - { - neg = FALSE; - } - for (count = 15; count > 0; count--) + for (int count = 15; count > 0; count--) { if ((RecpResult.W & (1 << count))) { @@ -1856,7 +1850,7 @@ void RSP_Vector_VRCP(void) RecpResult.W = (long)((0x7FFFFFFF / (double)RecpResult.W)); OldModel = _controlfp(OldModel, _MCW_RC); } - for (count = 31; count > 0; count--) + for (int count = 31; count > 0; count--) { if ((RecpResult.W & (1 << count))) { @@ -1864,12 +1858,12 @@ void RSP_Vector_VRCP(void) count = 0; } } - if (neg == TRUE) + if (neg == true) { RecpResult.W = ~RecpResult.W; } } - for (count = 0; count < 8; count++) + for (int count = 0; count < 8; count++) { RSP_ACCUM[count].HW[1] = RSP_Vect[RSPOpC.rt].UHW[EleSpec[RSPOpC.rs].B[count]]; } @@ -1889,7 +1883,7 @@ void RSP_Vector_VRCPL(void) { if (RecpResult.W < 0) { - neg = TRUE; + neg = true; if (RecpResult.UHW[1] == 0xFFFF && RecpResult.HW[0] < 0) { RecpResult.W = ~RecpResult.W + 1; @@ -1901,7 +1895,7 @@ void RSP_Vector_VRCPL(void) } else { - neg = FALSE; + neg = false; } for (count = 31; count > 0; count--) { @@ -1925,7 +1919,7 @@ void RSP_Vector_VRCPL(void) count = 0; } } - if (neg == TRUE) + if (neg == true) { RecpResult.W = ~RecpResult.W; } @@ -1978,12 +1972,12 @@ void RSP_Vector_VRSQ(void) { if (SQrootResult.W < 0) { - neg = TRUE; + neg = true; SQrootResult.W = ~SQrootResult.W + 1; } else { - neg = FALSE; + neg = false; } for (count = 15; count > 0; count--) { @@ -2007,7 +2001,7 @@ void RSP_Vector_VRSQ(void) count = 0; } } - if (neg == TRUE) + if (neg == true) { SQrootResult.W = ~SQrootResult.W; } @@ -2036,7 +2030,7 @@ void RSP_Vector_VRSQL(void) { if (SQrootResult.W < 0) { - neg = TRUE; + neg = true; if (SQrootResult.UHW[1] == 0xFFFF && SQrootResult.HW[0] < 0) { SQrootResult.W = ~SQrootResult.W + 1; @@ -2048,7 +2042,7 @@ void RSP_Vector_VRSQL(void) } else { - neg = FALSE; + neg = false; } for (count = 31; count > 0; count--) { @@ -2071,7 +2065,7 @@ void RSP_Vector_VRSQL(void) count = 0; } } - if (neg == TRUE) + if (neg == true) { SQrootResult.W = ~SQrootResult.W; } diff --git a/Source/Project64-rsp/Main.cpp b/Source/Project64-rsp/Main.cpp index 3e50ddfd6..381f93d52 100644 --- a/Source/Project64-rsp/Main.cpp +++ b/Source/Project64-rsp/Main.cpp @@ -30,18 +30,18 @@ void ClearAllx86Code(void); void ProcessMenuItem(int ID); #ifdef _WIN32 -Boolean CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lParam); +bool CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lParam); HMENU hRSPMenu = NULL; #endif -Boolean GraphicsHle = TRUE, AudioHle, ConditionalMove; -Boolean DebuggingEnabled = FALSE, +bool GraphicsHle = true, AudioHle, ConditionalMove; +bool DebuggingEnabled = false, Profiling, IndvidualBlock, ShowErrors, - BreakOnStart = FALSE, - LogRDP = FALSE, - LogX86Code = FALSE; + BreakOnStart = false, + LogRDP = false, + LogX86Code = false; uint32_t CPUCore = RecompilerCPU; void * hMutex = NULL; @@ -191,7 +191,7 @@ EXPORT void DllAbout(void * hParent) BOOL WINAPI DllMain(HINSTANCE hinst, DWORD /*fdwReason*/, LPVOID /*lpvReserved*/) { hinstDLL = hinst; - return TRUE; + return true; } void FixMenuState(void) @@ -233,8 +233,8 @@ EXPORT void GetDllInfo(PLUGIN_INFO * PluginInfo) #else sprintf(PluginInfo->Name, "RSP plugin %s", VER_FILE_VERSION_STR); #endif - PluginInfo->Reserved2 = FALSE; - PluginInfo->Reserved1 = TRUE; + PluginInfo->Reserved2 = false; + PluginInfo->Reserved1 = true; } /* @@ -259,7 +259,7 @@ EXPORT void GetRspDebugInfo(RSPDEBUG_INFO * _DebugInfo) #endif _DebugInfo->ProcessMenuItem = ProcessMenuItem; - _DebugInfo->UseBPoints = TRUE; + _DebugInfo->UseBPoints = true; sprintf(_DebugInfo->BPPanelName, " RSP "); _DebugInfo->Add_BPoint = Add_BPoint; _DebugInfo->CreateBPPanel = CreateBPPanel; @@ -330,32 +330,32 @@ needs five arguments, not two. Also, GCC lacks SEH. if (Intel_Features & 0x02000000) { - Compiler.mmx2 = TRUE; - Compiler.sse = TRUE; + Compiler.mmx2 = true; + Compiler.sse = true; } if (Intel_Features & 0x00800000) { - Compiler.mmx = TRUE; + Compiler.mmx = true; } if (AMD_Features & 0x40000000) { - Compiler.mmx2 = TRUE; + Compiler.mmx2 = true; } if (Intel_Features & 0x00008000) { - ConditionalMove = TRUE; + ConditionalMove = true; } else { - ConditionalMove = FALSE; + ConditionalMove = false; } } EXPORT void InitiateRSP(RSP_INFO Rsp_Info, uint32_t * CycleCount) { RSPInfo = Rsp_Info; - AudioHle = GetSystemSetting(Set_AudioHle); - GraphicsHle = GetSystemSetting(Set_GraphicsHle); + AudioHle = GetSystemSetting(Set_AudioHle) != 0; + GraphicsHle = GetSystemSetting(Set_GraphicsHle) != 0; *CycleCount = 0; AllocateMemory(); @@ -402,20 +402,20 @@ void ProcessMenuItem(int ID) { CheckMenuItem(hRSPMenu, ID_PROFILING_ON, MF_BYCOMMAND | MFS_UNCHECKED); CheckMenuItem(hRSPMenu, ID_PROFILING_OFF, MF_BYCOMMAND | MFS_CHECKED); - SetSetting(Set_Profiling, FALSE); + SetSetting(Set_Profiling, false); if (DebuggingEnabled) { - Profiling = FALSE; + Profiling = false; } } else { CheckMenuItem(hRSPMenu, ID_PROFILING_ON, MF_BYCOMMAND | MFS_CHECKED); CheckMenuItem(hRSPMenu, ID_PROFILING_OFF, MF_BYCOMMAND | MFS_UNCHECKED); - SetSetting(Set_Profiling, TRUE); + SetSetting(Set_Profiling, true); if (DebuggingEnabled) { - Profiling = TRUE; + Profiling = true; } } } @@ -429,19 +429,19 @@ void ProcessMenuItem(int ID) if (uState & MFS_CHECKED) { CheckMenuItem(hRSPMenu, ID_PROFILING_LOGINDIVIDUALBLOCKS, MF_BYCOMMAND | MFS_UNCHECKED); - SetSetting(Set_IndvidualBlock, FALSE); + SetSetting(Set_IndvidualBlock, false); if (DebuggingEnabled) { - IndvidualBlock = FALSE; + IndvidualBlock = false; } } else { CheckMenuItem(hRSPMenu, ID_PROFILING_LOGINDIVIDUALBLOCKS, MF_BYCOMMAND | MFS_CHECKED); - SetSetting(Set_IndvidualBlock, TRUE); + SetSetting(Set_IndvidualBlock, true); if (DebuggingEnabled) { - IndvidualBlock = TRUE; + IndvidualBlock = true; } } } @@ -453,19 +453,19 @@ void ProcessMenuItem(int ID) if (uState & MFS_CHECKED) { CheckMenuItem(hRSPMenu, ID_SHOWCOMPILERERRORS, MF_BYCOMMAND | MFS_UNCHECKED); - SetSetting(Set_ShowErrors, FALSE); + SetSetting(Set_ShowErrors, false); if (DebuggingEnabled) { - ShowErrors = FALSE; + ShowErrors = false; } } else { CheckMenuItem(hRSPMenu, ID_SHOWCOMPILERERRORS, MF_BYCOMMAND | MFS_CHECKED); - SetSetting(Set_ShowErrors, TRUE); + SetSetting(Set_ShowErrors, true); if (DebuggingEnabled) { - ShowErrors = TRUE; + ShowErrors = true; } } } @@ -480,19 +480,19 @@ void ProcessMenuItem(int ID) if (uState & MFS_CHECKED) { CheckMenuItem(hRSPMenu, ID_BREAKONSTARTOFTASK, MF_BYCOMMAND | MFS_UNCHECKED); - SetSetting(Set_BreakOnStart, FALSE); + SetSetting(Set_BreakOnStart, false); if (DebuggingEnabled) { - BreakOnStart = FALSE; + BreakOnStart = false; } } else { CheckMenuItem(hRSPMenu, ID_BREAKONSTARTOFTASK, MF_BYCOMMAND | MFS_CHECKED); - SetSetting(Set_BreakOnStart, TRUE); + SetSetting(Set_BreakOnStart, true); if (DebuggingEnabled) { - BreakOnStart = TRUE; + BreakOnStart = true; } } } @@ -504,20 +504,20 @@ void ProcessMenuItem(int ID) if (uState & MFS_CHECKED) { CheckMenuItem(hRSPMenu, ID_LOGRDPCOMMANDS, MF_BYCOMMAND | MFS_UNCHECKED); - SetSetting(Set_LogRDP, FALSE); + SetSetting(Set_LogRDP, false); if (DebuggingEnabled) { - LogRDP = FALSE; + LogRDP = false; StopRDPLog(); } } else { CheckMenuItem(hRSPMenu, ID_LOGRDPCOMMANDS, MF_BYCOMMAND | MFS_CHECKED); - SetSetting(Set_LogRDP, TRUE); + SetSetting(Set_LogRDP, true); if (DebuggingEnabled) { - LogRDP = TRUE; + LogRDP = true; StartRDPLog(); } } @@ -530,20 +530,20 @@ void ProcessMenuItem(int ID) if (uState & MFS_CHECKED) { CheckMenuItem(hRSPMenu, ID_SETTINGS_LOGX86CODE, MF_BYCOMMAND | MFS_UNCHECKED); - SetSetting(Set_LogX86Code, FALSE); + SetSetting(Set_LogX86Code, false); if (DebuggingEnabled) { - LogX86Code = FALSE; + LogX86Code = false; StopCPULog(); } } else { CheckMenuItem(hRSPMenu, ID_SETTINGS_LOGX86CODE, MF_BYCOMMAND | MFS_CHECKED); - SetSetting(Set_LogX86Code, TRUE); + SetSetting(Set_LogX86Code, true); if (DebuggingEnabled) { - LogX86Code = TRUE; + LogX86Code = true; StartCPULog(); } } @@ -612,39 +612,39 @@ EXPORT void RomClosed(void) } #ifdef _WIN32 -static BOOL GetBooleanCheck(HWND hDlg, DWORD DialogID) +static bool GetBooleanCheck(HWND hDlg, DWORD DialogID) { - return (IsDlgButtonChecked(hDlg, DialogID) == BST_CHECKED) ? TRUE : FALSE; + return (IsDlgButtonChecked(hDlg, DialogID) == BST_CHECKED) ? true : false; } -BOOL CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam*/) +bool CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam*/) { char Buffer[256]; switch (uMsg) { case WM_INITDIALOG: - if (Compiler.bDest == TRUE) + if (Compiler.bDest == true) CheckDlgButton(hDlg, IDC_COMPILER_DEST, BST_CHECKED); - if (Compiler.mmx == TRUE) + if (Compiler.mmx == true) CheckDlgButton(hDlg, IDC_CHECK_MMX, BST_CHECKED); - if (Compiler.mmx2 == TRUE) + if (Compiler.mmx2 == true) CheckDlgButton(hDlg, IDC_CHECK_MMX2, BST_CHECKED); - if (Compiler.sse == TRUE) + if (Compiler.sse == true) CheckDlgButton(hDlg, IDC_CHECK_SSE, BST_CHECKED); - if (Compiler.bAlignVector == TRUE) + if (Compiler.bAlignVector == true) CheckDlgButton(hDlg, IDC_COMPILER_ALIGNVEC, BST_CHECKED); - if (Compiler.bSections == TRUE) + if (Compiler.bSections == true) CheckDlgButton(hDlg, IDC_COMPILER_SECTIONS, BST_CHECKED); - if (Compiler.bGPRConstants == TRUE) + if (Compiler.bGPRConstants == true) CheckDlgButton(hDlg, IDC_COMPILER_GPRCONSTANTS, BST_CHECKED); - if (Compiler.bReOrdering == TRUE) + if (Compiler.bReOrdering == true) CheckDlgButton(hDlg, IDC_COMPILER_REORDER, BST_CHECKED); - if (Compiler.bFlags == TRUE) + if (Compiler.bFlags == true) CheckDlgButton(hDlg, IDC_COMPILER_FLAGS, BST_CHECKED); - if (Compiler.bAccum == TRUE) + if (Compiler.bAccum == true) CheckDlgButton(hDlg, IDC_COMPILER_ACCUM, BST_CHECKED); SetTimer(hDlg, 1, 250, NULL); @@ -681,18 +681,18 @@ BOOL CALLBACK CompilerDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lPar SetSetting(Set_AlignVector, Compiler.bAlignVector); KillTimer(hDlg, 1); - EndDialog(hDlg, TRUE); + EndDialog(hDlg, true); break; case IDCANCEL: KillTimer(hDlg, 1); - EndDialog(hDlg, TRUE); + EndDialog(hDlg, true); break; } break; default: - return FALSE; + return false; } - return TRUE; + return true; } BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam*/) @@ -703,11 +703,11 @@ BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam switch (uMsg) { case WM_INITDIALOG: - if (AudioHle == TRUE) + if (AudioHle == true) { CheckDlgButton(hDlg, IDC_AUDIOHLE, BST_CHECKED); } - if (GraphicsHle == TRUE) + if (GraphicsHle == true) { CheckDlgButton(hDlg, IDC_GRAPHICSHLE, BST_CHECKED); } @@ -728,17 +728,17 @@ BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam AudioHle = GetBooleanCheck(hDlg, IDC_AUDIOHLE); GraphicsHle = GetBooleanCheck(hDlg, IDC_GRAPHICSHLE); - EndDialog(hDlg, TRUE); + EndDialog(hDlg, true); break; case IDCANCEL: - EndDialog(hDlg, TRUE); + EndDialog(hDlg, true); break; } break; default: - return FALSE; + return false; } - return TRUE; + return true; } #endif @@ -748,29 +748,29 @@ BOOL CALLBACK ConfigDlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM /*lParam DialogBox(hinstDLL, "RSPCONFIG", GetForegroundWindow(), ConfigDlgProc); }*/ -EXPORT void EnableDebugging(Boolean Enabled) +EXPORT void EnableDebugging(int Enabled) { - DebuggingEnabled = Enabled; + DebuggingEnabled = Enabled != 0; if (DebuggingEnabled) { - BreakOnStart = GetSetting(Set_BreakOnStart); - CPUCore = GetSetting(Set_CPUCore); - LogRDP = GetSetting(Set_LogRDP); - LogX86Code = GetSetting(Set_LogX86Code); - Profiling = GetSetting(Set_Profiling); - IndvidualBlock = GetSetting(Set_IndvidualBlock); - ShowErrors = GetSetting(Set_ShowErrors); + BreakOnStart = GetSetting(Set_BreakOnStart) != 0; + CPUCore = GetSetting(Set_CPUCore) != 0; + LogRDP = GetSetting(Set_LogRDP) != 0; + LogX86Code = GetSetting(Set_LogX86Code) != 0; + Profiling = GetSetting(Set_Profiling) != 0; + IndvidualBlock = GetSetting(Set_IndvidualBlock) != 0; + ShowErrors = GetSetting(Set_ShowErrors) != 0; - Compiler.bDest = GetSetting(Set_CheckDest); - Compiler.bAccum = GetSetting(Set_Accum); - Compiler.mmx = GetSetting(Set_Mmx); - Compiler.mmx2 = GetSetting(Set_Mmx2); - Compiler.sse = GetSetting(Set_Sse); - Compiler.bSections = GetSetting(Set_Sections); - Compiler.bReOrdering = GetSetting(Set_ReOrdering); - Compiler.bGPRConstants = GetSetting(Set_GPRConstants); - Compiler.bFlags = GetSetting(Set_Flags); - Compiler.bAlignVector = GetSetting(Set_AlignVector); + Compiler.bDest = GetSetting(Set_CheckDest) != 0; + Compiler.bAccum = GetSetting(Set_Accum) != 0; + Compiler.mmx = GetSetting(Set_Mmx) != 0; + Compiler.mmx2 = GetSetting(Set_Mmx2) != 0; + Compiler.sse = GetSetting(Set_Sse) != 0; + Compiler.bSections = GetSetting(Set_Sections) != 0; + Compiler.bReOrdering = GetSetting(Set_ReOrdering) != 0; + Compiler.bGPRConstants = GetSetting(Set_GPRConstants) != 0; + Compiler.bFlags = GetSetting(Set_Flags) != 0; + Compiler.bAlignVector = GetSetting(Set_AlignVector) != 0; SetCPU(CPUCore); } #ifdef _WIN32 @@ -796,21 +796,21 @@ EXPORT void PluginLoaded(void) #else CPUCore = InterpreterCPU; #endif - LogRDP = FALSE; - LogX86Code = FALSE; - Profiling = FALSE; - IndvidualBlock = FALSE; - ShowErrors = FALSE; + LogRDP = false; + LogX86Code = false; + Profiling = false; + IndvidualBlock = false; + ShowErrors = false; memset(&Compiler, 0, sizeof(Compiler)); - Compiler.bDest = TRUE; - Compiler.bAlignVector = FALSE; - Compiler.bFlags = TRUE; - Compiler.bReOrdering = TRUE; - Compiler.bSections = TRUE; - Compiler.bAccum = TRUE; - Compiler.bGPRConstants = TRUE; + Compiler.bDest = true; + Compiler.bAlignVector = false; + Compiler.bFlags = true; + Compiler.bReOrdering = true; + Compiler.bSections = true; + Compiler.bAccum = true; + Compiler.bGPRConstants = true; DetectCpuSpecs(); SetModuleName("RSP"); @@ -841,10 +841,10 @@ EXPORT void PluginLoaded(void) RegisterSetting(Set_Mfc0Count, Data_DWORD_Game, "Mfc0Count", NULL, 0x0, NULL); RegisterSetting(Set_SemaphoreExit, Data_DWORD_Game, "SemaphoreExit", NULL, 0x0, NULL); - AudioHle = Set_AudioHle != 0 ? GetSystemSetting(Set_AudioHle) : false; - GraphicsHle = Set_GraphicsHle != 0 ? GetSystemSetting(Set_GraphicsHle) : true; + AudioHle = Set_AudioHle != 0 ? GetSystemSetting(Set_AudioHle) != 0 : false; + GraphicsHle = Set_GraphicsHle != 0 ? GetSystemSetting(Set_GraphicsHle) != 0 : true; #ifdef _WIN32 - hMutex = (HANDLE)CreateMutex(NULL, FALSE, NULL); + hMutex = (HANDLE)CreateMutex(NULL, false, NULL); #endif SetCPU(CPUCore); } diff --git a/Source/Project64-rsp/RSP Command.cpp b/Source/Project64-rsp/RSP Command.cpp index 5196b6c4e..958a53f96 100644 --- a/Source/Project64-rsp/RSP Command.cpp +++ b/Source/Project64-rsp/RSP Command.cpp @@ -47,7 +47,7 @@ RSPCOMMANDLINE RSPCommandLine[30]; HWND RSPCommandshWnd, hList, hAddress, hFunctionlist, hGoButton, hBreakButton, hStepButton, hSkipButton, hBPButton, hR4300iRegisters, hR4300iDebugger, hRSPRegisters, hMemory, hScrlBar; -Boolean InRSPCommandsWindow; +bool InRSPCommandsWindow; char CommandName[100]; DWORD Stepping_Commands, WaitingForStep; @@ -57,10 +57,10 @@ void Create_RSP_Commands_Window(int Child) if (Child) { - InRSPCommandsWindow = TRUE; + InRSPCommandsWindow = true; DialogBoxA((HINSTANCE)hinstDLL, "RSPCOMMAND", NULL, (DLGPROC)RSP_Commands_Proc); - InRSPCommandsWindow = FALSE; + InRSPCommandsWindow = false; memset(RSPCommandLine, 0, sizeof(RSPCommandLine)); SetRSPCommandToRunning(); } @@ -68,9 +68,9 @@ void Create_RSP_Commands_Window(int Child) { if (!InRSPCommandsWindow) { - Stepping_Commands = TRUE; + Stepping_Commands = true; CreateThread(NULL, 0, (LPTHREAD_START_ROUTINE)Create_RSP_Commands_Window, - (LPVOID)TRUE, 0, &ThreadID); + (LPVOID)true, 0, &ThreadID); } else { @@ -91,16 +91,16 @@ void Disable_RSP_Commands_Window(void) { return; } - EnableWindow(hList, FALSE); - EnableWindow(hAddress, FALSE); - EnableWindow(hScrlBar, FALSE); - EnableWindow(hGoButton, FALSE); - EnableWindow(hStepButton, FALSE); - EnableWindow(hSkipButton, FALSE); - EnableWindow(hR4300iRegisters, FALSE); - EnableWindow(hRSPRegisters, FALSE); - EnableWindow(hR4300iDebugger, FALSE); - EnableWindow(hMemory, FALSE); + EnableWindow(hList, false); + EnableWindow(hAddress, false); + EnableWindow(hScrlBar, false); + EnableWindow(hGoButton, false); + EnableWindow(hStepButton, false); + EnableWindow(hSkipButton, false); + EnableWindow(hR4300iRegisters, false); + EnableWindow(hRSPRegisters, false); + EnableWindow(hR4300iDebugger, false); + EnableWindow(hMemory, false); si.cbSize = sizeof(si); si.fMask = SIF_RANGE | SIF_POS | SIF_PAGE; @@ -108,14 +108,14 @@ void Disable_RSP_Commands_Window(void) si.nMax = 0; si.nPos = 1; si.nPage = 1; - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } int DisplayRSPCommand(DWORD location, int InsertPos) { uint32_t OpCode; DWORD LinesUsed = 1, status; - Boolean Redraw = FALSE; + bool Redraw = false; RSP_LW_IMEM(location, &OpCode); @@ -130,15 +130,15 @@ int DisplayRSPCommand(DWORD location, int InsertPos) } if (RSPCommandLine[InsertPos].opcode != OpCode) { - Redraw = TRUE; + Redraw = true; } if (RSPCommandLine[InsertPos].Location != location) { - Redraw = TRUE; + Redraw = true; } if (RSPCommandLine[InsertPos].status != status) { - Redraw = TRUE; + Redraw = true; } if (Redraw) { @@ -320,19 +320,19 @@ void DrawRSPCommand(LPARAM lParam) if (*PrgCount == RSPCommandLine[ditem->itemID].Location) { - ResetColor = TRUE; + ResetColor = true; hBrush = (HBRUSH)(COLOR_HIGHLIGHT + 1); oldColor = SetTextColor(ditem->hDC, RGB(255, 255, 255)); } else { - ResetColor = FALSE; + ResetColor = false; hBrush = (HBRUSH)GetStockObject(WHITE_BRUSH); } if (CheckForRSPBPoint(RSPCommandLine[ditem->itemID].Location)) { - ResetColor = TRUE; + ResetColor = true; if (*PrgCount == RSPCommandLine[ditem->itemID].Location) { SetTextColor(ditem->hDC, RGB(255, 0, 0)); @@ -381,7 +381,7 @@ void DrawRSPCommand(LPARAM lParam) DT_SINGLELINE | DT_VCENTER); } - if (ResetColor == TRUE) + if (ResetColor == true) { SetTextColor(ditem->hDC, oldColor); } @@ -395,18 +395,18 @@ void Enable_RSP_Commands_Window(void) { return; } - EnableWindow(hList, TRUE); - EnableWindow(hAddress, TRUE); - EnableWindow(hScrlBar, TRUE); - EnableWindow(hGoButton, TRUE); - EnableWindow(hStepButton, TRUE); - EnableWindow(hSkipButton, FALSE); - EnableWindow(hR4300iRegisters, TRUE); - EnableWindow(hRSPRegisters, TRUE); - EnableWindow(hR4300iDebugger, TRUE); - EnableWindow(hMemory, TRUE); - SendMessage(hBPButton, BM_SETSTYLE, BS_PUSHBUTTON, TRUE); - SendMessage(hStepButton, BM_SETSTYLE, BS_DEFPUSHBUTTON, TRUE); + EnableWindow(hList, true); + EnableWindow(hAddress, true); + EnableWindow(hScrlBar, true); + EnableWindow(hGoButton, true); + EnableWindow(hStepButton, true); + EnableWindow(hSkipButton, false); + EnableWindow(hR4300iRegisters, true); + EnableWindow(hRSPRegisters, true); + EnableWindow(hR4300iDebugger, true); + EnableWindow(hMemory, true); + SendMessage(hBPButton, BM_SETSTYLE, BS_PUSHBUTTON, true); + SendMessage(hStepButton, BM_SETSTYLE, BS_DEFPUSHBUTTON, true); SendMessage(RSPCommandshWnd, DM_SETDEFID, IDC_STEP_BUTTON, 0); if (Stepping_Commands) @@ -417,7 +417,7 @@ void Enable_RSP_Commands_Window(void) si.nMax = (0x1000 >> 2) - 1; si.nPos = (*PrgCount >> 2); si.nPage = 30; - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); SetRSPCommandViewto(*PrgCount); SetForegroundWindow(RSPCommandshWnd); @@ -426,7 +426,7 @@ void Enable_RSP_Commands_Window(void) void Enter_RSP_Commands_Window(void) { - Create_RSP_Commands_Window(FALSE); + Create_RSP_Commands_Window(false); } void Paint_RSP_Commands(HWND hDlg) @@ -501,7 +501,7 @@ void RefreshRSPCommands(void) char AsciiAddress[20]; int count; - if (InRSPCommandsWindow == FALSE) + if (InRSPCommandsWindow == false) { return; } @@ -540,7 +540,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l case WM_PAINT: Paint_RSP_Commands(hDlg); RedrawWindow(hScrlBar, NULL, NULL, RDW_INVALIDATE | RDW_ERASE); - return TRUE; + return true; case WM_COMMAND: switch (LOWORD(wParam)) { @@ -560,7 +560,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l } else { - AddRSP_BPoint(Location, FALSE); + AddRSP_BPoint(Location, false); } RefreshRSPCommands(); } @@ -579,11 +579,11 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l SetRSPCommandToStepping(); break; case IDC_STEP_BUTTON: - WaitingForStep = FALSE; + WaitingForStep = false; break; /*case IDC_SKIP_BUTTON: - SkipNextRSPOpCode = TRUE; - WaitingFor_RSPStep = FALSE; + SkipNextRSPOpCode = true; + WaitingFor_RSPStep = false; break;*/ case IDC_BP_BUTTON: if (DebugInfo.Enter_BPoint_Window != NULL) @@ -635,7 +635,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = (short int)HIWORD(wParam); - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); break; case SB_LINEDOWN: if (location < 0xF88) @@ -645,7 +645,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = ((location + 0x4) >> 2); - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } else { @@ -654,7 +654,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = (0xFFC >> 2); - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } break; case SB_LINEUP: @@ -665,7 +665,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = ((location - 0x4) >> 2); - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } else { @@ -674,7 +674,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = 0; - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } break; case SB_PAGEDOWN: @@ -685,7 +685,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = ((location + 0x74) >> 2); - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } else { @@ -694,7 +694,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = (0xF8F >> 2); - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } break; case SB_PAGEUP: @@ -705,7 +705,7 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = ((location - 0x74) >> 2); - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } else { @@ -714,16 +714,16 @@ LRESULT CALLBACK RSP_Commands_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM l si.cbSize = sizeof(si); si.fMask = SIF_POS; si.nPos = 0; - SetScrollInfo(hScrlBar, SB_CTL, &si, TRUE); + SetScrollInfo(hScrlBar, SB_CTL, &si, true); } break; } } break; default: - return FALSE; + return false; } - return TRUE; + return true; } void RSP_Commands_Setup(HWND hDlg) @@ -878,36 +878,36 @@ void RSP_Commands_Setup(HWND hDlg) void SetRSPCommandToRunning(void) { - Stepping_Commands = FALSE; - if (InRSPCommandsWindow == FALSE) + Stepping_Commands = false; + if (InRSPCommandsWindow == false) { return; } - EnableWindow(hGoButton, FALSE); - EnableWindow(hBreakButton, TRUE); - EnableWindow(hStepButton, FALSE); - EnableWindow(hSkipButton, FALSE); + EnableWindow(hGoButton, false); + EnableWindow(hBreakButton, true); + EnableWindow(hStepButton, false); + EnableWindow(hSkipButton, false); SendMessage(RSPCommandshWnd, DM_SETDEFID, IDC_BREAK_BUTTON, 0); - SendMessage(hGoButton, BM_SETSTYLE, BS_PUSHBUTTON, TRUE); - SendMessage(hBreakButton, BM_SETSTYLE, BS_DEFPUSHBUTTON, TRUE); + SendMessage(hGoButton, BM_SETSTYLE, BS_PUSHBUTTON, true); + SendMessage(hBreakButton, BM_SETSTYLE, BS_DEFPUSHBUTTON, true); SetFocus(hBreakButton); } void SetRSPCommandToStepping(void) { - if (InRSPCommandsWindow == FALSE) + if (InRSPCommandsWindow == false) { return; } - EnableWindow(hGoButton, TRUE); - EnableWindow(hBreakButton, FALSE); - EnableWindow(hStepButton, TRUE); - EnableWindow(hSkipButton, TRUE); - SendMessage(hBreakButton, BM_SETSTYLE, BS_PUSHBUTTON, TRUE); - SendMessage(hStepButton, BM_SETSTYLE, BS_DEFPUSHBUTTON, TRUE); + EnableWindow(hGoButton, true); + EnableWindow(hBreakButton, false); + EnableWindow(hStepButton, true); + EnableWindow(hSkipButton, true); + SendMessage(hBreakButton, BM_SETSTYLE, BS_PUSHBUTTON, true); + SendMessage(hStepButton, BM_SETSTYLE, BS_DEFPUSHBUTTON, true); SendMessage(RSPCommandshWnd, DM_SETDEFID, IDC_STEP_BUTTON, 0); SetFocus(hStepButton); - Stepping_Commands = TRUE; + Stepping_Commands = true; } void SetRSPCommandViewto(UINT NewLocation) @@ -915,7 +915,7 @@ void SetRSPCommandViewto(UINT NewLocation) unsigned int location; char Value[20]; - if (InRSPCommandsWindow == FALSE) + if (InRSPCommandsWindow == false) { return; } diff --git a/Source/Project64-rsp/RSP Command.h b/Source/Project64-rsp/RSP Command.h index ea155acf9..cbf2985a8 100644 --- a/Source/Project64-rsp/RSP Command.h +++ b/Source/Project64-rsp/RSP Command.h @@ -9,4 +9,4 @@ void SetRSPCommandToStepping(void); void SetRSPCommandViewto(unsigned int NewLocation); extern DWORD Stepping_Commands, WaitingForStep; -extern Boolean InRSPCommandsWindow; +extern bool InRSPCommandsWindow; diff --git a/Source/Project64-rsp/RSP Register.cpp b/Source/Project64-rsp/RSP Register.cpp index c01705441..0595919e1 100644 --- a/Source/Project64-rsp/RSP Register.cpp +++ b/Source/Project64-rsp/RSP Register.cpp @@ -34,7 +34,7 @@ LRESULT CALLBACK RSP_Registers_Proc(HWND, UINT, WPARAM, LPARAM); HWND RSP_Registers_hDlg, hTab, hStatic, hGPR[32], hCP0[16], hHIDDEN[12], hVECT1[16], hVECT2[16]; -int InRSPRegisterWindow = FALSE; +int InRSPRegisterWindow = false; WNDPROC RefreshProc; // RSP registers @@ -53,16 +53,16 @@ void Create_RSP_Register_Window(int Child) DWORD ThreadID; if (Child) { - InRSPRegisterWindow = TRUE; + InRSPRegisterWindow = true; DialogBoxA((HINSTANCE)hinstDLL, "RSPREGISTERS", NULL, (DLGPROC)RSP_Registers_Proc); - InRSPRegisterWindow = FALSE; + InRSPRegisterWindow = false; } else { if (!InRSPRegisterWindow) { CreateThread(NULL, 0, (LPTHREAD_START_ROUTINE)Create_RSP_Register_Window, - (LPVOID)TRUE, 0, &ThreadID); + (LPVOID)true, 0, &ThreadID); } else { @@ -77,7 +77,7 @@ void Create_RSP_Register_Window(int Child) void Enter_RSP_Register_Window(void) { - Create_RSP_Register_Window(FALSE); + Create_RSP_Register_Window(false); } void HideRSP_RegisterPanel(int Panel) @@ -89,31 +89,31 @@ void HideRSP_RegisterPanel(int Panel) case GeneralPurpose: for (count = 0; count < 32; count++) { - ShowWindow(hGPR[count], FALSE); + ShowWindow(hGPR[count], false); } break; case ControlProcessor0: for (count = 0; count < 16; count++) { - ShowWindow(hCP0[count], FALSE); + ShowWindow(hCP0[count], false); } break; case HiddenRegisters: for (count = 0; count < 12; count++) { - ShowWindow(hHIDDEN[count], FALSE); + ShowWindow(hHIDDEN[count], false); } break; case Vector1: for (count = 0; count < 16; count++) { - ShowWindow(hVECT1[count], FALSE); + ShowWindow(hVECT1[count], false); } break; case Vector2: for (count = 0; count < 16; count++) { - ShowWindow(hVECT2[count], FALSE); + ShowWindow(hVECT2[count], false); } break; } @@ -413,18 +413,18 @@ LRESULT CALLBACK RSP_Registers_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM break; case WM_SIZE: GetClientRect(hDlg, &rcDisp); - TabCtrl_AdjustRect(hTab, FALSE, &rcDisp); + TabCtrl_AdjustRect(hTab, false, &rcDisp); break; case WM_NOTIFY: switch (((NMHDR *)lParam)->code) { case TCN_SELCHANGE: - InvalidateRect(hTab, &rcDisp, TRUE); + InvalidateRect(hTab, &rcDisp, true); HideRSP_RegisterPanel(CurrentPanel); item.mask = TCIF_PARAM; TabCtrl_GetItem(hTab, TabCtrl_GetCurSel(hTab), &item); CurrentPanel = (int)item.lParam; - InvalidateRect(hStatic, NULL, FALSE); + InvalidateRect(hStatic, NULL, false); UpdateRSPRegistersScreen(); ShowRSP_RegisterPanel(CurrentPanel); break; @@ -439,9 +439,9 @@ LRESULT CALLBACK RSP_Registers_Proc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM break; } default: - return FALSE; + return false; } - return TRUE; + return true; } void SetupRSP_HiddenPanel(HWND hDlg) @@ -603,31 +603,31 @@ void ShowRSP_RegisterPanel(int Panel) case GeneralPurpose: for (count = 0; count < 32; count++) { - ShowWindow(hGPR[count], TRUE); + ShowWindow(hGPR[count], true); } break; case ControlProcessor0: for (count = 0; count < 16; count++) { - ShowWindow(hCP0[count], TRUE); + ShowWindow(hCP0[count], true); } break; case HiddenRegisters: for (count = 0; count < 12; count++) { - ShowWindow(hHIDDEN[count], TRUE); + ShowWindow(hHIDDEN[count], true); } break; case Vector1: for (count = 0; count < 16; count++) { - ShowWindow(hVECT1[count], TRUE); + ShowWindow(hVECT1[count], true); } break; case Vector2: for (count = 0; count < 16; count++) { - ShowWindow(hVECT2[count], TRUE); + ShowWindow(hVECT2[count], true); } break; } diff --git a/Source/Project64-rsp/Recompiler Analysis.cpp b/Source/Project64-rsp/Recompiler Analysis.cpp index abeb0e365..cc48f77c5 100644 --- a/Source/Project64-rsp/Recompiler Analysis.cpp +++ b/Source/Project64-rsp/Recompiler Analysis.cpp @@ -14,21 +14,21 @@ /* IsOpcodeNop -Output: Boolean whether opcode at PC is a NOP +Output: bool whether opcode at PC is a NOP Input: PC */ -Boolean IsOpcodeNop(DWORD PC) +bool IsOpcodeNop(DWORD PC) { RSPOpcode RspOp; RSP_LW_IMEM(PC, &RspOp.Value); if (RspOp.op == RSP_SPECIAL && RspOp.funct == RSP_SPECIAL_SLL) { - return (RspOp.rd == 0) ? TRUE : FALSE; + return (RspOp.rd == 0) ? true : false; } - return FALSE; + return false; } /* @@ -37,19 +37,19 @@ Output: Determines EMMS status Input: PC */ -Boolean IsNextInstructionMmx(DWORD PC) +bool IsNextInstructionMmx(DWORD PC) { RSPOpcode RspOp; - if (IsMmxEnabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; PC += 4; - if (PC >= 0x1000) return FALSE; + if (PC >= 0x1000) return false; RSP_LW_IMEM(PC, &RspOp.Value); if (RspOp.op != RSP_CP2) - return FALSE; + return false; if ((RspOp.rs & 0x10) != 0) { @@ -60,16 +60,16 @@ Boolean IsNextInstructionMmx(DWORD PC) case RSP_VECTOR_VMUDM: case RSP_VECTOR_VMUDN: case RSP_VECTOR_VMUDH: - if (TRUE == WriteToAccum(7, PC)) + if (true == WriteToAccum(7, PC)) { - return FALSE; + return false; } - else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == FALSE) + else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == false) { - return FALSE; + return false; } else - return TRUE; + return true; case RSP_VECTOR_VABS: case RSP_VECTOR_VAND: @@ -78,41 +78,41 @@ Boolean IsNextInstructionMmx(DWORD PC) case RSP_VECTOR_VNAND: case RSP_VECTOR_VNOR: case RSP_VECTOR_VNXOR: - if (TRUE == WriteToAccum(Low16BitAccum, PC)) + if (true == WriteToAccum(Low16BitAccum, PC)) { - return FALSE; + return false; } - else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == FALSE) + else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == false) { - return FALSE; + return false; } else - return TRUE; + return true; case RSP_VECTOR_VADD: case RSP_VECTOR_VSUB: // Requires no accumulator write, and no flags! - if (WriteToAccum(Low16BitAccum, PC) == TRUE) + if (WriteToAccum(Low16BitAccum, PC) == true) { - return FALSE; + return false; } - else if (UseRspFlags(PC) == TRUE) + else if (UseRspFlags(PC) == true) { - return FALSE; + return false; } - else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == FALSE) + else if ((RspOp.rs & 0x0f) >= 2 && (RspOp.rs & 0x0f) <= 7 && IsMmx2Enabled == false) { - return FALSE; + return false; } else - return TRUE; + return true; default: - return FALSE; + return false; } } else - return FALSE; + return false; } /* @@ -125,18 +125,18 @@ Input: PC, location in accumulator #define HIT_BRANCH 0x2 -DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) +DWORD WriteToAccum2(int Location, int PC, bool RecursiveCall) { RSPOpcode RspOp; DWORD BranchTarget = 0; signed int BranchImmed = 0; int Instruction_State = NextInstruction; - if (Compiler.bAccum == FALSE) return TRUE; + if (Compiler.bAccum == false) return true; if (Instruction_State == DELAY_SLOT) { - return TRUE; + return true; } do @@ -144,7 +144,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) PC += 4; if (PC >= 0x1000) { - return TRUE; + return true; } RSP_LW_IMEM(PC, &RspOp.Value); @@ -161,7 +161,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) break; default: CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_SPECIAL: @@ -187,7 +187,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) break; case RSP_SPECIAL_JALR: - return TRUE; + return true; case RSP_SPECIAL_JR: Instruction_State = DO_DELAY_SLOT; @@ -195,14 +195,14 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) default: CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_J: // There is no way a loopback is going to use accumulator if (Compiler.bAudioUcode && (((int)(RspOp.target << 2) & 0xFFC) < PC)) { - return FALSE; + return false; } // Rarely occurs, so we let them have their way else @@ -271,19 +271,19 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) case RSP_VECTOR_VMUDM: case RSP_VECTOR_VMUDN: case RSP_VECTOR_VMUDH: - return FALSE; + return false; case RSP_VECTOR_VMACF: case RSP_VECTOR_VMACU: case RSP_VECTOR_VMADL: case RSP_VECTOR_VMADM: case RSP_VECTOR_VMADN: - return TRUE; + return true; case RSP_VECTOR_VMADH: if (Location == Low16BitAccum) { break; } - return TRUE; + return true; case RSP_VECTOR_VABS: case RSP_VECTOR_VADD: @@ -298,7 +298,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) case RSP_VECTOR_VNXOR: // Since these modify the accumulator lower-16 bits we can // safely assume these 'reset' the accumulator no matter what - // return FALSE; + // return false; case RSP_VECTOR_VCR: case RSP_VECTOR_VCH: case RSP_VECTOR_VCL: @@ -315,15 +315,15 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) case RSP_VECTOR_VMOV: if (Location == Low16BitAccum) { - return FALSE; + return false; } break; case RSP_VECTOR_VSAW: - return TRUE; + return true; default: CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } } else @@ -337,7 +337,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) break; default: CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } } break; @@ -366,7 +366,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) break; default: CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_SC2: @@ -387,12 +387,12 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) break; default: CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; default: CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } switch (Instruction_State) { @@ -412,63 +412,63 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall) can prove effective, but it's still a branch... */ - if (BranchTarget != 0 && RecursiveCall == FALSE) + if (BranchTarget != 0 && RecursiveCall == false) { DWORD BranchTaken, BranchFall; // Analysis of branch taken - BranchTaken = WriteToAccum2(Location, BranchTarget - 4, TRUE); + BranchTaken = WriteToAccum2(Location, BranchTarget - 4, true); // Analysis of branch as NOP - BranchFall = WriteToAccum2(Location, PC, TRUE); + BranchFall = WriteToAccum2(Location, PC, true); if (BranchImmed < 0) { - if (BranchTaken != FALSE) + if (BranchTaken != false) { // Took this back branch and found a place // that needs this vector as a source - return TRUE; + return true; } else if (BranchFall == HIT_BRANCH) { - return TRUE; + return true; } // Otherwise this is completely valid return BranchFall; } else { - if (BranchFall != FALSE) + if (BranchFall != false) { // Took this forward branch and found a place // that needs this vector as a source - return TRUE; + return true; } else if (BranchTaken == HIT_BRANCH) { - return TRUE; + return true; } // Otherwise this is completely valid return BranchTaken; } } - return TRUE; + return true; } -Boolean WriteToAccum(int Location, int PC) +bool WriteToAccum(int Location, int PC) { - DWORD value = WriteToAccum2(Location, PC, FALSE); + DWORD value = WriteToAccum2(Location, PC, false); if (value == HIT_BRANCH) { - return TRUE; /* ??? */ + return true; /* ??? */ } else - return value; + return value != 0; } /* @@ -479,7 +479,7 @@ False: Destination is overwritten later Input: PC, Register */ -Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) +bool WriteToVectorDest2(DWORD DestReg, int PC, bool RecursiveCall) { RSPOpcode RspOp; DWORD BranchTarget = 0; @@ -487,11 +487,11 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) int Instruction_State = NextInstruction; - if (Compiler.bDest == FALSE) return TRUE; + if (Compiler.bDest == false) return true; if (Instruction_State == DELAY_SLOT) { - return TRUE; + return true; } do @@ -499,7 +499,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) PC += 4; if (PC >= 0x1000) { - return TRUE; + return true; } RSP_LW_IMEM(PC, &RspOp.Value); @@ -517,7 +517,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) break; default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_SPECIAL: @@ -543,7 +543,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) break; case RSP_SPECIAL_JALR: - return TRUE; + return true; case RSP_SPECIAL_JR: Instruction_State = DO_DELAY_SLOT; @@ -551,21 +551,21 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_J: // There is no way a loopback is going to use accumulator if (Compiler.bAudioUcode && (int)(RspOp.target << 2) < PC) { - return FALSE; + return false; } // Rarely occurs, so we let them have their way - return TRUE; + return true; case RSP_JAL: // Assume register is being passed to function or used after the function call - return TRUE; + return true; case RSP_BEQ: case RSP_BNE: @@ -633,15 +633,15 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) case RSP_VECTOR_VABS: if (DestReg == RspOp.rd) { - return TRUE; + return true; } if (DestReg == RspOp.rt) { - return TRUE; + return true; } if (DestReg == RspOp.sa) { - return FALSE; + return false; } break; @@ -653,7 +653,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) case RSP_VECTOR_VRSQH: if (DestReg == RspOp.rt) { - return TRUE; + return true; } break; @@ -667,26 +667,26 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) case RSP_VECTOR_VNE: if (DestReg == RspOp.rd) { - return TRUE; + return true; } if (DestReg == RspOp.rt) { - return TRUE; + return true; } if (DestReg == RspOp.sa) { - return FALSE; + return false; } break; case RSP_VECTOR_VSAW: if (DestReg == RspOp.sa) { - return FALSE; + return false; } break; default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } } else @@ -697,17 +697,17 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) case RSP_COP2_CT: break; case RSP_COP2_MT: - /* if (DestReg == RspOp.rd) { return FALSE; } */ + /* if (DestReg == RspOp.rd) { return false; } */ break; case RSP_COP2_MF: if (DestReg == RspOp.rd) { - return TRUE; + return true; } break; default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } } break; @@ -738,12 +738,12 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) case RSP_LSC2_HV: if (DestReg == RspOp.rt) { - return FALSE; + return false; } break; default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_SC2: @@ -762,7 +762,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) case RSP_LSC2_WV: if (DestReg == RspOp.rt) { - return TRUE; + return true; } break; @@ -771,7 +771,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) { if (DestReg >= RspOp.rt && DestReg <= RspOp.rt + 7) { - return TRUE; + return true; } } else @@ -781,7 +781,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) { if (DestReg == vect + del) { - return TRUE; + return true; } del = (del + 1) & 7; } @@ -790,12 +790,12 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } switch (Instruction_State) { @@ -815,65 +815,65 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall) can prove effective, but it's still a branch... */ - if (BranchTarget != 0 && RecursiveCall == FALSE) + if (BranchTarget != 0 && RecursiveCall == false) { DWORD BranchTaken, BranchFall; // Analysis of branch taken - BranchTaken = WriteToVectorDest2(DestReg, BranchTarget - 4, TRUE); + BranchTaken = WriteToVectorDest2(DestReg, BranchTarget - 4, true); // Analysis of branch as NOP - BranchFall = WriteToVectorDest2(DestReg, PC, TRUE); + BranchFall = WriteToVectorDest2(DestReg, PC, true); if (BranchImmed < 0) { - if (BranchTaken != FALSE) + if (BranchTaken != false) { /* * Took this back branch and found a place * that needs this vector as a source */ - return TRUE; + return true; } else if (BranchFall == HIT_BRANCH) { - return TRUE; + return true; } // Otherwise this is completely valid - return BranchFall; + return BranchFall != 0; } else { - if (BranchFall != FALSE) + if (BranchFall != false) { /* * Took this forward branch and found a place * that needs this vector as a source */ - return TRUE; + return true; } else if (BranchTaken == HIT_BRANCH) { - return TRUE; + return true; } // Otherwise this is completely valid - return BranchTaken; + return BranchTaken != 0; } } - return TRUE; + return true; } -Boolean WriteToVectorDest(DWORD DestReg, int PC) +bool WriteToVectorDest(DWORD DestReg, int PC) { DWORD value; - value = WriteToVectorDest2(DestReg, PC, FALSE); + value = WriteToVectorDest2(DestReg, PC, false); if (value == HIT_BRANCH) { - return TRUE; // TODO: ??? + return true; // TODO: ??? } else - return value; + return value != 0; } /* @@ -885,16 +885,16 @@ Input: PC */ // TODO: Consider delay slots and such in a branch? -Boolean UseRspFlags(int PC) +bool UseRspFlags(int PC) { RSPOpcode RspOp; int Instruction_State = NextInstruction; - if (Compiler.bFlags == FALSE) return TRUE; + if (Compiler.bFlags == false) return true; if (Instruction_State == DELAY_SLOT) { - return TRUE; + return true; } do @@ -902,7 +902,7 @@ Boolean UseRspFlags(int PC) PC -= 4; if (PC < 0) { - return TRUE; + return true; } RSP_LW_IMEM(PC, &RspOp.Value); @@ -920,7 +920,7 @@ Boolean UseRspFlags(int PC) break; default: CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_SPECIAL: @@ -951,7 +951,7 @@ Boolean UseRspFlags(int PC) default: CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_J: @@ -995,10 +995,10 @@ Boolean UseRspFlags(int PC) case RSP_VECTOR_VSUB: case RSP_VECTOR_VADD: - return FALSE; + return false; case RSP_VECTOR_VSUBC: case RSP_VECTOR_VADDC: - return TRUE; + return true; case RSP_VECTOR_VABS: case RSP_VECTOR_VAND: @@ -1022,7 +1022,7 @@ Boolean UseRspFlags(int PC) case RSP_VECTOR_VGE: case RSP_VECTOR_VNE: case RSP_VECTOR_VMRG: - return TRUE; + return true; case RSP_VECTOR_VSAW: case RSP_VECTOR_VMOV: @@ -1030,7 +1030,7 @@ Boolean UseRspFlags(int PC) default: CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } } else @@ -1038,7 +1038,7 @@ Boolean UseRspFlags(int PC) switch (RspOp.rs) { case RSP_COP2_CT: - return TRUE; + return true; case RSP_COP2_CF: case RSP_COP2_MT: @@ -1046,7 +1046,7 @@ Boolean UseRspFlags(int PC) break; default: CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } } break; @@ -1075,7 +1075,7 @@ Boolean UseRspFlags(int PC) break; default: CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; case RSP_SC2: @@ -1096,12 +1096,12 @@ Boolean UseRspFlags(int PC) break; default: CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } break; default: CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str()); - return TRUE; + return true; } switch (Instruction_State) { @@ -1114,7 +1114,7 @@ Boolean UseRspFlags(int PC) break; } } while (Instruction_State != FINISH_BLOCK); - return TRUE; + return true; } /* @@ -1125,15 +1125,15 @@ False: Register is not constant at all Input: PC, Pointer to constant to fill */ -Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) +bool IsRegisterConstant(DWORD Reg, DWORD * Constant) { DWORD PC = 0; DWORD References = 0; DWORD Const = 0; RSPOpcode RspOp; - if (Compiler.bGPRConstants == FALSE) - return FALSE; + if (Compiler.bGPRConstants == false) + return false; while (PC < 0x1000) { @@ -1174,7 +1174,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) case RSP_SPECIAL_SLTU: if (RspOp.rd == Reg) { - return FALSE; + return false; } break; @@ -1184,7 +1184,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) default: // CompilerWarning("Unknown opcode in IsRegisterConstant\n%s",RSPOpcodeName(RspOp.Hex,PC)); - // return FALSE; + // return false; break; } break; @@ -1205,14 +1205,14 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) { if (References > 0) { - return FALSE; + return false; } Const = (short)RspOp.immediate; References++; } else { - return FALSE; + return false; } } break; @@ -1223,13 +1223,13 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) { if (References > 0) { - return FALSE; + return false; } Const = (WORD)RspOp.immediate; References++; } else - return FALSE; + return false; } break; @@ -1238,7 +1238,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) { if (References > 0) { - return FALSE; + return false; } Const = (short)RspOp.offset << 16; References++; @@ -1251,7 +1251,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) case RSP_SLTIU: if (RspOp.rt == Reg) { - return FALSE; + return false; } break; @@ -1261,7 +1261,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) case RSP_COP0_MF: if (RspOp.rt == Reg) { - return FALSE; + return false; } case RSP_COP0_MT: break; @@ -1281,13 +1281,13 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) case RSP_COP2_MF: if (RspOp.rt == Reg) { - return FALSE; + return false; } break; default: // CompilerWarning("Unknown opcode in IsRegisterConstant\n%s",RSPOpcodeName(RspOp.Hex,PC)); - // return FALSE; + // return false; break; } } @@ -1300,7 +1300,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) case RSP_LHU: if (RspOp.rt == Reg) { - return FALSE; + return false; } break; @@ -1314,7 +1314,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) break; default: // CompilerWarning("Unknown opcode in IsRegisterConstant\n%s",RSPOpcodeName(RspOp.Hex,PC)); - // return FALSE; + // return false; break; } } @@ -1322,12 +1322,12 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant) if (References > 0) { *Constant = Const; - return TRUE; + return true; } else { *Constant = 0; - return FALSE; + return false; } } @@ -1339,7 +1339,7 @@ False: Opcode is not a branch Input: PC */ -Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp) +bool IsOpcodeBranch(DWORD PC, RSPOpcode RspOp) { PC = PC; // Unused @@ -1352,7 +1352,7 @@ Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp) case RSP_REGIMM_BGEZ: case RSP_REGIMM_BLTZAL: case RSP_REGIMM_BGEZAL: - return TRUE; + return true; default: //CompilerWarning("Unknown opcode in IsOpcodeBranch\n%s",RSPOpcodeName(RspOp.Hex,PC)); break; @@ -1382,7 +1382,7 @@ Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp) case RSP_SPECIAL_JALR: case RSP_SPECIAL_JR: - return TRUE; + return true; default: //CompilerWarning("Unknown opcode in IsOpcodeBranch\n%s",RSPOpcodeName(RspOp.Hex,PC)); @@ -1395,7 +1395,7 @@ Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp) case RSP_BNE: case RSP_BLEZ: case RSP_BGTZ: - return TRUE; + return true; case RSP_ADDI: case RSP_ADDIU: @@ -1429,7 +1429,7 @@ Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp) break; } - return FALSE; + return false; } /* @@ -1835,14 +1835,14 @@ False: Registers do not affect each other Input: PC */ -Boolean DelaySlotAffectBranch(DWORD PC) +bool DelaySlotAffectBranch(DWORD PC) { RSPOpcode Branch, Delay; OPCODE_INFO infoBranch, infoDelay; - if (IsOpcodeNop(PC + 4) == TRUE) + if (IsOpcodeNop(PC + 4) == true) { - return FALSE; + return false; } RSP_LW_IMEM(PC, &Branch.Value); @@ -1856,36 +1856,36 @@ Boolean DelaySlotAffectBranch(DWORD PC) if ((infoDelay.flags & COPO_MF_Instruction) == COPO_MF_Instruction) { - return TRUE; + return true; } if ((infoDelay.flags & Instruction_Mask) == VEC_Instruction) { - return FALSE; + return false; } if (infoBranch.SourceReg0 == infoDelay.DestReg) { - return TRUE; + return true; } if (infoBranch.SourceReg1 == infoDelay.DestReg) { - return TRUE; + return true; } - return FALSE; + return false; } /* CompareInstructions Output: -TRUE: The opcodes are fine, no dependency -FALSE: Watch it, these ops cant be touched +true: The opcodes are fine, no dependency +false: Watch it, these ops cant be touched Input: Top, not the current operation, the one above Bottom: The current opcode for re-ordering bubble style */ -Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) +bool CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) { OPCODE_INFO info0, info1; DWORD InstructionType; @@ -1899,10 +1899,10 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) #endif // Usually branches and such - if ((info0.flags & InvalidOpcode) != 0) return FALSE; - if ((info1.flags & InvalidOpcode) != 0) return FALSE; + if ((info0.flags & InvalidOpcode) != 0) return false; + if ((info1.flags & InvalidOpcode) != 0) return false; - if ((info0.flags & Flag_Instruction) != 0 && (info1.flags & Flag_Instruction) != 0) return FALSE; + if ((info0.flags & Flag_Instruction) != 0 && (info1.flags & Flag_Instruction) != 0) return false; InstructionType = (info0.flags & Instruction_Mask) << 2; InstructionType |= info1.flags & Instruction_Mask; @@ -1916,29 +1916,29 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) case 0x01: case 0x02: case 0x03: // First is a NOOP - return TRUE; + return true; case 0x00: // Both? case 0x10: case 0x20: case 0x30: // Second is a NOOP - return FALSE; + return false; case 0x06: // GPR then Vector - 01,10 if ((info0.flags & MemOperation_Mask) != 0 && (info1.flags & MemOperation_Mask) != 0) { // TODO: We have a vector and GPR memory operation - return FALSE; + return false; } else if ((info1.flags & MemOperation_Mask) != 0) { // We have a vector memory operation - return (info1.IndexReg == info0.DestReg) ? FALSE : TRUE; + return (info1.IndexReg == info0.DestReg) ? false : true; } // We could have memory or normal GPR instruction here // paired with some kind of vector operation - return TRUE; + return true; case 0x0A: // Vector then Vector - 10,10 /* @@ -1949,7 +1949,7 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) if ((info0.flags & Store_Operation) != 0 && (info1.flags & Accum_Operation) != 0 && !(info1.flags & VEC_Accumulate)) { - return FALSE; + return false; } // Look for loads and than some kind of vector operation @@ -1957,7 +1957,7 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) if ((info0.flags & Load_Operation) != 0 && (info1.flags & Accum_Operation) != 0 && !(info1.flags & VEC_Accumulate)) { - return FALSE; + return false; } if ((info0.flags & MemOperation_Mask) != 0 && (info1.flags & MemOperation_Mask) != 0) @@ -1965,61 +1965,61 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) // TODO: This is a pain, it's best to leave it alone - return FALSE; + return false; } else if ((info1.flags & MemOperation_Mask) != 0) { // Remember stored REG and loaded REG are the same if (info0.DestReg == info1.DestReg) { - return FALSE; + return false; } if (info1.flags & Load_Operation) { if (info0.SourceReg0 == info1.DestReg) { - return FALSE; + return false; } if (info0.SourceReg1 == info1.DestReg) { - return FALSE; + return false; } } else if (info1.flags & Store_Operation) { // It can store source REGS - return TRUE; + return true; } - return TRUE; + return true; } else if ((info0.flags & MemOperation_Mask) != 0) { // Remember stored REG and loaded REG are the same if (info0.DestReg == info1.DestReg) { - return FALSE; + return false; } if (info0.flags & Load_Operation) { if (info1.SourceReg0 == info0.DestReg) { - return FALSE; + return false; } if (info1.SourceReg1 == info0.DestReg) { - return FALSE; + return false; } } else if (info0.flags & Store_Operation) { // It can store source REGS - return TRUE; + return true; } - return TRUE; + return true; } else if ((info0.flags & VEC_Accumulate) != 0) { @@ -2030,7 +2030,7 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) VMUDH or VMADH or VADD */ - return FALSE; + return false; } else if ((info1.flags & VEC_Accumulate) != 0) { @@ -2041,7 +2041,7 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) VMADH */ - return FALSE; + return false; } else { @@ -2052,7 +2052,7 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) VADD or VMUDH */ - return FALSE; + return false; } break; @@ -2063,13 +2063,13 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) we can sit here all day swapping these 2 types */ - return FALSE; + return false; case 0x05: // GPR then GPR - 01,01 case 0x07: // GPR then COP2 - 01, 11 case 0x0D: // COP2 then GPR - 11, 01 case 0x0F: // COP2 then COP2 - 11, 11 - return FALSE; + return false; case 0x0B: // Vector then COP2 - 10, 11 if (info1.flags & Load_Operation) @@ -2077,15 +2077,15 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) // Move to COP2 (destination) from GPR (source) if (info1.DestReg == info0.DestReg) { - return FALSE; + return false; } if (info1.DestReg == info0.SourceReg0) { - return FALSE; + return false; } if (info1.DestReg == info0.SourceReg1) { - return FALSE; + return false; } } else if (info1.flags & Store_Operation) @@ -2093,15 +2093,15 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) // Move from COP2 (source) to GPR (destination) if (info1.SourceReg0 == info0.DestReg) { - return FALSE; + return false; } if (info1.SourceReg0 == info0.SourceReg0) { - return FALSE; + return false; } if (info1.SourceReg0 == info0.SourceReg1) { - return FALSE; + return false; } } else @@ -2109,7 +2109,7 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) CompilerWarning("Reorder: unhandled vector than COP2"); } // We want vectors on top - return FALSE; + return false; case 0x0E: // COP2 then Vector - 11, 10 if (info0.flags & Load_Operation) @@ -2117,15 +2117,15 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) // Move to COP2 (destination) from GPR (source) if (info0.DestReg == info1.DestReg) { - return FALSE; + return false; } if (info0.DestReg == info1.SourceReg0) { - return FALSE; + return false; } if (info0.DestReg == info1.SourceReg1) { - return FALSE; + return false; } } else if (info0.flags & Store_Operation) @@ -2133,19 +2133,19 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) // Move from COP2 (source) to GPR (destination) if (info0.SourceReg0 == info1.DestReg) { - return FALSE; + return false; } if (info0.SourceReg0 == info1.SourceReg0) { - return FALSE; + return false; } if (info0.SourceReg0 == info1.SourceReg1) { - return FALSE; + return false; } if (info0.DestReg == info1.SourceReg0) { - return FALSE; + return false; } } else @@ -2153,11 +2153,11 @@ Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom) CompilerWarning("Reorder: unhandled COP2 than vector"); } // We want this at the top - return TRUE; + return true; default: CompilerWarning("Reorder: Unhandled instruction type: %i", InstructionType); } - return FALSE; + return false; } diff --git a/Source/Project64-rsp/Recompiler CPU.cpp b/Source/Project64-rsp/Recompiler CPU.cpp index 4cb883a0f..03eab8e48 100644 --- a/Source/Project64-rsp/Recompiler CPU.cpp +++ b/Source/Project64-rsp/Recompiler CPU.cpp @@ -27,7 +27,7 @@ uint32_t CompilePC, JumpTableSize, BlockID = 0; DWORD dwBuffer = MainBuffer; -Boolean ChangedPC; +bool ChangedPC; RSP_BLOCK CurrentBlock; RSP_CODE RspCode; @@ -397,7 +397,7 @@ void BuildRecompilerCPU(void) RSP_Sc2[31] = Compile_UnknownOpcode; BlockID = 0; - ChangedPC = FALSE; + ChangedPC = false; #ifdef Log_x86Code Start_x86_Log(); #endif @@ -419,7 +419,7 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC) PreviousOp.Value = *(DWORD *)(RSPInfo.IMEM + StartPC); - if (TRUE == IsOpcodeBranch(StartPC, PreviousOp)) + if (IsOpcodeBranch(StartPC, PreviousOp)) { // The sub block ends here anyway return; @@ -464,7 +464,7 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC) } CurrentOp.Value = *(DWORD *)(RSPInfo.IMEM + CurrentPC); - if (TRUE == CompareInstructions(CurrentPC, &PreviousOp, &CurrentOp)) + if (CompareInstructions(CurrentPC, &PreviousOp, &CurrentOp)) { // Move current opcode up *(DWORD *)(RSPInfo.IMEM + CurrentPC - 4) = CurrentOp.Value; @@ -549,7 +549,7 @@ void DetectGPRConstants(RSP_CODE * code) { DWORD Count, Constant = 0; - memset(&code->bIsRegConst, 0, sizeof(Boolean) * 0x20); + memset(&code->bIsRegConst, 0, sizeof(bool) * 0x20); memset(&code->MipsRegConst, 0, sizeof(DWORD) * 0x20); if (!Compiler.bGPRConstants) @@ -559,16 +559,16 @@ void DetectGPRConstants(RSP_CODE * code) CPU_Message("***** Detecting constants *****"); // R0 is constant zero, R31 or RA is not constant - code->bIsRegConst[0] = TRUE; + code->bIsRegConst[0] = true; code->MipsRegConst[0] = 0; // Do your global search for them for (Count = 1; Count < 31; Count++) { - if (IsRegisterConstant(Count, &Constant) == TRUE) + if (IsRegisterConstant(Count, &Constant)) { CPU_Message("Global: %s is a constant of: %08X", GPR_Name(Count), Constant); - code->bIsRegConst[Count] = TRUE; + code->bIsRegConst[Count] = true; code->MipsRegConst[Count] = Constant; } } @@ -702,7 +702,7 @@ void BuildBranchLabels(void) { RspOp.Value = *(DWORD *)(RSPInfo.IMEM + i); - if (TRUE == IsOpcodeBranch(i, RspOp)) + if (IsOpcodeBranch(i, RspOp)) { if (RspCode.LabelCount >= (sizeof(RspCode.BranchLabels) / sizeof(RspCode.BranchLabels[0])) - 1) { @@ -748,23 +748,23 @@ void BuildBranchLabels(void) #endif } -Boolean IsJumpLabel(DWORD PC) +bool IsJumpLabel(DWORD PC) { DWORD Count; if (!RspCode.LabelCount) { - return FALSE; + return false; } for (Count = 0; Count < RspCode.LabelCount; Count++) { if (PC == RspCode.BranchLabels[Count]) { - return TRUE; + return true; } } - return FALSE; + return false; } void CompilerLinkBlocks(void) @@ -810,7 +810,7 @@ void CompilerRSPBlock(void) CPU_Message("Start of block: %X", CurrentBlock.StartPC); CPU_Message("====== Recompiled code ======"); - if (Compiler.bReOrdering == TRUE) + if (Compiler.bReOrdering) { memcpy(IMEM_SAVE, RSPInfo.IMEM, 0x1000); ReOrderSubBlock(&CurrentBlock); @@ -845,16 +845,16 @@ void CompilerRSPBlock(void) } } - if (Compiler.bSections == TRUE) + if (Compiler.bSections) { - if (TRUE == RSP_DoSections()) + if (RSP_DoSections()) { continue; } } #ifdef X86_RECOMP_VERBOSE - if (FALSE == IsOpcodeNop(CompilePC)) + if (!IsOpcodeNop(CompilePC)) { CPU_Message("X86 Address: %08X", RecompPos); } @@ -930,7 +930,7 @@ void CompilerRSPBlock(void) } while (NextInstruction != FINISH_BLOCK && (CompilePC < 0x1000 || NextInstruction == DELAY_SLOT)); CPU_Message("===== End of recompiled code ====="); - if (Compiler.bReOrdering == TRUE) + if (Compiler.bReOrdering) { memcpy(RSPInfo.IMEM, IMEM_SAVE, 0x1000); } @@ -941,7 +941,7 @@ DWORD RunRecompilerCPU(DWORD Cycles) { BYTE * Block; - RSP_Running = TRUE; + RSP_Running = true; SetJumpTable(JumpTableSize); while (RSP_Running) @@ -1008,11 +1008,11 @@ DWORD RunRecompilerCPU(DWORD Cycles) } if (RSP_NextInstruction == SINGLE_STEP) { - RSP_Running = FALSE; + RSP_Running = false; } } - if (IsMmxEnabled == TRUE) + if (IsMmxEnabled) { #if defined(_M_IX86) && defined(_MSC_VER) _asm emms diff --git a/Source/Project64-rsp/Recompiler CPU.h b/Source/Project64-rsp/Recompiler CPU.h index 2ca04cdcd..5715627e1 100644 --- a/Source/Project64-rsp/Recompiler CPU.h +++ b/Source/Project64-rsp/Recompiler CPU.h @@ -2,7 +2,7 @@ #include "RspTypes.h" extern uint32_t CompilePC, NextInstruction, JumpTableSize; -extern Boolean ChangedPC; +extern bool ChangedPC; #define CompilerWarning \ if (ShowErrors) DisplayError @@ -12,17 +12,17 @@ extern Boolean ChangedPC; #define Low16BitAccum 4 #define EntireAccum (Low16BitAccum | Middle16BitAccum | High16BitAccum) -Boolean WriteToAccum(int Location, int PC); -Boolean WriteToVectorDest(DWORD DestReg, int PC); -Boolean UseRspFlags(int PC); +bool WriteToAccum(int Location, int PC); +bool WriteToVectorDest(DWORD DestReg, int PC); +bool UseRspFlags(int PC); -Boolean DelaySlotAffectBranch(DWORD PC); -Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom); -Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp); -Boolean IsOpcodeNop(DWORD PC); +bool DelaySlotAffectBranch(DWORD PC); +bool CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom); +bool IsOpcodeBranch(DWORD PC, RSPOpcode RspOp); +bool IsOpcodeNop(DWORD PC); -Boolean IsNextInstructionMmx(DWORD PC); -Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant); +bool IsNextInstructionMmx(DWORD PC); +bool IsRegisterConstant(DWORD Reg, DWORD * Constant); void RSP_Element2Mmx(int MmxReg); void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2); @@ -35,7 +35,7 @@ void BuildRecompilerCPU(void); void CompilerRSPBlock(void); void CompilerToggleBuffer(void); -Boolean RSP_DoSections(void); +bool RSP_DoSections(void); typedef struct { @@ -54,7 +54,7 @@ extern RSP_BLOCK CurrentBlock; typedef struct { - Boolean bIsRegConst[32]; // Boolean toggle for constant + bool bIsRegConst[32]; // bool toggle for constant DWORD MipsRegConst[32]; // Value of register 32-bit DWORD BranchLabels[250]; DWORD LabelCount; @@ -69,15 +69,15 @@ extern RSP_CODE RspCode; typedef struct { - Boolean mmx, mmx2, sse; // CPU specs and compiling - Boolean bFlags; // RSP flag analysis - Boolean bReOrdering; // Instruction reordering - Boolean bSections; // Microcode sections - Boolean bDest; // Vector destination toggle - Boolean bAccum; // Accumulator toggle - Boolean bGPRConstants; // Analyze GPR constants - Boolean bAlignVector; // Align known vector loads - Boolean bAudioUcode; // Audio microcode analysis + bool mmx, mmx2, sse; // CPU specs and compiling + bool bFlags; // RSP flag analysis + bool bReOrdering; // Instruction reordering + bool bSections; // Microcode sections + bool bDest; // Vector destination toggle + bool bAccum; // Accumulator toggle + bool bGPRConstants; // Analyze GPR constants + bool bAlignVector; // Align known vector loads + bool bAudioUcode; // Audio microcode analysis } RSP_COMPILER; extern RSP_COMPILER Compiler; diff --git a/Source/Project64-rsp/Recompiler Ops.cpp b/Source/Project64-rsp/Recompiler Ops.cpp index b6b464dbc..3eccc8a6d 100644 --- a/Source/Project64-rsp/Recompiler Ops.cpp +++ b/Source/Project64-rsp/Recompiler Ops.cpp @@ -17,7 +17,7 @@ #pragma warning(disable : 4152) // Non-standard extension, function/data pointer conversion in expression -extern Boolean AudioHle, GraphicsHle; +extern bool AudioHle, GraphicsHle; UWORD32 Recp, RecpResult, SQroot, SQrootResult; DWORD ESP_RegSave = 0, EBP_RegSave = 0; DWORD BranchCompare = 0; @@ -161,7 +161,7 @@ void CompileBranchExit(DWORD TargetPC, DWORD ContinuePC) DWORD * X86Loc = NULL; NextInstruction = FINISH_SUB_BLOCK; - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchEqual", 0); X86Loc = (DWORD *)(RecompPos - 4); MoveConstToVariable(ContinuePC, PrgCount, "RSP PC"); @@ -251,7 +251,7 @@ void Compile_JAL(void) void Compile_BEQ(void) { - static Boolean bDelayAffect; + static bool bDelayAffect; if (NextInstruction == NORMAL) { @@ -262,7 +262,7 @@ void Compile_BEQ(void) return; } bDelayAffect = DelaySlotAffectBranch(CompilePC); - if (FALSE == bDelayAffect) + if (!bDelayAffect) { NextInstruction = DO_DELAY_SLOT; return; @@ -294,7 +294,7 @@ void Compile_BEQ(void) NextInstruction = FINISH_SUB_BLOCK; return; } - if (FALSE == bDelayAffect) + if (!bDelayAffect) { if (RSPOpC.rt == 0) { @@ -314,7 +314,7 @@ void Compile_BEQ(void) else { // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchEqual", 0); } Branch_AddRef(Target, (DWORD *)(RecompPos - 4)); @@ -334,7 +334,7 @@ void Compile_BEQ(void) void Compile_BNE(void) { - static Boolean bDelayAffect; + static bool bDelayAffect; if (NextInstruction == NORMAL) { @@ -346,7 +346,7 @@ void Compile_BNE(void) } bDelayAffect = DelaySlotAffectBranch(CompilePC); - if (FALSE == bDelayAffect) + if (!bDelayAffect) { NextInstruction = DO_DELAY_SLOT; return; @@ -377,7 +377,7 @@ void Compile_BNE(void) return; } - if (FALSE == bDelayAffect) + if (!bDelayAffect) { if (RSPOpC.rt == 0) { @@ -397,7 +397,7 @@ void Compile_BNE(void) else { // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchNotEqual", 0); } Branch_AddRef(Target, (DWORD *)(RecompPos - 4)); @@ -417,7 +417,7 @@ void Compile_BNE(void) void Compile_BLEZ(void) { - static Boolean bDelayAffect; + static bool bDelayAffect; if (NextInstruction == NORMAL) { @@ -428,7 +428,7 @@ void Compile_BLEZ(void) return; } bDelayAffect = DelaySlotAffectBranch(CompilePC); - if (FALSE == bDelayAffect) + if (!bDelayAffect) { NextInstruction = DO_DELAY_SLOT; return; @@ -448,7 +448,7 @@ void Compile_BLEZ(void) NextInstruction = FINISH_SUB_BLOCK; return; } - if (FALSE == bDelayAffect) + if (!bDelayAffect) { CompConstToVariable(0, &RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs)); JleLabel32("BranchLessEqual", 0); @@ -456,7 +456,7 @@ void Compile_BLEZ(void) else { // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchLessEqual", 0); } @@ -477,7 +477,7 @@ void Compile_BLEZ(void) void Compile_BGTZ(void) { - static Boolean bDelayAffect; + static bool bDelayAffect; if (NextInstruction == NORMAL) { @@ -488,7 +488,7 @@ void Compile_BGTZ(void) return; } bDelayAffect = DelaySlotAffectBranch(CompilePC); - if (FALSE == bDelayAffect) + if (!bDelayAffect) { NextInstruction = DO_DELAY_SLOT; return; @@ -506,7 +506,7 @@ void Compile_BGTZ(void) NextInstruction = FINISH_SUB_BLOCK; return; } - if (FALSE == bDelayAffect) + if (!bDelayAffect) { CompConstToVariable(0, &RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs)); JgLabel32("BranchGreater", 0); @@ -514,7 +514,7 @@ void Compile_BGTZ(void) else { // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchGreater", 0); } Branch_AddRef(Target, (DWORD *)(RecompPos - 4)); @@ -786,7 +786,7 @@ void Compile_LB(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { char Address[32]; DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) ^ 3; @@ -821,7 +821,7 @@ void Compile_LH(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) ^ 2; Addr &= 0xfff; @@ -894,7 +894,7 @@ void Compile_LW(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) & 0xfff; @@ -979,7 +979,7 @@ void Compile_LBU(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { char Address[32]; DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) ^ 3; @@ -1016,7 +1016,7 @@ void Compile_LHU(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) ^ 2; Addr &= 0xfff; @@ -1086,14 +1086,14 @@ void Compile_SB(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { char Address[32]; DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) ^ 3; Addr &= 0xfff; sprintf(Address, "DMEM + %Xh", Addr); - if (IsRegConst(RSPOpC.rt) == TRUE) + if (IsRegConst(RSPOpC.rt)) { MoveConstByteToVariable(MipsRegConst(RSPOpC.rt), RSPInfo.DMEM + Addr, Address); return; @@ -1106,7 +1106,7 @@ void Compile_SB(void) } } - if (IsRegConst(RSPOpC.rt) == TRUE) + if (IsRegConst(RSPOpC.rt)) { MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX); @@ -1141,7 +1141,7 @@ void Compile_SH(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) ^ 2; Addr &= 0xfff; @@ -1156,7 +1156,7 @@ void Compile_SH(void) { char Address[32]; sprintf(Address, "DMEM + %Xh", Addr); - if (IsRegConst(RSPOpC.rt) == TRUE) + if (IsRegConst(RSPOpC.rt)) { MoveConstHalfToVariable(MipsRegConst(RSPOpC.rt), RSPInfo.DMEM + Addr, Address); } @@ -1190,7 +1190,7 @@ void Compile_SH(void) XorConstToX86Reg(x86_EBX, 2); AndConstToX86Reg(x86_EBX, 0x0fff); - if (IsRegConst(RSPOpC.rt) == TRUE) + if (IsRegConst(RSPOpC.rt)) { MoveConstHalfToN64Mem(MipsRegConst(RSPOpC.rt), x86_EBX); } @@ -1216,7 +1216,7 @@ void Compile_SW(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { char Address[32]; DWORD Addr = (MipsRegConst(RSPOpC.base) + Offset) & 0xfff; @@ -1228,7 +1228,7 @@ void Compile_SW(void) DisplayError("There is a problem with:\nRSP_SW_DMEM"); return; } - if (IsRegConst(RSPOpC.rt) == TRUE) + if (IsRegConst(RSPOpC.rt)) { DWORD Value = MipsRegConst(RSPOpC.rt); sprintf(Address, "DMEM + %Xh", (Addr + 0) ^ 3); @@ -1251,7 +1251,7 @@ void Compile_SW(void) { sprintf(Address, "DMEM + %Xh", Addr); - if (IsRegConst(RSPOpC.rt) == TRUE) + if (IsRegConst(RSPOpC.rt)) { MoveConstToVariable(MipsRegConst(RSPOpC.rt), RSPInfo.DMEM + Addr, Address); } @@ -1306,7 +1306,7 @@ void Compile_SW(void) CompilerToggleBuffer(); - if (IsRegConst(RSPOpC.rt) == TRUE) + if (IsRegConst(RSPOpC.rt)) { MoveConstToN64Mem(MipsRegConst(RSPOpC.rt), x86_EBX); } @@ -1443,7 +1443,7 @@ void Compile_Special_JR(void) MoveVariableToX86reg(&RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs), x86_EAX); AndConstToX86Reg(x86_EAX, 0xFFC); MoveX86regToVariable(x86_EAX, PrgCount, "RSP PC"); - ChangedPC = TRUE; + ChangedPC = true; NextInstruction = DO_DELAY_SLOT; } else if (NextInstruction == DELAY_SLOT_DONE) @@ -1475,7 +1475,7 @@ void Compile_Special_JR(void) x86_SetBranch8b(Jump, RecompPos); CPU_Message(" Null:"); Ret(); - ChangedPC = FALSE; + ChangedPC = false; NextInstruction = FINISH_SUB_BLOCK; } else if (NextInstruction == DELAY_SLOT_EXIT_DONE) @@ -1856,7 +1856,7 @@ void Compile_Special_SLTU(void) void Compile_RegImm_BLTZ(void) { - static Boolean bDelayAffect; + static bool bDelayAffect; if (NextInstruction == NORMAL) { @@ -1867,7 +1867,7 @@ void Compile_RegImm_BLTZ(void) return; } bDelayAffect = DelaySlotAffectBranch(CompilePC); - if (FALSE == bDelayAffect) + if (!bDelayAffect) { NextInstruction = DO_DELAY_SLOT; return; @@ -1885,7 +1885,7 @@ void Compile_RegImm_BLTZ(void) NextInstruction = FINISH_SUB_BLOCK; return; } - if (FALSE == bDelayAffect) + if (!bDelayAffect) { CompConstToVariable(0, &RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs)); JlLabel32("BranchLess", 0); @@ -1893,7 +1893,7 @@ void Compile_RegImm_BLTZ(void) else { // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchLess", 0); } Branch_AddRef(Target, (DWORD *)(RecompPos - 4)); @@ -1913,7 +1913,7 @@ void Compile_RegImm_BLTZ(void) void Compile_RegImm_BGEZ(void) { - static Boolean bDelayAffect; + static bool bDelayAffect; if (NextInstruction == NORMAL) { @@ -1924,7 +1924,7 @@ void Compile_RegImm_BGEZ(void) return; } bDelayAffect = DelaySlotAffectBranch(CompilePC); - if (FALSE == bDelayAffect) + if (!bDelayAffect) { NextInstruction = DO_DELAY_SLOT; return; @@ -1944,7 +1944,7 @@ void Compile_RegImm_BGEZ(void) NextInstruction = FINISH_SUB_BLOCK; return; } - if (FALSE == bDelayAffect) + if (!bDelayAffect) { CompConstToVariable(0, &RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs)); JgeLabel32("BranchGreaterEqual", 0); @@ -1952,7 +1952,7 @@ void Compile_RegImm_BGEZ(void) else { // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchGreaterEqual", 0); } Branch_AddRef(Target, (DWORD *)(RecompPos - 4)); @@ -1996,7 +1996,7 @@ void Compile_RegImm_BLTZAL(void) } // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchLessEqual", 0); Branch_AddRef(Target, (DWORD *)(RecompPos - 4)); NextInstruction = FINISH_SUB_BLOCK; @@ -2015,7 +2015,7 @@ void Compile_RegImm_BLTZAL(void) void Compile_RegImm_BGEZAL(void) { - static Boolean bDelayAffect; + static bool bDelayAffect; if (NextInstruction == NORMAL) { @@ -2027,7 +2027,7 @@ void Compile_RegImm_BGEZAL(void) return; } bDelayAffect = DelaySlotAffectBranch(CompilePC); - if (FALSE == bDelayAffect) + if (!bDelayAffect) { NextInstruction = DO_DELAY_SLOT; return; @@ -2047,7 +2047,7 @@ void Compile_RegImm_BGEZAL(void) NextInstruction = FINISH_SUB_BLOCK; return; } - if (FALSE == bDelayAffect) + if (!bDelayAffect) { CompConstToVariable(0, &RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs)); JgeLabel32("BranchGreaterEqual", 0); @@ -2055,7 +2055,7 @@ void Compile_RegImm_BGEZAL(void) else { // Take a look at the branch compare variable - CompConstToVariable(TRUE, &BranchCompare, "BranchCompare"); + CompConstToVariable(true, &BranchCompare, "BranchCompare"); JeLabel32("BranchGreaterEqual", 0); } Branch_AddRef(Target, (DWORD *)(RecompPos - 4)); @@ -2513,7 +2513,7 @@ void RSP_Element2Mmx(int MmxReg) el = (RSPOpC.rs & 0x07) ^ 7; - if (IsMmx2Enabled == FALSE) + if (!IsMmx2Enabled) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, el); MoveVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[el], Reg, x86_ECX); @@ -2616,15 +2616,15 @@ void RSP_MultiElement2Mmx(int MmxReg1, int MmxReg2) } } -Boolean Compile_Vector_VMULF_MMX(void) +bool Compile_Vector_VMULF_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; // NOTE: Problem here is the lack of +/- 0x8000 rounding sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); @@ -2667,10 +2667,10 @@ Boolean Compile_Vector_VMULF_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VMULF(void) @@ -2678,9 +2678,9 @@ void Compile_Vector_VMULF(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); #ifndef CompileVmulf Cheat_r4300iOpcode(RSP_Vector_VMULF, "RSP_Vector_VMULF"); @@ -2689,24 +2689,24 @@ void Compile_Vector_VMULF(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VMULF_MMX()) + if (true == Compile_Vector_VMULF_MMX()) return; } - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { MoveConstToX86reg(0x7fff0000, x86_ESI); } - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { XorX86RegToX86Reg(x86_EDI, x86_EDI); } @@ -2727,7 +2727,7 @@ void Compile_Vector_VMULF(void) } else { - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -2738,7 +2738,7 @@ void Compile_Vector_VMULF(void) ShiftLeftSignImmed(x86_EAX, 1); AddConstToX86Reg(x86_EAX, 0x8000); - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { MoveX86regToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], "RSP_ACCUM[el].HW[1]"); // Calculate sign extension into EDX @@ -2748,12 +2748,12 @@ void Compile_Vector_VMULF(void) CompConstToX86reg(x86_EAX, 0x80008000); - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { CondMoveEqual(x86_EDX, x86_EDI); MoveX86regHalfToVariable(x86_EDX, &RSP_ACCUM[el].HW[3], "RSP_ACCUM[el].HW[3]"); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { CondMoveEqual(x86_EAX, x86_ESI); ShiftRightUnsignImmed(x86_EAX, 16); @@ -2767,15 +2767,15 @@ void Compile_Vector_VMULU(void) Cheat_r4300iOpcode(RSP_Vector_VMULU, "RSP_Vector_VMULU"); } -Boolean Compile_Vector_VMUDL_MMX(void) +bool Compile_Vector_VMUDL_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if (IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if (!IsMmx2Enabled) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -2818,10 +2818,10 @@ Boolean Compile_Vector_VMUDL_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VMUDL(void) @@ -2829,9 +2829,9 @@ void Compile_Vector_VMUDL(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); #ifndef CompileVmudl Cheat_r4300iOpcode(RSP_Vector_VMUDL, "RSP_Vector_VMUDL"); @@ -2840,20 +2840,20 @@ void Compile_Vector_VMUDL(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VMUDL_MMX()) + if (true == Compile_Vector_VMUDL_MMX()) return; } - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToAccum == TRUE) + if (bWriteToAccum) XorX86RegToX86Reg(x86_EDI, x86_EDI); for (count = 0; count < 8; count++) @@ -2865,7 +2865,7 @@ void Compile_Vector_VMUDL(void) sprintf(Reg, "RSP_Vect[%i].UHW[%i]", RSPOpC.rd, el); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].UHW[el], Reg, x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -2873,7 +2873,7 @@ void Compile_Vector_VMUDL(void) imulX86reg(x86_EBX); - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { sprintf(Reg, "RSP_ACCUM[%i].UW[0]", el); MoveX86regToVariable(x86_EAX, &RSP_ACCUM[el].UW[0], Reg); @@ -2881,7 +2881,7 @@ void Compile_Vector_VMUDL(void) MoveX86regToVariable(x86_EDI, &RSP_ACCUM[el].UW[1], Reg); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { ShiftRightUnsignImmed(x86_EAX, 16); sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); @@ -2890,15 +2890,15 @@ void Compile_Vector_VMUDL(void) } } -Boolean Compile_Vector_VMUDM_MMX(void) +bool Compile_Vector_VMUDM_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if (IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if (!IsMmx2Enabled) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -2972,10 +2972,10 @@ Boolean Compile_Vector_VMUDM_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VMUDM(void) @@ -2983,9 +2983,9 @@ void Compile_Vector_VMUDM(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); #ifndef CompileVmudm Cheat_r4300iOpcode(RSP_Vector_VMUDM, "RSP_Vector_VMUDM"); @@ -2994,13 +2994,13 @@ void Compile_Vector_VMUDM(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VMUDM_MMX()) + if (true == Compile_Vector_VMUDM_MMX()) return; } - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -3032,9 +3032,9 @@ void Compile_Vector_VMUDM(void) MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/ MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { - if (bWriteToDest == TRUE) + if (bWriteToDest) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -3047,7 +3047,7 @@ void Compile_Vector_VMUDM(void) imulX86reg(x86_EBX); - if (bWriteToAccum == FALSE && bWriteToDest == TRUE) + if (bWriteToAccum == false && bWriteToDest == true) { ShiftRightUnsignImmed(x86_EAX, 16); /*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); @@ -3060,14 +3060,14 @@ void Compile_Vector_VMUDM(void) ShiftRightSignImmed(x86_EDX, 16); ShiftLeftSignImmed(x86_EAX, 16); - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { sprintf(Reg, "RSP_ACCUM[%i].UW[0]", el); MoveX86regToVariable(x86_EAX, &RSP_ACCUM[el].UW[0], Reg); sprintf(Reg, "RSP_ACCUM[%i].UW[1]", el); MoveX86regToVariable(x86_EDX, &RSP_ACCUM[el].UW[1], Reg); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { /*sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EDX, &RSP_Vect[RSPOpC.sa].HW[el], Reg);*/ @@ -3079,15 +3079,15 @@ void Compile_Vector_VMUDM(void) Pop(x86_EBP); } -Boolean Compile_Vector_VMUDN_MMX(void) +bool Compile_Vector_VMUDN_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -3119,10 +3119,10 @@ Boolean Compile_Vector_VMUDN_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VMUDN(void) @@ -3130,9 +3130,9 @@ void Compile_Vector_VMUDN(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); #ifndef CompileVmudn Cheat_r4300iOpcode(RSP_Vector_VMUDN, "RSP_Vector_VMUDN"); @@ -3141,13 +3141,13 @@ void Compile_Vector_VMUDN(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VMUDN_MMX()) + if (true == Compile_Vector_VMUDN_MMX()) return; } - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -3168,7 +3168,7 @@ void Compile_Vector_VMUDN(void) MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].UHW[el], Reg, x86_EAX);*/ MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -3176,13 +3176,13 @@ void Compile_Vector_VMUDN(void) imulX86reg(x86_EBX); - if (bWriteToDest == TRUE) + if (bWriteToDest) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg); } - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { MoveX86RegToX86Reg(x86_EAX, x86_EDX); ShiftRightSignImmed(x86_EDX, 16); @@ -3196,15 +3196,15 @@ void Compile_Vector_VMUDN(void) Pop(x86_EBP); } -Boolean Compile_Vector_VMUDH_MMX(void) +bool Compile_Vector_VMUDH_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].HW[0], Reg); @@ -3274,10 +3274,10 @@ Boolean Compile_Vector_VMUDH_MMX(void) sprintf(Reg, "RSP_Vect[%i].HW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].HW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VMUDH(void) @@ -3285,9 +3285,9 @@ void Compile_Vector_VMUDH(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(EntireAccum, CompilePC); #ifndef CompileVmudh Cheat_r4300iOpcode(RSP_Vector_VMUDH, "RSP_Vector_VMUDH"); @@ -3296,13 +3296,13 @@ void Compile_Vector_VMUDH(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VMUDH_MMX()) + if (true == Compile_Vector_VMUDH_MMX()) return; } - if (bWriteToDest == FALSE && bOptimize == TRUE) + if (bWriteToDest == false && bOptimize == true) { Push(x86_EBP); sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd); @@ -3370,13 +3370,13 @@ void Compile_Vector_VMUDH(void) } else { - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -3394,20 +3394,20 @@ void Compile_Vector_VMUDH(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } imulX86reg(x86_EBX); - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { MoveX86regToVariable(x86_EAX, &RSP_ACCUM[el].W[1], "RSP_ACCUM[el].W[1]"); MoveConstToVariable(0, &RSP_ACCUM[el].W[0], "RSP_ACCUM[el].W[0]"); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { CompX86RegToX86Reg(x86_EAX, x86_ESI); CondMoveGreater(x86_EAX, x86_ESI); @@ -3426,8 +3426,8 @@ void Compile_Vector_VMACF(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); #ifndef CompileVmacf Cheat_r4300iOpcode(RSP_Vector_VMACF, "RSP_Vector_VMACF"); @@ -3436,7 +3436,7 @@ void Compile_Vector_VMACF(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -3444,7 +3444,7 @@ void Compile_Vector_VMACF(void) MoveConstToX86reg(0x00007fff, x86_ESI); MoveConstToX86reg(0xFFFF8000, x86_EDI); } - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -3461,7 +3461,7 @@ void Compile_Vector_VMACF(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -3476,7 +3476,7 @@ void Compile_Vector_VMACF(void) AddX86regToVariable(x86_EAX, &RSP_ACCUM[el].W[0], "RSP_ACCUM[el].W[0]"); AdcX86regToVariable(x86_EDX, &RSP_ACCUM[el].W[1], "RSP_ACCUM[el].W[1]"); - if (bWriteToDest == TRUE) + if (bWriteToDest) { MoveVariableToX86reg(&RSP_ACCUM[el].W[1], "RSP_ACCUM[el].W[1]", x86_EAX); @@ -3506,8 +3506,8 @@ void Compile_Vector_VMADL(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); #ifndef CompileVmadl Cheat_r4300iOpcode(RSP_Vector_VMADL, "RSP_Vector_VMADL"); @@ -3516,14 +3516,14 @@ void Compile_Vector_VMADL(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -3544,7 +3544,7 @@ void Compile_Vector_VMADL(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -3556,7 +3556,7 @@ void Compile_Vector_VMADL(void) sprintf(Reg, "RSP_ACCUM[%i].W[1]", el); AdcConstToVariable(&RSP_ACCUM[el].W[1], Reg, 0); - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { XorX86RegToX86Reg(x86_EDX, x86_EDX); MoveVariableToX86reg(&RSP_ACCUM[el].W[1], "RSP_ACCUM[el].W[1]", x86_EAX); @@ -3572,7 +3572,7 @@ void Compile_Vector_VMADL(void) } } - if (bWriteToDest == TRUE) + if (bWriteToDest) { Pop(x86_EBP); } @@ -3583,8 +3583,8 @@ void Compile_Vector_VMADM(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); #ifndef CompileVmadm Cheat_r4300iOpcode(RSP_Vector_VMADM, "RSP_Vector_VMADM"); @@ -3593,13 +3593,13 @@ void Compile_Vector_VMADM(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -3633,9 +3633,9 @@ void Compile_Vector_VMADM(void) MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/ MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { - if (bWriteToDest == TRUE) + if (bWriteToDest) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], "RSP_Vect[RSPOpC.rt].HW[del]", x86_EBX); @@ -3654,7 +3654,7 @@ void Compile_Vector_VMADM(void) AddX86regToVariable(x86_EAX, &RSP_ACCUM[el].W[0], "RSP_ACCUM[el].W[0]"); AdcX86regToVariable(x86_EDX, &RSP_ACCUM[el].W[1], "RSP_ACCUM[el].W[1]"); - if (bWriteToDest == TRUE) + if (bWriteToDest) { // For compare sprintf(Reg, "RSP_ACCUM[%i].W[1]", el); @@ -3679,8 +3679,8 @@ void Compile_Vector_VMADN(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); #ifndef CompileVmadn Cheat_r4300iOpcode(RSP_Vector_VMADN, "RSP_Vector_VMADN"); @@ -3689,13 +3689,13 @@ void Compile_Vector_VMADN(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -3718,7 +3718,7 @@ void Compile_Vector_VMADN(void) MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].UHW[el], Reg, x86_EAX);*/ MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -3732,7 +3732,7 @@ void Compile_Vector_VMADN(void) AddX86regToVariable(x86_EAX, &RSP_ACCUM[el].W[0], "RSP_ACCUM[el].W[0]"); AdcX86regToVariable(x86_EDX, &RSP_ACCUM[el].W[1], "RSP_ACCUM[el].W[1]"); - if (bWriteToDest == TRUE) + if (bWriteToDest) { // For compare sprintf(Reg, "RSP_ACCUM[%i].W[1]", el); @@ -3760,8 +3760,8 @@ void Compile_Vector_VMADH(void) char Reg[256]; int count, el, del; - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); #ifndef CompileVmadh Cheat_r4300iOpcode(RSP_Vector_VMADH, "RSP_Vector_VMADH"); @@ -3770,14 +3770,14 @@ void Compile_Vector_VMADH(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -3786,7 +3786,7 @@ void Compile_Vector_VMADH(void) MoveConstToX86reg(0xFFFF8000, x86_EDI); } - if (bWriteToDest == FALSE && bOptimize == TRUE) + if (bWriteToDest == false && bOptimize == true) { Push(x86_EBP); sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd); @@ -3863,9 +3863,9 @@ void Compile_Vector_VMADH(void) MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/ MoveSxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { - if (bWriteToDest == TRUE) + if (bWriteToDest) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -3880,7 +3880,7 @@ void Compile_Vector_VMADH(void) sprintf(Reg, "RSP_ACCUM[%i].W[1]", el); AddX86regToVariable(x86_EAX, &RSP_ACCUM[el].W[1], Reg); - if (bWriteToDest == TRUE) + if (bWriteToDest) { MoveVariableToX86reg(&RSP_ACCUM[el].W[1], "RSP_ACCUM[el].W[1]", x86_EAX); @@ -3898,15 +3898,15 @@ void Compile_Vector_VMADH(void) } } -Boolean Compile_Vector_VADD_MMX(void) +bool Compile_Vector_VADD_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -3946,12 +3946,12 @@ Boolean Compile_Vector_VADD_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) != TRUE) + if (IsNextInstructionMmx(CompilePC) != true) { MmxEmptyMultimediaState(); } - return TRUE; + return true; } void Compile_Vector_VADD(void) @@ -3959,10 +3959,10 @@ void Compile_Vector_VADD(void) char Reg[256]; int count, el, del; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bElement = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); - Boolean bFlagUseage = UseRspFlags(CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bElement = (RSPOpC.rs & 8) ? true : false; + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bFlagUseage = UseRspFlags(CompilePC); #ifndef CompileVadd Cheat_r4300iOpcode(RSP_Vector_VADD, "RSP_Vector_VADD"); @@ -3971,19 +3971,19 @@ void Compile_Vector_VADD(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE && bFlagUseage == FALSE) + if (bWriteToAccum == false && bFlagUseage == false) { - if (TRUE == Compile_Vector_VADD_MMX()) + if (true == Compile_Vector_VADD_MMX()) return; } - if (bElement == TRUE) + if (bElement == true) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -4006,7 +4006,7 @@ void Compile_Vector_VADD(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bElement == FALSE) + if (bElement == false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -4018,12 +4018,12 @@ void Compile_Vector_VADD(void) AdcX86RegToX86Reg(x86_EAX, x86_EBX); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); } - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { CompX86RegToX86Reg(x86_EAX, x86_ESI); CondMoveGreater(x86_EAX, x86_ESI); @@ -4038,15 +4038,15 @@ void Compile_Vector_VADD(void) Pop(x86_EBP); } -Boolean Compile_Vector_VSUB_MMX(void) +bool Compile_Vector_VSUB_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -4085,12 +4085,12 @@ Boolean Compile_Vector_VSUB_MMX(void) MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[RSPOpC.sa].UHW[0], Reg); sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) != TRUE) + if (IsNextInstructionMmx(CompilePC) != true) { MmxEmptyMultimediaState(); } - return TRUE; + return true; } void Compile_Vector_VSUB(void) @@ -4098,10 +4098,10 @@ void Compile_Vector_VSUB(void) char Reg[256]; int count, el, del; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bOptimize = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); - Boolean bFlagUseage = UseRspFlags(CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bOptimize = (RSPOpC.rs & 8) ? true : false; + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bFlagUseage = UseRspFlags(CompilePC); #ifndef CompileVsub Cheat_r4300iOpcode(RSP_Vector_VSUB, "RSP_Vector_VSUB"); @@ -4110,9 +4110,9 @@ void Compile_Vector_VSUB(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE && bFlagUseage == FALSE) + if (bWriteToAccum == false && bFlagUseage == false) { - if (TRUE == Compile_Vector_VSUB_MMX()) + if (true == Compile_Vector_VSUB_MMX()) return; } @@ -4122,14 +4122,14 @@ void Compile_Vector_VSUB(void) XorX86RegToX86Reg(x86_ECX, x86_ECX); MoveVariableToX86reg(&RSP_Flags[0].UW, "RSP_Flags[0].UW", x86_EBP); - if (bOptimize == TRUE) + if (bOptimize) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); } - if (bWriteToDest == TRUE) + if (bWriteToDest) { // Prepare for conditional moves @@ -4145,7 +4145,7 @@ void Compile_Vector_VSUB(void) del = EleSpec[RSPOpC.rs].B[el]; MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], "RSP_Vect[RSPOpC.rd].HW[el]", x86_EAX); - if (bOptimize == FALSE) + if (!bOptimize) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveSxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -4157,13 +4157,13 @@ void Compile_Vector_VSUB(void) SbbX86RegToX86Reg(x86_EAX, x86_EBX); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); } - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { CompX86RegToX86Reg(x86_EAX, x86_ESI); CondMoveGreater(x86_EAX, x86_ESI); @@ -4179,15 +4179,15 @@ void Compile_Vector_VSUB(void) Pop(x86_EBP); } -Boolean Compile_Vector_VABS_MMX(void) +bool Compile_Vector_VABS_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -4260,12 +4260,12 @@ Boolean Compile_Vector_VABS_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) != TRUE) + if (IsNextInstructionMmx(CompilePC) != true) { MmxEmptyMultimediaState(); } - return TRUE; + return true; } void Compile_Vector_VABS(void) @@ -4273,8 +4273,8 @@ void Compile_Vector_VABS(void) int count, el, del; char Reg[256]; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVabs Cheat_r4300iOpcode(RSP_Vector_VABS, "RSP_Vector_VABS"); @@ -4283,9 +4283,9 @@ void Compile_Vector_VABS(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VABS_MMX()) + if (true == Compile_Vector_VABS_MMX()) return; } @@ -4318,12 +4318,12 @@ void Compile_Vector_VABS(void) CompConstToX86reg(x86_EAX, 0); CondMoveLess(x86_EAX, x86_EBX); - if (bWriteToDest == TRUE) + if (bWriteToDest) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg); } - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); @@ -4355,12 +4355,12 @@ void Compile_Vector_VABS(void) CondMoveGreaterEqual(x86_EDI, x86_ECX); CondMoveLess(x86_EDI, x86_EBX); - if (bWriteToDest == TRUE) + if (bWriteToDest) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EDI, &RSP_Vect[RSPOpC.sa].HW[el], Reg); } - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EDI, &RSP_ACCUM[el].HW[1], Reg); @@ -4374,9 +4374,9 @@ void Compile_Vector_VADDC(void) char Reg[256]; int count, el, del; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); - Boolean bElement = (RSPOpC.rs & 8) ? TRUE : FALSE; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bElement = (RSPOpC.rs & 8) ? true : false; #ifndef CompileVaddc Cheat_r4300iOpcode(RSP_Vector_VADDC, "RSP_Vector_VADDC"); @@ -4385,7 +4385,7 @@ void Compile_Vector_VADDC(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bElement == TRUE) + if (bElement == true) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -4409,7 +4409,7 @@ void Compile_Vector_VADDC(void) MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX);*/ MoveZxX86RegPtrDispToX86RegHalf(x86_EBP, (BYTE)(el * 2), x86_EAX); - if (bElement == FALSE) + if (bElement == false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -4426,13 +4426,13 @@ void Compile_Vector_VADDC(void) } OrX86RegToX86Reg(x86_ECX, x86_EDX); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); } - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg); @@ -4447,9 +4447,9 @@ void Compile_Vector_VSUBC(void) char Reg[256]; int count, el, del; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); - Boolean bElement = (RSPOpC.rs & 8) ? TRUE : FALSE; + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bElement = (RSPOpC.rs & 8) ? true : false; #ifndef CompileVsubc Cheat_r4300iOpcode(RSP_Vector_VSUBC, "RSP_Vector_VSUBC"); @@ -4458,7 +4458,7 @@ void Compile_Vector_VSUBC(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bElement == TRUE) + if (bElement == true) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -4477,7 +4477,7 @@ void Compile_Vector_VSUBC(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bElement == FALSE) + if (bElement == false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); MoveZxVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EBX); @@ -4497,12 +4497,12 @@ void Compile_Vector_VSUBC(void) ShiftLeftSignImmed(x86_EDX, (BYTE)(7 - el)); OrX86RegToX86Reg(x86_ECX, x86_EDX); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); } - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg); @@ -4569,8 +4569,8 @@ void Compile_Vector_VSAW(void) void Compile_Vector_VLT(void) { - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); BYTE * jump[3]; DWORD flag; char Reg[256]; @@ -4650,7 +4650,7 @@ void Compile_Vector_VLT(void) MoveConstToVariable(0, &RSP_Flags[0].UW, "RSP_Flags[0].UW"); MoveX86regToVariable(x86_EBX, &RSP_Flags[1].UW, "RSP_Flags[1].UW"); - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { for (el = 0; el < 8; el += 2) { @@ -4671,8 +4671,8 @@ void Compile_Vector_VLT(void) void Compile_Vector_VEQ(void) { - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); DWORD flag; char Reg[256]; int count, el, del, last = -1; @@ -4727,7 +4727,7 @@ void Compile_Vector_VEQ(void) MoveConstToVariable(0, &RSP_Flags[0].UW, "RSP_Flags[0].UW"); MoveX86regToVariable(x86_EBX, &RSP_Flags[1].UW, "RSP_Flags[1].UW"); - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { for (count = 0; count < 8; count++) { @@ -4748,8 +4748,8 @@ void Compile_Vector_VEQ(void) void Compile_Vector_VNE(void) { - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); DWORD flag; char Reg[256]; int el, del, last = -1; @@ -4803,7 +4803,7 @@ void Compile_Vector_VNE(void) MoveConstToVariable(0, &RSP_Flags[0].UW, "RSP_Flags[0].UW"); MoveX86regToVariable(x86_EBX, &RSP_Flags[1].UW, "RSP_Flags[1].UW"); - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { for (el = 0; el < 4; el++) { @@ -4816,12 +4816,12 @@ void Compile_Vector_VNE(void) } } -Boolean Compile_Vector_VGE_MMX(void) +bool Compile_Vector_VGE_MMX(void) { char Reg[256]; - if ((RSPOpC.rs & 0xF) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if ((RSPOpC.rs & 0xF) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); MoveConstToVariable(0, &RSP_Flags[1].UW, "RSP_Flags[1].UW"); @@ -4860,22 +4860,22 @@ Boolean Compile_Vector_VGE_MMX(void) MmxPorRegToReg(x86_MM0, x86_MM2); MmxPorRegToReg(x86_MM1, x86_MM3); MoveConstToVariable(0, &RSP_Flags[0].UW, "RSP_Flags[0].UW"); - return TRUE; + return true; } void Compile_Vector_VGE(void) { /* - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); /* TODO: works ok, but needs careful flag analysis */ /* #if defined (DLIST) - if (bWriteToAccum == FALSE && TRUE == Compile_Vector_VGE_MMX()) { + if (bWriteToAccum == false && true == Compile_Vector_VGE_MMX()) { return; } #endif */ - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); BYTE * jump[3]; DWORD flag; char Reg[256]; @@ -4958,7 +4958,7 @@ void Compile_Vector_VGE(void) MoveConstToVariable(0, &RSP_Flags[0].UW, "RSP_Flags[0].UW"); MoveX86regToVariable(x86_EBX, &RSP_Flags[1].UW, "RSP_Flags[1].UW"); - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { for (el = 0; el < 8; el += 2) { @@ -4996,7 +4996,7 @@ void Compile_Vector_VMRG(void) { char Reg[256]; int count, el, del; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVmrg Cheat_r4300iOpcode(RSP_Vector_VMRG, "RSP_Vector_VMRG"); @@ -5021,7 +5021,7 @@ void Compile_Vector_VMRG(void) CondMoveNotEqual(x86_ECX, x86_EAX); CondMoveEqual(x86_ECX, x86_EBX); - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_ECX, &RSP_ACCUM[el].HW[1], Reg); @@ -5031,15 +5031,15 @@ void Compile_Vector_VMRG(void) } } -Boolean Compile_Vector_VAND_MMX(void) +bool Compile_Vector_VAND_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -5071,19 +5071,19 @@ Boolean Compile_Vector_VAND_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VAND(void) { char Reg[256]; int el, del, count; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bElement = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bElement = (RSPOpC.rs & 8) ? true : false; + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVand Cheat_r4300iOpcode(RSP_Vector_VAND, "RSP_Vector_VAND"); @@ -5092,13 +5092,13 @@ void Compile_Vector_VAND(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VAND_MMX()) + if (true == Compile_Vector_VAND_MMX()) return; } - if (bElement == TRUE) + if (bElement == true) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -5115,7 +5115,7 @@ void Compile_Vector_VAND(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bElement == FALSE) + if (bElement == false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); AndVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EAX); @@ -5125,13 +5125,13 @@ void Compile_Vector_VAND(void) AndX86RegHalfToX86RegHalf(x86_EAX, x86_EBX); } - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg); } - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); @@ -5139,15 +5139,15 @@ void Compile_Vector_VAND(void) } } -Boolean Compile_Vector_VNAND_MMX(void) +bool Compile_Vector_VNAND_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -5182,19 +5182,19 @@ Boolean Compile_Vector_VNAND_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VNAND(void) { char Reg[256]; int el, del, count; - Boolean bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); - Boolean bElement = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToDest = WriteToVectorDest(RSPOpC.sa, CompilePC); + bool bElement = (RSPOpC.rs & 8) ? true : false; + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVnand Cheat_r4300iOpcode(RSP_Vector_VNAND, "RSP_Vector_VNAND"); @@ -5203,13 +5203,13 @@ void Compile_Vector_VNAND(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VNAND_MMX()) + if (true == Compile_Vector_VNAND_MMX()) return; } - if (bElement == TRUE) + if (bElement == true) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -5226,7 +5226,7 @@ void Compile_Vector_VNAND(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bElement == FALSE) + if (bElement == false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); AndVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EAX); @@ -5238,13 +5238,13 @@ void Compile_Vector_VNAND(void) NotX86reg(x86_EAX); - if (bWriteToDest != FALSE) + if (bWriteToDest != false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.sa, el); MoveX86regHalfToVariable(x86_EAX, &RSP_Vect[RSPOpC.sa].HW[el], Reg); } - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); @@ -5252,15 +5252,15 @@ void Compile_Vector_VNAND(void) } } -Boolean Compile_Vector_VOR_MMX(void) +bool Compile_Vector_VOR_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -5295,18 +5295,18 @@ Boolean Compile_Vector_VOR_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VOR(void) { char Reg[256]; int el, del, count; - Boolean bElement = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bElement = (RSPOpC.rs & 8) ? true : false; + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVor Cheat_r4300iOpcode(RSP_Vector_VOR, "RSP_Vector_VOR"); @@ -5315,13 +5315,13 @@ void Compile_Vector_VOR(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VOR_MMX()) + if (true == Compile_Vector_VOR_MMX()) return; } - if (bElement == TRUE) + if (bElement == true) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -5338,7 +5338,7 @@ void Compile_Vector_VOR(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bElement == FALSE) + if (bElement == false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); OrVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EAX); @@ -5348,7 +5348,7 @@ void Compile_Vector_VOR(void) OrX86RegToX86Reg(x86_EAX, x86_EBX); } - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); @@ -5358,15 +5358,15 @@ void Compile_Vector_VOR(void) } } -Boolean Compile_Vector_VNOR_MMX(void) +bool Compile_Vector_VNOR_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rd); MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rd].UHW[0], Reg); @@ -5401,18 +5401,18 @@ Boolean Compile_Vector_VNOR_MMX(void) sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.sa); MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VNOR(void) { char Reg[256]; int el, del, count; - Boolean bElement = (RSPOpC.rs & 8) ? TRUE : FALSE; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bElement = (RSPOpC.rs & 8) ? true : false; + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVnor Cheat_r4300iOpcode(RSP_Vector_VNOR, "RSP_Vector_VNOR"); @@ -5421,13 +5421,13 @@ void Compile_Vector_VNOR(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (bWriteToAccum == FALSE) + if (!bWriteToAccum) { - if (TRUE == Compile_Vector_VNOR_MMX()) + if (true == Compile_Vector_VNOR_MMX()) return; } - if (bElement == TRUE) + if (bElement == true) { del = (RSPOpC.rs & 0x07) ^ 7; sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); @@ -5444,7 +5444,7 @@ void Compile_Vector_VNOR(void) sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rd, el); MoveVariableToX86regHalf(&RSP_Vect[RSPOpC.rd].HW[el], Reg, x86_EAX); - if (bElement == FALSE) + if (bElement == false) { sprintf(Reg, "RSP_Vect[%i].HW[%i]", RSPOpC.rt, del); OrVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].HW[del], Reg, x86_EAX); @@ -5456,7 +5456,7 @@ void Compile_Vector_VNOR(void) NotX86reg(x86_EAX); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { sprintf(Reg, "RSP_ACCUM[%i].HW[1]", el); MoveX86regHalfToVariable(x86_EAX, &RSP_ACCUM[el].HW[1], Reg); @@ -5466,15 +5466,15 @@ void Compile_Vector_VNOR(void) } } -Boolean Compile_Vector_VXOR_MMX(void) +bool Compile_Vector_VXOR_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; if ((RSPOpC.rs & 0xF) < 2 && (RSPOpC.rd == RSPOpC.rt)) { @@ -5523,10 +5523,10 @@ Boolean Compile_Vector_VXOR_MMX(void) MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); } - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VXOR(void) @@ -5534,15 +5534,15 @@ void Compile_Vector_VXOR(void) #ifdef CompileVxor char Reg[256]; DWORD count; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); if (!bWriteToAccum || ((RSPOpC.rs & 0xF) < 2 && RSPOpC.rd == RSPOpC.rt)) { - if (TRUE == Compile_Vector_VXOR_MMX()) + if (true == Compile_Vector_VXOR_MMX()) { - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { XorX86RegToX86Reg(x86_EAX, x86_EAX); for (count = 0; count < 8; count++) @@ -5559,15 +5559,15 @@ void Compile_Vector_VXOR(void) Cheat_r4300iOpcodeNoMessage(RSP_Vector_VXOR, "RSP_Vector_VXOR"); } -Boolean Compile_Vector_VNXOR_MMX(void) +bool Compile_Vector_VNXOR_MMX(void) { char Reg[256]; // Do our MMX checks here - if (IsMmxEnabled == FALSE) - return FALSE; - if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE) - return FALSE; + if (!IsMmxEnabled) + return false; + if ((RSPOpC.rs & 0x0f) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == false) + return false; if ((RSPOpC.rs & 0xF) < 2 && (RSPOpC.rd == RSPOpC.rt)) { @@ -5619,10 +5619,10 @@ Boolean Compile_Vector_VNXOR_MMX(void) MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[RSPOpC.sa].UHW[4], Reg); } - if (IsNextInstructionMmx(CompilePC) == FALSE) + if (!IsNextInstructionMmx(CompilePC)) MmxEmptyMultimediaState(); - return TRUE; + return true; } void Compile_Vector_VNXOR(void) @@ -5630,15 +5630,15 @@ void Compile_Vector_VNXOR(void) #ifdef CompileVnxor char Reg[256]; DWORD count; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); if (!bWriteToAccum || ((RSPOpC.rs & 0xF) < 2 && RSPOpC.rd == RSPOpC.rt)) { - if (TRUE == Compile_Vector_VNXOR_MMX()) + if (true == Compile_Vector_VNXOR_MMX()) { - if (bWriteToAccum == TRUE) + if (bWriteToAccum) { OrConstToX86Reg(0xFFFFFFFF, x86_EAX); for (count = 0; count < 8; count++) @@ -5659,7 +5659,7 @@ void Compile_Vector_VRCP(void) { char Reg[256]; int count, el, last; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); DWORD * end = NULL; #ifndef CompileVrcp @@ -5700,7 +5700,7 @@ void Compile_Vector_VRCP(void) x86_SetBranch32b(end, RecompPos); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { last = -1; for (count = 0; count < 8; count++) @@ -5729,7 +5729,7 @@ void Compile_Vector_VRCPL(void) { char Reg[256]; int count, el, last; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); DWORD * end = NULL; #ifndef CompileVrcpl @@ -5777,7 +5777,7 @@ void Compile_Vector_VRCPL(void) x86_SetBranch32b(end, RecompPos); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { last = -1; for (count = 0; count < 8; count++) @@ -5806,7 +5806,7 @@ void Compile_Vector_VRCPH(void) { char Reg[256]; int count, el, last; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVrcph Cheat_r4300iOpcode(RSP_Vector_VRCPH, "RSP_Vector_VRCPH"); @@ -5822,7 +5822,7 @@ void Compile_Vector_VRCPH(void) MoveVariableToX86regHalf(&RecpResult.UHW[1], "RecpResult.UHW[1]", x86_ECX); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { last = -1; for (count = 0; count < 8; count++) @@ -5850,7 +5850,7 @@ void Compile_Vector_VMOV(void) { char Reg[256]; int el, count; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVmov Cheat_r4300iOpcode(RSP_Vector_VMOV, "RSP_Vector_VMOV"); return; @@ -5896,7 +5896,7 @@ void Compile_Vector_VRSQH(void) { char Reg[256]; int count, el, last; - Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); + bool bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC); #ifndef CompileVrsqh Cheat_r4300iOpcode(RSP_Vector_VRSQH, "RSP_Vector_VRSQH"); @@ -5912,7 +5912,7 @@ void Compile_Vector_VRSQH(void) MoveVariableToX86regHalf(&SQrootResult.UHW[1], "SQrootResult.UHW[1]", x86_ECX); - if (bWriteToAccum != FALSE) + if (bWriteToAccum != false) { last = -1; for (count = 0; count < 8; count++) @@ -5983,7 +5983,7 @@ void Compile_Opcode_LSV(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -6013,7 +6013,7 @@ void Compile_Opcode_LSV(void) if (offset != 0) AddConstToX86Reg(x86_EBX, offset); AndConstToX86Reg(x86_EBX, 0x0FFF); - if (Compiler.bAlignVector == TRUE) + if (Compiler.bAlignVector == true) { XorConstToX86Reg(x86_EBX, 2); MoveN64MemToX86regHalf(x86_ECX, x86_EBX); @@ -6057,7 +6057,7 @@ void Compile_Opcode_LLV(void) return; } - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -6130,7 +6130,7 @@ void Compile_Opcode_LDV(void) return; } - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -6238,7 +6238,7 @@ void Compile_Opcode_LQV(void) return; } - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -6251,7 +6251,7 @@ void Compile_Opcode_LQV(void) // Aligned store - if (IsSseEnabled == FALSE) + if (IsSseEnabled == false) { sprintf(Reg, "DMEM+%Xh+0", Addr); MoveVariableToX86reg(RSPInfo.DMEM + Addr + 0, Reg, x86_EAX); @@ -6301,7 +6301,7 @@ void Compile_Opcode_LQV(void) CompilerToggleBuffer(); AndConstToX86Reg(x86_EBX, 0x0fff); - if (IsSseEnabled == FALSE) + if (IsSseEnabled == false) { MoveN64MemDispToX86reg(x86_EAX, x86_EBX, 0); MoveN64MemDispToX86reg(x86_ECX, x86_EBX, 4); @@ -6349,7 +6349,7 @@ void Compile_Opcode_LRV(void) MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX); if (offset != 0) AddConstToX86Reg(x86_EBX, offset); - if (Compiler.bAlignVector == FALSE) + if (Compiler.bAlignVector == false) { TestConstToX86Reg(1, x86_EBX); JneLabel32("Unaligned", 0); @@ -6399,7 +6399,7 @@ void Compile_Opcode_LRV(void) JneLabel8("Loop", 0); x86_SetBranch8b(RecompPos - 1, Loop); - if (Compiler.bAlignVector == FALSE) + if (Compiler.bAlignVector == false) { CPU_Message(" Done:"); x86_SetBranch32b((DWORD *)Jump[1], (DWORD *)RecompPos); @@ -6770,7 +6770,7 @@ void Compile_Opcode_SSV(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -6800,7 +6800,7 @@ void Compile_Opcode_SSV(void) if (offset != 0) AddConstToX86Reg(x86_EBX, offset); AndConstToX86Reg(x86_EBX, 0x0FFF); - if (Compiler.bAlignVector == TRUE) + if (Compiler.bAlignVector == true) { sprintf(Reg, "RSP_Vect[%i].B[%i]", RSPOpC.rt, 15 - (RSPOpC.del + 1)); MoveVariableToX86regHalf(&RSP_Vect[RSPOpC.rt].B[15 - (RSPOpC.del + 1)], Reg, x86_ECX); @@ -6841,7 +6841,7 @@ void Compile_Opcode_SLV(void) // return; // } - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -6909,7 +6909,7 @@ void Compile_Opcode_SDV(void) CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str()); - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -6996,7 +6996,7 @@ void Compile_Opcode_SQV(void) return; } - if (IsRegConst(RSPOpC.base) == TRUE) + if (IsRegConst(RSPOpC.base)) { DWORD Addr = (MipsRegConst(RSPOpC.base) + offset) & 0xfff; @@ -7009,7 +7009,7 @@ void Compile_Opcode_SQV(void) // Aligned store - if (IsSseEnabled == FALSE) + if (IsSseEnabled == false) { if (RSPOpC.del == 12) { @@ -7079,7 +7079,7 @@ void Compile_Opcode_SQV(void) CompilerToggleBuffer(); AndConstToX86Reg(x86_EBX, 0x0fff); - if (IsSseEnabled == FALSE) + if (IsSseEnabled == false) { if (RSPOpC.del == 12) { diff --git a/Source/Project64-rsp/Recompiler Sections.cpp b/Source/Project64-rsp/Recompiler Sections.cpp index c8d72cdf1..55ac55575 100644 --- a/Source/Project64-rsp/Recompiler Sections.cpp +++ b/Source/Project64-rsp/Recompiler Sections.cpp @@ -829,7 +829,7 @@ void RSP_Sections_VMACF(RSPOpcode RspOp, DWORD AccumStyle) static DWORD Section_000_VMADN; // Yeah I know, but leave it -Boolean Check_Section_000(void) +bool Check_Section_000(void) { DWORD i; RSPOpcode op0, op1; @@ -842,7 +842,7 @@ Boolean Check_Section_000(void) if (!(op0.op == RSP_CP2 && (op0.rs & 0x10) != 0 && op0.funct == RSP_VECTOR_VMUDN)) { - return FALSE; + return false; } Section_000_VMADN = 0; @@ -859,28 +859,28 @@ Boolean Check_Section_000(void) Section_000_VMADN++; } - if ((op1.rs & 0xF) >= 2 && (op1.rs & 0xF) <= 7 && IsMmx2Enabled == FALSE) + if ((op1.rs & 0xF) >= 2 && (op1.rs & 0xF) <= 7 && IsMmx2Enabled == false) { - return FALSE; + return false; } } // We need at least 1 VMADN if (Section_000_VMADN == 0) { - return FALSE; + return false; } // TODO: check destination and flushes - if (TRUE == WriteToAccum(7, CompilePC + 0x4 + (Section_000_VMADN * 4) - 0x4)) + if (true == WriteToAccum(7, CompilePC + 0x4 + (Section_000_VMADN * 4) - 0x4)) { - return FALSE; + return false; } - if (IsMmxEnabled == FALSE) + if (!IsMmxEnabled) { - return FALSE; + return false; } - return TRUE; + return true; } void Compile_Section_000(void) @@ -925,7 +925,7 @@ void Compile_Section_000(void) RSP_LW_IMEM(CompilePC, &vmadn.Value); CompilePC += 4; RSP_Sections_VMADN(vmadn, Low16BitAccum); - if (WriteToVectorDest(vmadn.sa, CompilePC - 4) == TRUE) + if (WriteToVectorDest(vmadn.sa, CompilePC - 4) == true) { sprintf(Reg, "RSP_Vect[%i].HW[0]", vmadn.sa); MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmadn.sa].HW[0], Reg); @@ -944,7 +944,7 @@ void Compile_Section_000(void) static DWORD Section_001_VMACF; -Boolean Check_Section_001(void) +bool Check_Section_001(void) { DWORD i; RSPOpcode op0, op1; @@ -957,7 +957,7 @@ Boolean Check_Section_001(void) if (!(op0.op == RSP_CP2 && (op0.rs & 0x10) != 0 && op0.funct == RSP_VECTOR_VMULF)) { - return FALSE; + return false; } Section_001_VMACF = 0; @@ -974,30 +974,30 @@ Boolean Check_Section_001(void) Section_001_VMACF++; } - if ((op1.rs & 0xF) >= 2 && (op1.rs & 0xF) <= 7 && IsMmx2Enabled == FALSE) + if ((op1.rs & 0xF) >= 2 && (op1.rs & 0xF) <= 7 && IsMmx2Enabled == false) { - return FALSE; + return false; } } // We need at least 1 VMACF if (Section_001_VMACF == 0) { - return FALSE; + return false; } - if (IsMmxEnabled == FALSE) + if (!IsMmxEnabled) { - return FALSE; + return false; } // Destinations are checked elsewhere, this is fine - if (TRUE == WriteToAccum(7, CompilePC + 0x4 + (Section_001_VMACF * 4) - 0x4)) + if (true == WriteToAccum(7, CompilePC + 0x4 + (Section_001_VMACF * 4) - 0x4)) { - return FALSE; + return false; } - return TRUE; + return true; } void Compile_Section_001(void) @@ -1019,7 +1019,7 @@ void Compile_Section_001(void) RSP_Sections_VMULF(vmulf, Middle16BitAccum); - if (WriteToVectorDest(vmulf.sa, CompilePC) == TRUE) + if (WriteToVectorDest(vmulf.sa, CompilePC) == true) { sprintf(Reg, "RSP_Vect[%i].HW[0]", vmulf.sa); MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmulf.sa].HW[0], Reg); @@ -1034,7 +1034,7 @@ void Compile_Section_001(void) CompilePC += 4; RSP_Sections_VMACF(vmacf, Middle16BitAccum); - if (WriteToVectorDest(vmacf.sa, CompilePC - 4) == TRUE) + if (WriteToVectorDest(vmacf.sa, CompilePC - 4) == true) { sprintf(Reg, "RSP_Vect[%i].HW[0]", vmacf.sa); MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmacf.sa].HW[0], Reg); @@ -1046,7 +1046,7 @@ void Compile_Section_001(void) MmxEmptyMultimediaState(); } -Boolean Check_Section_002(void) +bool Check_Section_002(void) { DWORD Count; RSPOpcode op[0x0C]; @@ -1072,48 +1072,48 @@ Boolean Check_Section_002(void) ** 620 VSAW $v28 [8], $v7, $v28 */ - if (IsMmxEnabled == FALSE) + if (!IsMmxEnabled) { - return FALSE; + return false; } if (!(op[0].op == RSP_CP2 && (op[0].rs & 0x10) != 0 && op[0].funct == RSP_VECTOR_VMUDH)) { - return FALSE; + return false; } if ((op[0].rs & 0xF) < 8) { - return FALSE; + return false; } for (Count = 1; Count < 10; Count++) { if (!(op[Count].op == RSP_CP2 && (op[Count].rs & 0x10) != 0 && op[Count].funct == RSP_VECTOR_VMADH)) { - return FALSE; + return false; } if ((op[Count].rs & 0xF) < 8) { - return FALSE; + return false; } } - if (!(op[10].op == RSP_CP2 && (op[10].rs & 0x10) != 0 && op[10].funct == RSP_VECTOR_VSAW)) return FALSE; - if (!(op[11].op == RSP_CP2 && (op[11].rs & 0x10) != 0 && op[11].funct == RSP_VECTOR_VSAW)) return FALSE; + if (!(op[10].op == RSP_CP2 && (op[10].rs & 0x10) != 0 && op[10].funct == RSP_VECTOR_VSAW)) return false; + if (!(op[11].op == RSP_CP2 && (op[11].rs & 0x10) != 0 && op[11].funct == RSP_VECTOR_VSAW)) return false; if ((op[10].rs & 0xF) != 9) { - return FALSE; + return false; } if ((op[11].rs & 0xF) != 8) { - return FALSE; + return false; } - if (TRUE == WriteToAccum(7, CompilePC + 0x2C)) - return FALSE; + if (true == WriteToAccum(7, CompilePC + 0x2C)) + return false; - return TRUE; + return true; } void Compile_Section_002(void) @@ -1168,7 +1168,7 @@ void Compile_Section_002(void) CompilePC += 12 * sizeof(RSPOpcode); } -Boolean Check_Section_003(void) +bool Check_Section_003(void) { DWORD Count; RSPOpcode op[4]; @@ -1186,12 +1186,12 @@ Boolean Check_Section_003(void) if (op[0].Value == 0x4BF7FDC5 && op[1].Value == 0x4BF6FDCF && op[2].Value == 0x4B92CD8D && op[3].Value == 0x4B1EFDCE) { - if (TRUE == WriteToAccum(7, CompilePC + 0xc)) - return FALSE; + if (true == WriteToAccum(7, CompilePC + 0xc)) + return false; - return TRUE; + return true; } - return FALSE; + return false; } static void resampler_hle() @@ -1249,27 +1249,27 @@ void Compile_Section_003(void) CompilePC += 4 * sizeof(RSPOpcode); } -Boolean RSP_DoSections(void) +bool RSP_DoSections(void) { - if (TRUE == Check_Section_000()) + if (true == Check_Section_000()) { Compile_Section_000(); - return TRUE; + return true; } - if (TRUE == Check_Section_001()) + if (true == Check_Section_001()) { Compile_Section_001(); - return TRUE; + return true; } - if (TRUE == Check_Section_002()) + if (true == Check_Section_002()) { Compile_Section_002(); - return TRUE; + return true; } - if (TRUE == Check_Section_003()) + if (true == Check_Section_003()) { Compile_Section_003(); - return TRUE; + return true; } - return FALSE; + return false; } diff --git a/Source/Project64-rsp/Rsp.h b/Source/Project64-rsp/Rsp.h index 8fbdd7383..da11e3d73 100644 --- a/Source/Project64-rsp/Rsp.h +++ b/Source/Project64-rsp/Rsp.h @@ -5,10 +5,10 @@ #include // Profiling -#define Default_ProfilingOn FALSE -#define Default_IndvidualBlock FALSE -#define Default_ShowErrors FALSE -#define Default_AudioHle FALSE +#define Default_ProfilingOn false +#define Default_IndvidualBlock false +#define Default_ShowErrors false +#define Default_AudioHle false uint32_t AsciiToHex(char * HexValue); void DisplayError(char * Message, ...); @@ -16,7 +16,7 @@ void DisplayError(char * Message, ...); #define InterpreterCPU 0 #define RecompilerCPU 1 -extern int DebuggingEnabled, Profiling, IndvidualBlock, ShowErrors, BreakOnStart, LogRDP, LogX86Code; +extern bool DebuggingEnabled, Profiling, IndvidualBlock, ShowErrors, BreakOnStart, LogRDP, LogX86Code; extern uint32_t CPUCore; extern DEBUG_INFO DebugInfo; extern RSP_INFO RSPInfo; diff --git a/Source/Project64-rsp/RspTypes.h b/Source/Project64-rsp/RspTypes.h index 3c57838ca..bbed77b7d 100644 --- a/Source/Project64-rsp/RspTypes.h +++ b/Source/Project64-rsp/RspTypes.h @@ -8,23 +8,6 @@ typedef void (*p_func)(void); -// TODO: Rewrite/remove/address? -/* -`BOOL` is Windows-specific so is going to tend to be avoided. -`int` is the exact replacement. - -However, saying "int" all the time for true/false is a little ambiguous. - -Maybe in the future, with C++ (or C99) rewrites, we can switch to `bool`. -Until then, a simple type definition will help emphasize true/false logic. -*/ - -typedef int Boolean; -#if !defined(FALSE) && !defined(TRUE) -#define FALSE 0 -#define TRUE 1 -#endif - typedef union tagUWORD { int32_t W; diff --git a/Source/Project64-rsp/X86.cpp b/Source/Project64-rsp/X86.cpp index b98c6e012..665c6c323 100644 --- a/Source/Project64-rsp/X86.cpp +++ b/Source/Project64-rsp/X86.cpp @@ -35,7 +35,7 @@ char * x86_HalfStrings[8] = { "ax", "bx", "cx", "dx", "si", "di", "bp", "sp"}; -extern Boolean ConditionalMove; +extern bool ConditionalMove; #define x86Byte_Name(Reg) (x86_ByteStrings[(Reg)]) #define x86Half_Name(Reg) (x86_HalfStrings[(Reg)]) @@ -515,7 +515,7 @@ void Call_Indirect(void * FunctAddress, char * FunctName) void CondMoveEqual(int Destination, int Source) { - if (ConditionalMove == FALSE) + if (ConditionalMove == false) { BYTE * Jump; CPU_Message(" [*]cmove %s, %s", x86_Name(Destination), x86_Name(Source)); @@ -563,7 +563,7 @@ void CondMoveEqual(int Destination, int Source) void CondMoveNotEqual(int Destination, int Source) { - if (ConditionalMove == FALSE) + if (ConditionalMove == false) { BYTE * Jump; CPU_Message(" [*]cmovne %s, %s", x86_Name(Destination), x86_Name(Source)); @@ -611,7 +611,7 @@ void CondMoveNotEqual(int Destination, int Source) void CondMoveGreater(int Destination, int Source) { - if (ConditionalMove == FALSE) + if (ConditionalMove == false) { BYTE * Jump; CPU_Message(" [*]cmovg %s, %s", x86_Name(Destination), x86_Name(Source)); @@ -659,7 +659,7 @@ void CondMoveGreater(int Destination, int Source) void CondMoveGreaterEqual(int Destination, int Source) { - if (ConditionalMove == FALSE) + if (ConditionalMove == false) { BYTE * Jump; CPU_Message(" [*]cmovge %s, %s", x86_Name(Destination), x86_Name(Source)); @@ -707,7 +707,7 @@ void CondMoveGreaterEqual(int Destination, int Source) void CondMoveLess(int Destination, int Source) { - if (ConditionalMove == FALSE) + if (ConditionalMove == false) { BYTE * Jump; CPU_Message(" [*]cmovl %s, %s", x86_Name(Destination), x86_Name(Source)); @@ -755,7 +755,7 @@ void CondMoveLess(int Destination, int Source) void CondMoveLessEqual(int Destination, int Source) { - if (ConditionalMove == FALSE) + if (ConditionalMove == false) { BYTE * Jump; CPU_Message(" [*]cmovle %s, %s", x86_Name(Destination), x86_Name(Source)); diff --git a/Source/Project64-rsp/breakpoint.cpp b/Source/Project64-rsp/breakpoint.cpp index ff7b7966d..a2cae7d38 100644 --- a/Source/Project64-rsp/breakpoint.cpp +++ b/Source/Project64-rsp/breakpoint.cpp @@ -15,7 +15,7 @@ void Add_BPoint(void) char Title[10]; GetWindowTextA(hRSPLocation, Title, sizeof(Title)); - if (!AddRSP_BPoint(AsciiToHex(Title), TRUE)) + if (!AddRSP_BPoint(AsciiToHex(Title), true)) { SendMessage(hRSPLocation, EM_SETSEL, (WPARAM)0, (LPARAM)-1); SetFocus(hRSPLocation); @@ -29,7 +29,7 @@ int AddRSP_BPoint(DWORD Location, int Confirm) if (NoOfBpoints == MaxBPoints) { DisplayError("Max amount of breakpoints set"); - return FALSE; + return false; } for (count = 0; count < NoOfBpoints; count++) @@ -37,7 +37,7 @@ int AddRSP_BPoint(DWORD Location, int Confirm) if (BPoint[count].Location == Location) { DisplayError("You already have this breakpoint"); - return FALSE; + return false; } } @@ -51,7 +51,7 @@ int AddRSP_BPoint(DWORD Location, int Confirm) Response = MessageBoxA(BPoint_Win_hDlg, Message, "Breakpoint", MB_YESNO | MB_ICONINFORMATION); if (Response == IDNO) { - return FALSE; + return false; } } BPoint[NoOfBpoints].Location = Location; @@ -60,7 +60,7 @@ int AddRSP_BPoint(DWORD Location, int Confirm) { DebugInfo.UpdateBreakPoints(); } - return TRUE; + return true; } int CheckForRSPBPoint(DWORD Location) @@ -71,10 +71,10 @@ int CheckForRSPBPoint(DWORD Location) { if (BPoint[count].Location == Location) { - return TRUE; + return true; } } - return FALSE; + return false; } void CreateBPPanel(void * hDlg, rectangle rcBox) @@ -102,7 +102,7 @@ void CreateBPPanel(void * hDlg, rectangle rcBox) void HideBPPanel(void) { - ShowWindow(hRSPLocation, FALSE); + ShowWindow(hRSPLocation, false); } void PaintBPPanel(window_paint ps) @@ -113,7 +113,7 @@ void PaintBPPanel(window_paint ps) void ShowBPPanel(void) { - ShowWindow(hRSPLocation, TRUE); + ShowWindow(hRSPLocation, true); } void RefreshBpoints(void * hList) diff --git a/Source/Project64-rsp/memory.cpp b/Source/Project64-rsp/memory.cpp index b15a34505..84f6db195 100644 --- a/Source/Project64-rsp/memory.cpp +++ b/Source/Project64-rsp/memory.cpp @@ -22,7 +22,7 @@ int AllocateMemory(void) if (RecompCode == NULL) { DisplayError("Not enough memory for RSP RecompCode!"); - return FALSE; + return false; } } @@ -32,7 +32,7 @@ int AllocateMemory(void) if (RecompCodeSecondary == NULL) { DisplayError("Not enough memory for RSP RecompCode Secondary!"); - return FALSE; + return false; } } @@ -42,14 +42,14 @@ int AllocateMemory(void) if (JumpTables == NULL) { DisplayError("Not enough memory for jump table!"); - return FALSE; + return false; } } JumpTable = (void **)JumpTables; RecompPos = RecompCode; NoOfMaps = 0; - return TRUE; + return true; } void FreeMemory(void)