Core: Remove helper functions from x86 Recompiler Ops
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zilmar
parent
5cfb80fcfc
commit
02a48566c0
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@ -253,169 +253,6 @@ public:
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return m_Assembler;
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}
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// Helper functions
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typedef CRegInfo::REG_STATE REG_STATE;
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REG_STATE GetMipsRegState(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegState(Reg);
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}
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uint64_t GetMipsReg(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsReg(Reg);
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}
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int64_t GetMipsReg_S(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsReg_S(Reg);
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}
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uint32_t GetMipsRegLo(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegLo(Reg);
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}
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int32_t GetMipsRegLo_S(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegLo_S(Reg);
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}
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uint32_t GetMipsRegHi(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegHi(Reg);
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}
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int32_t GetMipsRegHi_S(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegHi_S(Reg);
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}
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asmjit::x86::Gp GetMipsRegMapLo(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegMapLo(Reg);
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}
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asmjit::x86::Gp GetMipsRegMapHi(int32_t Reg)
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{
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return m_RegWorkingSet.GetMipsRegMapHi(Reg);
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}
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bool IsKnown(int32_t Reg)
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{
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return m_RegWorkingSet.IsKnown(Reg);
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}
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bool IsUnknown(int32_t Reg)
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{
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return m_RegWorkingSet.IsUnknown(Reg);
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}
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bool IsMapped(int32_t Reg)
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{
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return m_RegWorkingSet.IsMapped(Reg);
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}
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bool IsConst(int32_t Reg)
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{
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return m_RegWorkingSet.IsConst(Reg);
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}
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bool IsSigned(int32_t Reg)
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{
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return m_RegWorkingSet.IsSigned(Reg);
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}
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bool IsUnsigned(int32_t Reg)
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{
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return m_RegWorkingSet.IsUnsigned(Reg);
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}
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bool Is32Bit(int32_t Reg)
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{
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return m_RegWorkingSet.Is32Bit(Reg);
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}
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bool Is64Bit(int32_t Reg)
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{
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return m_RegWorkingSet.Is64Bit(Reg);
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}
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bool Is32BitMapped(int32_t Reg)
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{
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return m_RegWorkingSet.Is32BitMapped(Reg);
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}
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bool Is64BitMapped(int32_t Reg)
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{
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return m_RegWorkingSet.Is64BitMapped(Reg);
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}
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void FixRoundModel(CRegInfo::FPU_ROUND RoundMethod)
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{
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m_RegWorkingSet.FixRoundModel(RoundMethod);
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}
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void ChangeFPURegFormat(int32_t Reg, CRegInfo::FPU_STATE OldFormat, CRegInfo::FPU_STATE NewFormat, CRegInfo::FPU_ROUND RoundingModel)
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{
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m_RegWorkingSet.ChangeFPURegFormat(Reg, OldFormat, NewFormat, RoundingModel);
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}
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void Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, CRegInfo::FPU_STATE Format)
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{
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m_RegWorkingSet.Load_FPR_ToTop(Reg, RegToLoad, Format);
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}
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bool RegInStack(int32_t Reg, CRegInfo::FPU_STATE Format)
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{
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return m_RegWorkingSet.RegInStack(Reg, Format);
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}
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const asmjit::x86::St & StackPosition(int32_t Reg)
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{
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return m_RegWorkingSet.StackPosition(Reg);
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}
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void UnMap_AllFPRs()
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{
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m_RegWorkingSet.UnMap_AllFPRs();
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}
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void UnMap_FPR(uint32_t Reg, bool WriteBackValue)
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{
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m_RegWorkingSet.UnMap_FPR(Reg, WriteBackValue);
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}
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const asmjit::x86::Gp & FreeX86Reg()
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{
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return m_RegWorkingSet.FreeX86Reg();
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}
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const asmjit::x86::Gp & Free8BitX86Reg()
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{
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return m_RegWorkingSet.Free8BitX86Reg();
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}
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void Map_GPR_32bit(int32_t Reg, bool SignValue, int32_t MipsRegToLoad)
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{
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m_RegWorkingSet.Map_GPR_32bit(Reg, SignValue, MipsRegToLoad);
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}
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void Map_GPR_64bit(int32_t Reg, int32_t MipsRegToLoad)
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{
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m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad);
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}
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asmjit::x86::Gp Get_MemoryStack()
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{
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return m_RegWorkingSet.Get_MemoryStack();
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}
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asmjit::x86::Gp Map_MemoryStack(const asmjit::x86::Gp & Reg, bool bMapRegister, bool LoadValue = true)
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{
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return m_RegWorkingSet.Map_MemoryStack(Reg, bMapRegister, LoadValue);
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}
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asmjit::x86::Gp Map_TempReg(const asmjit::x86::Gp & Reg, int32_t MipsReg, bool LoadHiWord, bool Reg8Bit)
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{
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return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord, Reg8Bit);
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}
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void ProtectGPR(uint32_t Reg)
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{
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m_RegWorkingSet.ProtectGPR(Reg);
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}
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void UnProtectGPR(uint32_t Reg)
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{
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m_RegWorkingSet.UnProtectGPR(Reg);
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}
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void ResetX86Protection()
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{
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m_RegWorkingSet.ResetX86Protection();
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}
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const asmjit::x86::Gp & UnMap_TempReg()
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{
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return m_RegWorkingSet.UnMap_TempReg();
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}
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void UnMap_GPR(uint32_t Reg, bool WriteBackValue)
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{
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m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue);
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}
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bool UnMap_X86reg(const asmjit::x86::Gp & Reg)
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{
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return m_RegWorkingSet.UnMap_X86reg(Reg);
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}
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public:
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uint32_t CompilePC()
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{
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