2010-06-22 20:36:28 +00:00
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#include "stdafx.h"
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CDMA::CDMA(CFlashram & FlashRam, CSram & Sram) :
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m_FlashRam(FlashRam),
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m_Sram(Sram)
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{
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}
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void CDMA::OnFirstDMA (void) {
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switch (_Rom->CicChipID()) {
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2012-11-17 01:18:00 +00:00
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case 1: *(DWORD *)&((g_MMU->Rdram())[0x318]) = g_MMU->RdramSize(); break;
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case 2: *(DWORD *)&((g_MMU->Rdram())[0x318]) = g_MMU->RdramSize(); break;
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case 3: *(DWORD *)&((g_MMU->Rdram())[0x318]) = g_MMU->RdramSize(); break;
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case 5: *(DWORD *)&((g_MMU->Rdram())[0x3F0]) = g_MMU->RdramSize(); break;
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case 6: *(DWORD *)&((g_MMU->Rdram())[0x318]) = g_MMU->RdramSize(); break;
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2012-11-17 00:58:31 +00:00
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default: g_Notify->DisplayError("Unhandled CicChip(%d) in first DMA",_Rom->CicChipID());
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2010-06-22 20:36:28 +00:00
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}
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}
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void CDMA::PI_DMA_READ (void) {
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// PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
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2012-11-17 01:18:00 +00:00
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if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_RD_LEN_REG + 1 > g_MMU->RdramSize()) {
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2010-06-22 20:36:28 +00:00
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#ifndef EXTERNAL_RELEASE
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2012-11-17 00:58:31 +00:00
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g_Notify->DisplayError("PI_DMA_READ not in Memory");
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2010-06-22 20:36:28 +00:00
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#endif
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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return;
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}
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if ( _Reg->PI_CART_ADDR_REG >= 0x08000000 && _Reg->PI_CART_ADDR_REG <= 0x08010000) {
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2012-11-17 01:07:04 +00:00
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if (g_System->m_SaveUsing == SaveChip_Auto) { g_System->m_SaveUsing = SaveChip_Sram; }
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if (g_System->m_SaveUsing == SaveChip_Sram) {
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2010-06-22 20:36:28 +00:00
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m_Sram.DmaToSram(
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2012-11-17 01:18:00 +00:00
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g_MMU->Rdram() + _Reg->PI_DRAM_ADDR_REG,
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2010-06-22 20:36:28 +00:00
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_Reg->PI_CART_ADDR_REG - 0x08000000,
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_Reg->PI_RD_LEN_REG + 1
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);
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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return;
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}
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2012-11-17 01:07:04 +00:00
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if (g_System->m_SaveUsing == SaveChip_FlashRam) {
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2010-06-22 20:36:28 +00:00
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m_FlashRam.DmaToFlashram(
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2012-11-17 01:18:00 +00:00
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g_MMU->Rdram()+_Reg->PI_DRAM_ADDR_REG,
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2010-06-22 20:36:28 +00:00
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_Reg->PI_CART_ADDR_REG - 0x08000000,
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_Reg->PI_WR_LEN_REG + 1
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);
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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return;
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}
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}
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2012-11-17 01:07:04 +00:00
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if (g_System->m_SaveUsing == SaveChip_FlashRam)
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2010-06-30 21:35:44 +00:00
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{
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2012-11-17 00:58:31 +00:00
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g_Notify->DisplayError("**** FLashRam DMA Read address %X *****",_Reg->PI_CART_ADDR_REG);
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2010-06-22 20:36:28 +00:00
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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return;
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}
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#ifndef EXTERNAL_RELEASE
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2012-11-17 00:58:31 +00:00
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g_Notify->DisplayError("PI_DMA_READ where are you dmaing to ?");
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2010-06-22 20:36:28 +00:00
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#endif
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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return;
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}
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void CDMA::PI_DMA_WRITE (void) {
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_Reg->PI_STATUS_REG |= PI_STATUS_DMA_BUSY;
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2012-11-17 01:18:00 +00:00
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if ( _Reg->PI_DRAM_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 > g_MMU->RdramSize())
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2010-06-22 20:36:28 +00:00
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{
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2012-11-17 01:02:04 +00:00
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if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("PI_DMA_WRITE not in Memory"); }
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2010-06-22 20:36:28 +00:00
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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return;
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}
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if ( _Reg->PI_CART_ADDR_REG >= 0x08000000 && _Reg->PI_CART_ADDR_REG <= 0x08010000) {
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2012-11-17 01:07:04 +00:00
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if (g_System->m_SaveUsing == SaveChip_Auto) { g_System->m_SaveUsing = SaveChip_Sram; }
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if (g_System->m_SaveUsing == SaveChip_Sram) {
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2010-06-22 20:36:28 +00:00
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m_Sram.DmaFromSram(
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2012-11-17 01:18:00 +00:00
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g_MMU->Rdram()+_Reg->PI_DRAM_ADDR_REG,
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2010-06-22 20:36:28 +00:00
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_Reg->PI_CART_ADDR_REG - 0x08000000,
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_Reg->PI_WR_LEN_REG + 1
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);
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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return;
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}
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2012-11-17 01:07:04 +00:00
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if (g_System->m_SaveUsing == SaveChip_FlashRam) {
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2010-06-22 20:36:28 +00:00
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m_FlashRam.DmaFromFlashram(
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2012-11-17 01:18:00 +00:00
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g_MMU->Rdram()+_Reg->PI_DRAM_ADDR_REG,
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2010-06-22 20:36:28 +00:00
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_Reg->PI_CART_ADDR_REG - 0x08000000,
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_Reg->PI_WR_LEN_REG + 1
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);
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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}
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return;
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}
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2010-06-30 21:35:44 +00:00
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if ( _Reg->PI_CART_ADDR_REG >= 0x10000000 && _Reg->PI_CART_ADDR_REG <= 0x1FBFFFFF)
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{
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2010-06-22 20:36:28 +00:00
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DWORD i;
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#ifdef tofix
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#ifdef ROM_IN_MAPSPACE
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if (WrittenToRom) {
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DWORD OldProtect;
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2012-09-30 12:24:07 +00:00
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VirtualProtect(ROM,m_RomFileSize,PAGE_READONLY, &OldProtect);
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2010-06-22 20:36:28 +00:00
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}
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#endif
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#endif
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BYTE * ROM = _Rom->GetRomAddress();
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2012-11-17 01:18:00 +00:00
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BYTE * RDRAM = g_MMU->Rdram();
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2010-06-22 20:36:28 +00:00
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_Reg->PI_CART_ADDR_REG -= 0x10000000;
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2012-09-30 12:24:07 +00:00
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if (_Reg->PI_CART_ADDR_REG + _Reg->PI_WR_LEN_REG + 1 < _Rom->GetRomSize()) {
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2010-06-22 20:36:28 +00:00
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for (i = 0; i < _Reg->PI_WR_LEN_REG + 1; i ++) {
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*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) = *(ROM+((_Reg->PI_CART_ADDR_REG + i) ^ 3));
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}
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} else {
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DWORD Len;
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2012-09-30 12:24:07 +00:00
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Len = _Rom->GetRomSize() - _Reg->PI_CART_ADDR_REG;
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2010-06-22 20:36:28 +00:00
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for (i = 0; i < Len; i ++) {
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*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) = *(ROM+((_Reg->PI_CART_ADDR_REG + i) ^ 3));
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}
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for (i = Len; i < _Reg->PI_WR_LEN_REG + 1 - Len; i ++) {
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*(RDRAM+((_Reg->PI_DRAM_ADDR_REG + i) ^ 3)) = 0;
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}
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}
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_Reg->PI_CART_ADDR_REG += 0x10000000;
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2012-11-17 01:07:04 +00:00
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if (!g_System->DmaUsed())
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2010-06-22 20:36:28 +00:00
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{
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2012-11-17 01:07:04 +00:00
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g_System->SetDmaUsed(true);
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2010-06-22 20:36:28 +00:00
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OnFirstDMA();
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}
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2012-11-17 01:15:55 +00:00
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if (g_Recompiler && g_Recompiler->bSMM_PIDMA())
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2010-06-22 20:36:28 +00:00
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{
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2012-11-17 01:15:55 +00:00
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g_Recompiler->ClearRecompCode_Phys(_Reg->PI_DRAM_ADDR_REG, _Reg->PI_WR_LEN_REG,CRecompiler::Remove_DMA);
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2010-06-22 20:36:28 +00:00
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}
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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//ChangeTimer(PiTimer,(int)(PI_WR_LEN_REG * 8.9) + 50);
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//ChangeTimer(PiTimer,(int)(PI_WR_LEN_REG * 8.9));
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return;
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}
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2012-11-17 01:02:04 +00:00
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if (g_Settings->LoadBool(Debugger_ShowUnhandledMemory)) { g_Notify->DisplayError("PI_DMA_WRITE not in ROM"); }
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2010-06-22 20:36:28 +00:00
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_Reg->PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
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_Reg->MI_INTR_REG |= MI_INTR_PI;
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_Reg->CheckInterrupts();
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}
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void CDMA::SP_DMA_READ (void) {
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_Reg->SP_DRAM_ADDR_REG &= 0x1FFFFFFF;
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2012-11-17 01:18:00 +00:00
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if (_Reg->SP_DRAM_ADDR_REG > g_MMU->RdramSize()) {
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2010-06-22 20:36:28 +00:00
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#ifndef EXTERNAL_RELEASE
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2012-11-17 00:58:31 +00:00
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g_Notify->DisplayError("SP DMA\nSP_DRAM_ADDR_REG not in RDRam space");
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2010-06-22 20:36:28 +00:00
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#endif
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_Reg->SP_DMA_BUSY_REG = 0;
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_Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
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return;
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}
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if (_Reg->SP_RD_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
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#ifndef EXTERNAL_RELEASE
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2012-11-17 00:58:31 +00:00
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g_Notify->DisplayError("SP DMA\ncould not fit copy in memory segement");
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2010-06-22 20:36:28 +00:00
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#endif
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return;
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}
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2012-11-17 00:58:31 +00:00
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if ((_Reg->SP_MEM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
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if ((_Reg->SP_DRAM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
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if (((_Reg->SP_RD_LEN_REG + 1) & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
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2010-06-22 20:36:28 +00:00
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2012-11-17 01:18:00 +00:00
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memcpy( g_MMU->Dmem() + (_Reg->SP_MEM_ADDR_REG & 0x1FFF), g_MMU->Rdram() + _Reg->SP_DRAM_ADDR_REG,
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2010-06-22 20:36:28 +00:00
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_Reg->SP_RD_LEN_REG + 1 );
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_Reg->SP_DMA_BUSY_REG = 0;
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_Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
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}
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void CDMA::SP_DMA_WRITE (void) {
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2012-11-17 01:18:00 +00:00
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if (_Reg->SP_DRAM_ADDR_REG > g_MMU->RdramSize()) {
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2010-06-22 20:36:28 +00:00
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#ifndef EXTERNAL_RELEASE
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2012-11-17 00:58:31 +00:00
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g_Notify->DisplayError("SP DMA WRITE\nSP_DRAM_ADDR_REG not in RDRam space");
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2010-06-22 20:36:28 +00:00
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#endif
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return;
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}
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if (_Reg->SP_WR_LEN_REG + 1 + (_Reg->SP_MEM_ADDR_REG & 0xFFF) > 0x1000) {
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#ifndef EXTERNAL_RELEASE
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2012-11-17 00:58:31 +00:00
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g_Notify->DisplayError("SP DMA WRITE\ncould not fit copy in memory segement");
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2010-06-22 20:36:28 +00:00
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#endif
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return;
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}
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2012-11-17 00:58:31 +00:00
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if ((_Reg->SP_MEM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
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if ((_Reg->SP_DRAM_ADDR_REG & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
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if (((_Reg->SP_WR_LEN_REG + 1) & 3) != 0) { g_Notify->BreakPoint(__FILE__,__LINE__); }
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2010-06-22 20:36:28 +00:00
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2012-11-17 01:18:00 +00:00
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memcpy( g_MMU->Rdram() + _Reg->SP_DRAM_ADDR_REG, g_MMU->Dmem() + (_Reg->SP_MEM_ADDR_REG & 0x1FFF),
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2010-06-22 20:36:28 +00:00
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_Reg->SP_WR_LEN_REG + 1);
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_Reg->SP_DMA_BUSY_REG = 0;
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_Reg->SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY;
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}
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