2022-03-21 10:27:57 +00:00
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#include "stdafx.h"
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2022-10-10 00:22:17 +00:00
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2022-03-21 10:27:57 +00:00
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#include "CartridgeDomain2Address1Handler.h"
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#include <Project64-core\N64System\Mips\Disk.h>
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2022-10-10 00:22:17 +00:00
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#include <Project64-core\N64System\Mips\Register.h>
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2022-03-21 10:27:57 +00:00
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DiskInterfaceReg::DiskInterfaceReg(uint32_t * DiskInterface) :
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ASIC_DATA(DiskInterface[0]),
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ASIC_MISC_REG(DiskInterface[1]),
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ASIC_STATUS(DiskInterface[2]),
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ASIC_CUR_TK(DiskInterface[3]),
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ASIC_BM_STATUS(DiskInterface[4]),
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ASIC_ERR_SECTOR(DiskInterface[5]),
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ASIC_SEQ_STATUS(DiskInterface[6]),
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ASIC_CUR_SECTOR(DiskInterface[7]),
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ASIC_HARD_RESET(DiskInterface[8]),
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ASIC_C1_S0(DiskInterface[9]),
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ASIC_HOST_SECBYTE(DiskInterface[10]),
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ASIC_C1_S2(DiskInterface[11]),
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ASIC_SEC_BYTE(DiskInterface[12]),
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ASIC_C1_S4(DiskInterface[13]),
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ASIC_C1_S6(DiskInterface[14]),
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ASIC_CUR_ADDR(DiskInterface[15]),
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ASIC_ID_REG(DiskInterface[16]),
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ASIC_TEST_REG(DiskInterface[17]),
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ASIC_TEST_PIN_SEL(DiskInterface[18]),
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ASIC_CMD(DiskInterface[19]),
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ASIC_BM_CTL(DiskInterface[20]),
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ASIC_SEQ_CTL(DiskInterface[21])
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{
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}
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CartridgeDomain2Address1Handler::CartridgeDomain2Address1Handler(CRegisters & Reg) :
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DiskInterfaceReg(Reg.m_DiskInterface)
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{
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}
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bool CartridgeDomain2Address1Handler::Read32(uint32_t Address, uint32_t & Value)
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{
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// 64DD registers
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if (EnableDisk())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x05000500: Value = ASIC_DATA; break;
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case 0x05000504: Value = ASIC_MISC_REG; break;
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case 0x05000508:
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Value = ASIC_STATUS;
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DiskGapSectorCheck();
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break;
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case 0x0500050C: Value = ASIC_CUR_TK; break;
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case 0x05000510: Value = ASIC_BM_STATUS; break;
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case 0x05000514: Value = ASIC_ERR_SECTOR; break;
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case 0x05000518: Value = ASIC_SEQ_STATUS; break;
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case 0x0500051C: Value = ASIC_CUR_SECTOR; break;
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case 0x05000520: Value = ASIC_HARD_RESET; break;
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case 0x05000524: Value = ASIC_C1_S0; break;
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case 0x05000528: Value = ASIC_HOST_SECBYTE; break;
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case 0x0500052C: Value = ASIC_C1_S2; break;
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case 0x05000530: Value = ASIC_SEC_BYTE; break;
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case 0x05000534: Value = ASIC_C1_S4; break;
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case 0x05000538: Value = ASIC_C1_S6; break;
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case 0x0500053C: Value = ASIC_CUR_ADDR; break;
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case 0x05000540: Value = ASIC_ID_REG; break;
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case 0x05000544: Value = ASIC_TEST_REG; break;
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case 0x05000548: Value = ASIC_TEST_PIN_SEL; break;
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default:
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Value = (Address << 16) | (Address & 0xFFFF);
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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else
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{
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Value = (Address << 16) | (Address & 0xFFFF);
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}
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return true;
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}
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bool CartridgeDomain2Address1Handler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
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{
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if (EnableDisk())
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{
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switch (Address & 0xFFFFFFF)
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{
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case 0x05000500: ASIC_DATA = (ASIC_DATA & ~Mask) | (Value & Mask); break;
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case 0x05000508:
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ASIC_CMD = (ASIC_CMD & ~Mask) | (Value & Mask);
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DiskCommand();
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break;
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case 0x05000510:
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//ASIC_BM_STATUS_CTL
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ASIC_BM_CTL = (ASIC_BM_CTL & ~Mask) | (Value & Mask);
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DiskBMControl();
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break;
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case 0x05000518:
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//ASIC_SEQ_STATUS_CTL
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break;
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case 0x05000520: DiskReset(); break;
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case 0x05000528: ASIC_HOST_SECBYTE = (ASIC_HOST_SECBYTE & ~Mask) | (Value & Mask); break;
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case 0x05000530: ASIC_SEC_BYTE = (ASIC_SEC_BYTE & ~Mask) | (Value & Mask); break;
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case 0x05000548: ASIC_TEST_PIN_SEL = (ASIC_TEST_PIN_SEL & ~Mask) | (Value & Mask); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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return true;
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}
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