2016-08-11 11:09:21 +00:00
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#pragma once
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#if defined(__arm__) || defined(_M_ARM)
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2021-06-28 01:57:35 +00:00
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#include <Project64-core/N64System/Mips/Register.h>
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2016-08-11 11:09:21 +00:00
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#include <Project64-core/N64System/Recompiler/RecompilerOps.h>
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#include <Project64-core/N64System/Recompiler/Arm/ArmOps.h>
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2022-01-03 23:37:52 +00:00
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#include <Project64-core\Settings\GameSettings.h>
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2016-08-11 11:09:21 +00:00
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class CArmRecompilerOps :
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public CRecompilerOps,
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private CArmOps,
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2022-01-03 23:37:52 +00:00
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protected CSystemRegisters,
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private CGameSettings
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2016-08-11 11:09:21 +00:00
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{
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public:
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2022-06-06 10:19:44 +00:00
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CArmRecompilerOps(CMipsMemoryVM & MMU);
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~CArmRecompilerOps();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// Trap functions
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2019-12-17 15:08:15 +00:00
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void Compile_TrapCompare(TRAP_COMPARE CompareType);
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2021-05-18 11:51:36 +00:00
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// Branch functions
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2016-08-11 11:09:21 +00:00
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void Compile_BranchCompare(BRANCH_COMPARE CompareType);
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2022-07-25 08:22:44 +00:00
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void Compile_Branch(BRANCH_COMPARE CompareType, bool Link);
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2016-08-11 11:09:21 +00:00
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void Compile_BranchLikely(BRANCH_COMPARE CompareType, bool Link);
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void BNE_Compare();
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void BEQ_Compare();
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void BGTZ_Compare();
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void BLEZ_Compare();
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void BLTZ_Compare();
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void BGEZ_Compare();
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void COP1_BCF_Compare();
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void COP1_BCT_Compare();
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2021-05-18 11:51:36 +00:00
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// Opcode functions
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2022-01-03 23:37:52 +00:00
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void J();
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void JAL();
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void ADDI();
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void ADDIU();
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void SLTI();
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void SLTIU();
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void ANDI();
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void ORI();
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void XORI();
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void LUI();
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2022-08-15 00:35:16 +00:00
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void DADDI();
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2022-01-03 23:37:52 +00:00
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void DADDIU();
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void LDL();
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void LDR();
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void LB();
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void LH();
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void LWL();
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void LW();
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void LBU();
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void LHU();
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void LWR();
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void LWU();
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void SB();
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void SH();
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void SWL();
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void SW();
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void SWR();
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void SDL();
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void SDR();
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void CACHE();
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void LL();
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void LWC1();
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void LDC1();
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void LD();
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void SC();
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void SWC1();
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void SDC1();
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void SD();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// R4300i opcodes: Special
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2022-01-03 23:37:52 +00:00
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void SPECIAL_SLL();
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void SPECIAL_SRL();
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void SPECIAL_SRA();
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void SPECIAL_SLLV();
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void SPECIAL_SRLV();
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void SPECIAL_SRAV();
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void SPECIAL_JR();
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void SPECIAL_JALR();
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2016-08-11 11:09:21 +00:00
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void SPECIAL_SYSCALL();
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2022-01-03 23:37:52 +00:00
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void SPECIAL_MFLO();
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void SPECIAL_MTLO();
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void SPECIAL_MFHI();
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void SPECIAL_MTHI();
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void SPECIAL_DSLLV();
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void SPECIAL_DSRLV();
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void SPECIAL_DSRAV();
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void SPECIAL_MULT();
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void SPECIAL_MULTU();
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void SPECIAL_DIV();
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void SPECIAL_DIVU();
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void SPECIAL_DMULT();
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void SPECIAL_DMULTU();
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void SPECIAL_DDIV();
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void SPECIAL_DDIVU();
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void SPECIAL_ADD();
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void SPECIAL_ADDU();
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void SPECIAL_SUB();
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void SPECIAL_SUBU();
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void SPECIAL_AND();
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void SPECIAL_OR();
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void SPECIAL_XOR();
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void SPECIAL_NOR();
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void SPECIAL_SLT();
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void SPECIAL_SLTU();
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void SPECIAL_DADD();
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void SPECIAL_DADDU();
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void SPECIAL_DSUB();
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void SPECIAL_DSUBU();
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void SPECIAL_DSLL();
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void SPECIAL_DSRL();
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void SPECIAL_DSRA();
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void SPECIAL_DSLL32();
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void SPECIAL_DSRL32();
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void SPECIAL_DSRA32();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// COP0 functions
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2022-01-03 23:37:52 +00:00
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void COP0_MF();
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void COP0_MT();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// COP0 CO functions
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2022-01-03 23:37:52 +00:00
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void COP0_CO_TLBR();
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void COP0_CO_TLBWI();
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void COP0_CO_TLBWR();
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void COP0_CO_TLBP();
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void COP0_CO_ERET();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// COP1 functions
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2022-01-03 23:37:52 +00:00
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void COP1_MF();
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void COP1_DMF();
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void COP1_CF();
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void COP1_MT();
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void COP1_DMT();
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void COP1_CT();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// COP1: S functions
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2022-01-03 23:37:52 +00:00
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void COP1_S_ADD();
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void COP1_S_SUB();
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void COP1_S_MUL();
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void COP1_S_DIV();
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void COP1_S_ABS();
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void COP1_S_NEG();
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void COP1_S_SQRT();
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void COP1_S_MOV();
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void COP1_S_ROUND_L();
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void COP1_S_TRUNC_L();
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void COP1_S_CEIL_L();
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void COP1_S_FLOOR_L();
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void COP1_S_ROUND_W();
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void COP1_S_TRUNC_W();
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void COP1_S_CEIL_W();
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void COP1_S_FLOOR_W();
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void COP1_S_CVT_D();
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void COP1_S_CVT_W();
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void COP1_S_CVT_L();
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void COP1_S_CMP();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// COP1: D functions
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2022-01-03 23:37:52 +00:00
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void COP1_D_ADD();
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void COP1_D_SUB();
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void COP1_D_MUL();
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void COP1_D_DIV();
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void COP1_D_ABS();
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void COP1_D_NEG();
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void COP1_D_SQRT();
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void COP1_D_MOV();
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void COP1_D_ROUND_L();
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void COP1_D_TRUNC_L();
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void COP1_D_CEIL_L();
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void COP1_D_FLOOR_L();
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void COP1_D_ROUND_W();
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void COP1_D_TRUNC_W();
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void COP1_D_CEIL_W();
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void COP1_D_FLOOR_W();
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void COP1_D_CVT_S();
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void COP1_D_CVT_W();
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void COP1_D_CVT_L();
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void COP1_D_CMP();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// COP1: W functions
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2022-01-03 23:37:52 +00:00
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void COP1_W_CVT_S();
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void COP1_W_CVT_D();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// COP1: L functions
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2022-01-03 23:37:52 +00:00
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void COP1_L_CVT_S();
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void COP1_L_CVT_D();
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// Other functions
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2022-01-03 23:37:52 +00:00
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void UnknownOpcode();
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2016-08-11 11:09:21 +00:00
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2016-11-22 22:03:40 +00:00
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private:
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2016-08-11 11:09:21 +00:00
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void EnterCodeBlock();
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void ExitCodeBlock();
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void CompileExitCode();
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void CompileCop1Test();
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void CompileInPermLoop(CRegInfo & RegSet, uint32_t ProgramCounter);
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2016-11-23 07:58:22 +00:00
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void OutputRegisterState(const CRegInfo & SyncTo, const CRegInfo & CurrentSet) const;
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2016-08-11 11:09:21 +00:00
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void SyncRegState(const CRegInfo & SyncTo);
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2016-11-23 07:58:22 +00:00
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bool SetupRegisterForLoop(CCodeBlock * BlockInfo, const CRegInfo & RegSet);
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2016-08-11 11:09:21 +00:00
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CRegInfo & GetRegWorkingSet(void);
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void SetRegWorkingSet(const CRegInfo & RegInfo);
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bool InheritParentInfo();
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void LinkJump(CJumpInfo & JumpInfo, uint32_t SectionID = -1, uint32_t FromSectionID = -1);
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void JumpToSection( CCodeSection * Section);
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void JumpToUnknown(CJumpInfo * JumpInfo);
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void SetCurrentPC(uint32_t ProgramCounter);
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uint32_t GetCurrentPC(void);
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void SetCurrentSection(CCodeSection * section);
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2022-06-06 10:19:44 +00:00
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void SetNextStepType(PIPELINE_STAGE StepType);
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PIPELINE_STAGE GetNextStepType( void );
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2022-07-18 08:31:00 +00:00
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const R4300iOpcode & GetOpcode ( void ) const;
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2016-08-11 11:09:21 +00:00
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void PreCompileOpcode(void);
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void PostCompileOpcode ( void );
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason);
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2016-11-22 06:41:46 +00:00
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void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, CArmOps::ArmCompareType CompareType);
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2016-08-11 11:09:21 +00:00
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static void UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles);
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2022-04-18 11:27:59 +00:00
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void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true);
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2016-08-11 11:09:21 +00:00
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void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet);
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2016-10-01 20:22:10 +00:00
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void CompileReadTLBMiss(ArmReg AddressReg, ArmReg LookUpReg);
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2016-11-23 07:00:35 +00:00
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void CompileWriteTLBMiss(ArmReg AddressReg, ArmReg LookUpReg);
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2018-01-20 23:18:52 +00:00
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void CompileExecuteBP(void);
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2018-07-29 20:07:45 +00:00
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void CompileExecuteDelaySlotBP(void);
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2016-08-11 11:09:21 +00:00
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2021-05-18 11:51:36 +00:00
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// Helper functions
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2016-11-23 07:58:22 +00:00
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typedef CRegInfo::REG_STATE REG_STATE;
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static inline REG_STATE GetMipsRegState(int32_t Reg) { return m_RegWorkingSet.GetMipsRegState(Reg); }
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static inline uint64_t GetMipsReg(int32_t Reg) { return m_RegWorkingSet.GetMipsReg(Reg); }
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2016-10-01 08:12:46 +00:00
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static inline uint32_t GetMipsRegLo(int32_t Reg) { return m_RegWorkingSet.GetMipsRegLo(Reg); }
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static inline int32_t GetMipsRegLo_S(int32_t Reg) { return m_RegWorkingSet.GetMipsRegLo_S(Reg); }
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static inline uint32_t GetMipsRegHi(int32_t Reg) { return m_RegWorkingSet.GetMipsRegHi(Reg); }
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2016-11-23 07:58:22 +00:00
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static inline int32_t GetMipsRegHi_S(int32_t Reg) { return m_RegWorkingSet.GetMipsRegHi_S(Reg); }
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2016-10-01 08:12:46 +00:00
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static inline ArmReg GetMipsRegMapLo(int32_t Reg) { return m_RegWorkingSet.GetMipsRegMapLo(Reg); }
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static inline ArmReg GetMipsRegMapHi(int32_t Reg) { return m_RegWorkingSet.GetMipsRegMapHi(Reg); }
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static inline bool IsKnown(int32_t Reg) { return m_RegWorkingSet.IsKnown(Reg); }
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2016-10-01 08:27:02 +00:00
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static inline bool IsUnknown(int32_t Reg) { return m_RegWorkingSet.IsUnknown(Reg); }
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2016-10-01 08:12:46 +00:00
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static inline bool IsMapped(int32_t Reg) { return m_RegWorkingSet.IsMapped(Reg); }
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static inline bool IsConst(int32_t Reg) { return m_RegWorkingSet.IsConst(Reg); }
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static inline bool IsSigned(int32_t Reg) { return m_RegWorkingSet.IsSigned(Reg); }
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2016-11-23 07:58:22 +00:00
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static inline bool IsUnsigned(int32_t Reg) { return m_RegWorkingSet.IsUnsigned(Reg); }
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2016-10-01 08:12:46 +00:00
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static inline bool Is32Bit(int32_t Reg) { return m_RegWorkingSet.Is32Bit(Reg); }
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static inline bool Is64Bit(int32_t Reg) { return m_RegWorkingSet.Is64Bit(Reg); }
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2016-11-23 07:58:22 +00:00
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static inline bool Is32BitMapped(int32_t Reg) { return m_RegWorkingSet.Is32BitMapped(Reg); }
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static inline bool Is64BitMapped(int32_t Reg) { return m_RegWorkingSet.Is64BitMapped(Reg); }
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2016-10-01 10:24:42 +00:00
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static inline void Map_GPR_32bit(int32_t Reg, bool SignValue, int32_t MipsRegToLoad) { m_RegWorkingSet.Map_GPR_32bit(Reg, SignValue, MipsRegToLoad); }
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2016-10-01 20:22:10 +00:00
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static inline void Map_GPR_64bit(int32_t Reg, int32_t MipsRegToLoad) { m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad); }
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2016-10-01 08:12:46 +00:00
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static inline void UnMap_GPR(uint32_t Reg, bool WriteBackValue){ m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue); }
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2016-11-22 11:39:24 +00:00
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static inline void WriteBack_GPR(uint32_t Reg, bool Unmapping){ m_RegWorkingSet.WriteBack_GPR(Reg, Unmapping); }
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2016-10-01 08:12:46 +00:00
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static inline ArmReg Map_TempReg(ArmReg Reg, int32_t MipsReg, bool LoadHiWord) { return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord); }
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2016-11-23 07:58:22 +00:00
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static inline ArmReg Map_Variable(CArmRegInfo::VARIABLE_MAPPED variable, ArmReg Reg = Arm_Any) { return m_RegWorkingSet.Map_Variable(variable, Reg); }
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2016-10-01 08:12:46 +00:00
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static inline void ResetRegProtection() { m_RegWorkingSet.ResetRegProtection(); }
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2016-10-01 20:22:10 +00:00
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static inline void FixRoundModel(CRegInfo::FPU_ROUND RoundMethod) { m_RegWorkingSet.FixRoundModel(RoundMethod); }
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2016-10-01 08:12:46 +00:00
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static inline void ProtectGPR(uint32_t Reg) { m_RegWorkingSet.ProtectGPR(Reg); }
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2016-11-23 07:00:35 +00:00
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static inline void UnProtectGPR(uint32_t Reg) { m_RegWorkingSet.UnProtectGPR(Reg); }
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2016-11-23 07:58:22 +00:00
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static inline bool UnMap_ArmReg(ArmReg Reg) { return m_RegWorkingSet.UnMap_ArmReg(Reg); }
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2016-10-01 08:12:46 +00:00
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2016-11-23 07:00:35 +00:00
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void SW(bool bCheckLLbit);
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void SW_Const(uint32_t Value, uint32_t VAddr);
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void SW_Register(ArmReg Reg, uint32_t VAddr);
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2016-11-22 22:18:23 +00:00
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void LW(bool ResultSigned, bool bRecordLLBit);
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2016-11-22 22:10:15 +00:00
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void LB_KnownAddress(ArmReg Reg, uint32_t VAddr, bool SignExtend);
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2016-11-22 22:18:23 +00:00
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void LW_KnownAddress(ArmReg Reg, uint32_t VAddr);
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2016-08-11 11:09:21 +00:00
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void CompileInterpterCall (void * Function, const char * FunctionName);
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void OverflowDelaySlot(bool TestTimer);
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EXIT_LIST m_ExitInfo;
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2022-06-06 10:19:44 +00:00
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CMipsMemoryVM & m_MMU;
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PIPELINE_STAGE m_PipelineStage;
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2016-08-11 11:09:21 +00:00
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uint32_t m_CompilePC;
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2022-07-18 08:31:00 +00:00
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R4300iOpcode m_Opcode;
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2016-08-11 11:09:21 +00:00
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CCodeSection * m_Section;
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2016-11-22 22:18:23 +00:00
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static uint32_t m_TempValue;
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2016-08-11 11:09:21 +00:00
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};
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#endif
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