mirror of https://github.com/PCSX2/pcsx2.git
314 lines
8.4 KiB
C++
314 lines
8.4 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include "Hardware.h"
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#include "ps2/HwInternal.h"
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#include "ps2/eeHwTraceLog.inl"
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using namespace R5900;
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static __fi void IntCHackCheck()
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{
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// Sanity check: To protect from accidentally "rewinding" the cyclecount
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// on the few times nextBranchCycle can be behind our current cycle.
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s32 diff = g_nextEventCycle - cpuRegs.cycle;
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if( diff > 0 ) cpuRegs.cycle = g_nextEventCycle;
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}
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static const uint HwF_VerboseConLog = 1<<0;
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static const uint HwF_IntcStatHack = 1<<1; // used for Reads only.
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template< uint page > void __fastcall _hwRead128(u32 mem, mem128_t* result );
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template< uint page, bool intcstathack >
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mem32_t __fastcall _hwRead32(u32 mem)
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{
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pxAssume( (mem & 0x03) == 0 );
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switch( page )
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{
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case 0x00: return rcntRead32<0x00>( mem );
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case 0x01: return rcntRead32<0x01>( mem );
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case 0x02: return ipuRead32( mem );
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case 0x03:
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if (mem >= EEMemoryMap::VIF0_Start)
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{
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if(mem >= EEMemoryMap::VIF1_Start)
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return vifRead32<1>(mem);
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else
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return vifRead32<0>(mem);
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}
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return dmacRead32<0x03>( mem );
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case 0x04:
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case 0x05:
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case 0x06:
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case 0x07:
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{
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// [Ps2Confirm] Reading from FIFOs using non-128 bit reads is a complete mystery.
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// No game is known to attempt such a thing (yay!), so probably nothing for us to
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// worry about. Chances are, though, doing so is "legal" and yields some sort
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// of reproducible behavior. Candidate for real hardware testing.
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// Current assumption: Reads 128 bits and discards the unused portion.
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DevCon.WriteLn( Color_Cyan, "Reading 32-bit FIFO data" );
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u128 out128;
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_hwRead128<page>(mem & ~0x0f, &out128);
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return out128._u32[(mem >> 2) & 0x3];
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}
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break;
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case 0x0f:
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{
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// INTC_STAT shortcut for heavy spinning.
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// Performance Note: Visual Studio handles this best if we just manually check for it here,
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// outside the context of the switch statement below. This is likely fixed by PGO also,
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// but it's an easy enough conditional to account for anyways.
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if (mem == INTC_STAT)
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{
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if (intcstathack) IntCHackCheck();
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return psHu32(INTC_STAT);
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}
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//if ((mem & 0x1000f200) == 0x1000f200)
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// Console.Error("SBUS");
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switch( mem )
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{
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case SIO_ISR:
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case SBUS_F260:
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case 0x1000f410:
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case MCH_RICM:
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return 0;
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case SBUS_F240:
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return psHu32(SBUS_F240) | 0xF0000102;
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case MCH_DRD:
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if( !((psHu32(MCH_RICM) >> 6) & 0xF) )
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{
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switch ((psHu32(MCH_RICM)>>16) & 0xFFF)
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{
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//MCH_RICM: x:4|SA:12|x:5|SDEV:1|SOP:4|SBC:1|SDEV:5
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case 0x21://INIT
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if(rdram_sdevid < rdram_devices)
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{
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rdram_sdevid++;
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return 0x1F;
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}
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return 0;
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case 0x23://CNFGA
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return 0x0D0D; //PVER=3 | MVER=16 | DBL=1 | REFBIT=5
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case 0x24://CNFGB
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//0x0110 for PSX SVER=0 | CORG=8(5x9x7) | SPT=1 | DEVTYP=0 | BYTE=0
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return 0x0090; //SVER=0 | CORG=4(5x9x6) | SPT=1 | DEVTYP=0 | BYTE=0
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case 0x40://DEVID
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return psHu32(MCH_RICM) & 0x1F; // =SDEV
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}
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}
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return 0;
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}
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}
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break;
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}
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//Hack for Transformers and Test Drive Unlimited to simulate filling the VIF FIFO
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//It actually stalls VIF a few QW before the end of the transfer, so we need to pretend its all gone
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//else itll take aaaaaaaaages to boot.
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if(mem == (D1_CHCR + 0x10) && CHECK_VIFFIFOHACK)
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return psHu32(mem) + (vif1ch.qwc * 16);
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return psHu32(mem);
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}
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template< uint page >
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mem32_t __fastcall hwRead32(u32 mem)
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{
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mem32_t retval = _hwRead32<page,false>(mem);
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eeHwTraceLog( mem, retval, true );
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return retval;
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}
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mem32_t __fastcall hwRead32_page_0F_INTC_HACK(u32 mem)
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{
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mem32_t retval = _hwRead32<0x0f,true>(mem);
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eeHwTraceLog( mem, retval, true );
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return retval;
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}
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// --------------------------------------------------------------------------------------
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// hwRead8 / hwRead16 / hwRead64 / hwRead128
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// --------------------------------------------------------------------------------------
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template< uint page >
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mem8_t __fastcall _hwRead8(u32 mem)
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{
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u32 ret32 = _hwRead32<page, false>(mem & ~0x03);
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return ((u8*)&ret32)[mem & 0x03];
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}
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template< uint page >
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mem8_t __fastcall hwRead8(u32 mem)
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{
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mem8_t ret8 = _hwRead8<0x0f>(mem);
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eeHwTraceLog( mem, ret8, true );
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return ret8;
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}
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template< uint page >
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mem16_t __fastcall _hwRead16(u32 mem)
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{
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pxAssume( (mem & 0x01) == 0 );
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u32 ret32 = _hwRead32<page, false>(mem & ~0x03);
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return ((u16*)&ret32)[(mem>>1) & 0x01];
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}
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template< uint page >
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mem16_t __fastcall hwRead16(u32 mem)
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{
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u16 ret16 = _hwRead16<page>(mem);
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eeHwTraceLog( mem, ret16, true );
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return ret16;
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}
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mem16_t __fastcall hwRead16_page_0F_INTC_HACK(u32 mem)
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{
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pxAssume( (mem & 0x01) == 0 );
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u32 ret32 = _hwRead32<0x0f, true>(mem & ~0x03);
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u16 ret16 = ((u16*)&ret32)[(mem>>1) & 0x01];
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eeHwTraceLog( mem, ret16, true );
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return ret16;
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}
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template< uint page >
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static void _hwRead64(u32 mem, mem64_t* result )
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{
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pxAssume( (mem & 0x07) == 0 );
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switch (page)
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{
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case 0x02:
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*result = ipuRead64(mem);
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return;
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case 0x04:
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case 0x05:
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case 0x06:
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case 0x07:
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{
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// [Ps2Confirm] Reading from FIFOs using non-128 bit reads is a complete mystery.
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// No game is known to attempt such a thing (yay!), so probably nothing for us to
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// worry about. Chances are, though, doing so is "legal" and yields some sort
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// of reproducible behavior. Candidate for real hardware testing.
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// Current assumption: Reads 128 bits and discards the unused portion.
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uint wordpart = (mem >> 3) & 0x1;
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DevCon.WriteLn( Color_Cyan, "Reading 64-bit FIFO data (%s 64 bits discarded)", wordpart ? "upper" : "lower" );
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u128 out128;
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_hwRead128<page>(mem & ~0x0f, &out128);
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*result = out128._u64[wordpart];
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}
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return;
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}
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*result = _hwRead32<page,false>( mem );
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}
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template< uint page >
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void __fastcall hwRead64(u32 mem, mem64_t* result )
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{
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_hwRead64<page>( mem, result );
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eeHwTraceLog( mem, *result, true );
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}
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template< uint page >
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void __fastcall _hwRead128(u32 mem, mem128_t* result )
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{
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pxAssume( (mem & 0x0f) == 0 );
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// FIFOs are the only "legal" 128 bit registers, so we Handle them first.
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// All other registers fall back on the 64-bit handler (and from there
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// all non-IPU reads fall back to the 32-bit handler).
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switch (page)
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{
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case 0x05:
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ReadFIFO_VIF1( result );
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break;
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case 0x07:
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if (mem & 0x10)
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ZeroQWC( result ); // IPUin is write-only
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else
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ReadFIFO_IPUout( result );
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break;
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case 0x04:
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case 0x06:
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// VIF0 and GIF are write-only.
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// [Ps2Confirm] Reads from these FIFOs (and IPUin) do one of the following:
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// return zero, leave contents of the dest register unchanged, or in some
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// indeterminate state. The actual behavior probably isn't important.
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ZeroQWC( result );
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break;
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default:
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_hwRead64<page>( mem, &result->lo );
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result->hi = 0;
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break;
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}
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}
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template< uint page >
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void __fastcall hwRead128(u32 mem, mem128_t* result )
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{
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_hwRead128<page>( mem, result );
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eeHwTraceLog( mem, *result, true );
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}
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#define InstantizeHwRead(pageidx) \
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template mem8_t __fastcall hwRead8<pageidx>(u32 mem); \
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template mem16_t __fastcall hwRead16<pageidx>(u32 mem); \
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template mem32_t __fastcall hwRead32<pageidx>(u32 mem); \
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template void __fastcall hwRead64<pageidx>(u32 mem, mem64_t* result ); \
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template void __fastcall hwRead128<pageidx>(u32 mem, mem128_t* result ); \
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template mem32_t __fastcall _hwRead32<pageidx, false>(u32 mem);
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InstantizeHwRead(0x00); InstantizeHwRead(0x08);
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InstantizeHwRead(0x01); InstantizeHwRead(0x09);
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InstantizeHwRead(0x02); InstantizeHwRead(0x0a);
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InstantizeHwRead(0x03); InstantizeHwRead(0x0b);
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InstantizeHwRead(0x04); InstantizeHwRead(0x0c);
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InstantizeHwRead(0x05); InstantizeHwRead(0x0d);
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InstantizeHwRead(0x06); InstantizeHwRead(0x0e);
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InstantizeHwRead(0x07); InstantizeHwRead(0x0f);
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