mirror of https://github.com/PCSX2/pcsx2.git
196 lines
8.0 KiB
C
196 lines
8.0 KiB
C
/***********************************************************************/
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/* This file is part of the uVision/ARM development tools */
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/* Copyright KEIL ELEKTRONIK GmbH 2002-2006 */
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/***********************************************************************/
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/* */
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/* USBREG.H: Header file for Philips LPC214X USB */
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/* */
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/***********************************************************************/
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#ifndef __USBREG_H
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#define __USBREG_H
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#define SCB_BASE_ADDR 0xE01FC000 /* System Control Block */
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/* PLL48 Registers */
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#define PLL48CON (*(volatile unsigned int*)(SCB_BASE_ADDR + 0xA0))
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#define PLL48CFG (*(volatile unsigned int*)(SCB_BASE_ADDR + 0xA4))
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#define PLL48STAT (*(volatile unsigned int*)(SCB_BASE_ADDR + 0xA8))
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#define PLL48FEED (*(volatile unsigned int*)(SCB_BASE_ADDR + 0xAC))
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/* PLL48 Bit Definitions */
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#define PLLCON_PLLE (1<<0) /* PLL Enable */
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#define PLLCON_PLLC (1<<1) /* PLL Connect */
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#define PLLCFG_MSEL (0x1F<<0) /* PLL Multiplier */
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#define PLLCFG_PSEL (0x03<<5) /* PLL Divider */
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#define PLLSTAT_PLOCK (1<<10) /* PLL Lock Status */
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#define USB_BASE_ADDR 0xE0090000 /* USB Base Address */
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/* Device Interrupt Registers */
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#define DEV_INT_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0x00))
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#define DEV_INT_EN (*(volatile unsigned int*)(USB_BASE_ADDR + 0x04))
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#define DEV_INT_CLR (*(volatile unsigned int*)(USB_BASE_ADDR + 0x08))
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#define DEV_INT_SET (*(volatile unsigned int*)(USB_BASE_ADDR + 0x0C))
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#define DEV_INT_PRIO (*(volatile unsigned int*)(USB_BASE_ADDR + 0x2C))
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/* Endpoint Interrupt Registers */
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#define EP_INT_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0x30))
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#define EP_INT_EN (*(volatile unsigned int*)(USB_BASE_ADDR + 0x34))
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#define EP_INT_CLR (*(volatile unsigned int*)(USB_BASE_ADDR + 0x38))
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#define EP_INT_SET (*(volatile unsigned int*)(USB_BASE_ADDR + 0x3C))
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#define EP_INT_PRIO (*(volatile unsigned int*)(USB_BASE_ADDR + 0x40))
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/* Endpoint Realization Registers */
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#define REALIZE_EP (*(volatile unsigned int*)(USB_BASE_ADDR + 0x44))
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#define EP_INDEX (*(volatile unsigned int*)(USB_BASE_ADDR + 0x48))
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#define MAXPACKET_SIZE (*(volatile unsigned int*)(USB_BASE_ADDR + 0x4C))
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/* Command Reagisters */
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#define CMD_CODE (*(volatile unsigned int*)(USB_BASE_ADDR + 0x10))
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#define CMD_DATA (*(volatile unsigned int*)(USB_BASE_ADDR + 0x14))
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/* Data Transfer Registers */
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#define RX_DATA (*(volatile unsigned int*)(USB_BASE_ADDR + 0x18))
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#define TX_DATA (*(volatile unsigned int*)(USB_BASE_ADDR + 0x1C))
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#define RX_PLENGTH (*(volatile unsigned int*)(USB_BASE_ADDR + 0x20))
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#define TX_PLENGTH (*(volatile unsigned int*)(USB_BASE_ADDR + 0x24))
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#define USB_CTRL (*(volatile unsigned int*)(USB_BASE_ADDR + 0x28))
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/* System Register */
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#define DC_REVISION (*(volatile unsigned int*)(USB_BASE_ADDR + 0x7C))
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/* DMA Registers */
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#define DMA_REQ_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0x50))
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#define DMA_REQ_CLR (*(volatile unsigned int*)(USB_BASE_ADDR + 0x54))
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#define DMA_REQ_SET (*(volatile unsigned int*)(USB_BASE_ADDR + 0x58))
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#define UDCA_HEAD (*(volatile unsigned int*)(USB_BASE_ADDR + 0x80))
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#define EP_DMA_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0x84))
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#define EP_DMA_EN (*(volatile unsigned int*)(USB_BASE_ADDR + 0x88))
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#define EP_DMA_DIS (*(volatile unsigned int*)(USB_BASE_ADDR + 0x8C))
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#define DMA_INT_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0x90))
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#define DMA_INT_EN (*(volatile unsigned int*)(USB_BASE_ADDR + 0x94))
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#define EOT_INT_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0xA0))
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#define EOT_INT_CLR (*(volatile unsigned int*)(USB_BASE_ADDR + 0xA4))
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#define EOT_INT_SET (*(volatile unsigned int*)(USB_BASE_ADDR + 0xA8))
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#define NDD_REQ_INT_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0xAC))
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#define NDD_REQ_INT_CLR (*(volatile unsigned int*)(USB_BASE_ADDR + 0xB0))
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#define NDD_REQ_INT_SET (*(volatile unsigned int*)(USB_BASE_ADDR + 0xB4))
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#define SYS_ERR_INT_STAT (*(volatile unsigned int*)(USB_BASE_ADDR + 0xB8))
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#define SYS_ERR_INT_CLR (*(volatile unsigned int*)(USB_BASE_ADDR + 0xBC))
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#define SYS_ERR_INT_SET (*(volatile unsigned int*)(USB_BASE_ADDR + 0xC0))
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#define MODULE_ID (*(volatile unsigned int*)(USB_BASE_ADDR + 0xFC))
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/* Device Interrupt Bit Definitions */
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#define FRAME_INT 0x00000001
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#define EP_FAST_INT 0x00000002
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#define EP_SLOW_INT 0x00000004
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#define DEV_STAT_INT 0x00000008
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#define CCEMTY_INT 0x00000010
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#define CDFULL_INT 0x00000020
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#define RxENDPKT_INT 0x00000040
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#define TxENDPKT_INT 0x00000080
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#define EP_RLZED_INT 0x00000100
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#define ERR_INT 0x00000200
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/* Rx & Tx Packet Length Definitions */
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#define PKT_LNGTH_MASK 0x000003FF
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#define PKT_DV 0x00000400
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#define PKT_RDY 0x00000800
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/* USB Control Definitions */
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#define CTRL_RD_EN 0x00000001
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#define CTRL_WR_EN 0x00000002
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/* Command Codes */
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#define CMD_SET_ADDR 0x00D00500
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#define CMD_CFG_DEV 0x00D80500
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#define CMD_SET_MODE 0x00F30500
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#define CMD_RD_FRAME 0x00F50500
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#define DAT_RD_FRAME 0x00F50200
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#define CMD_RD_TEST 0x00FD0500
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#define DAT_RD_TEST 0x00FD0200
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#define CMD_SET_DEV_STAT 0x00FE0500
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#define CMD_GET_DEV_STAT 0x00FE0500
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#define DAT_GET_DEV_STAT 0x00FE0200
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#define CMD_GET_ERR_CODE 0x00FF0500
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#define DAT_GET_ERR_CODE 0x00FF0200
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#define CMD_RD_ERR_STAT 0x00FB0500
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#define DAT_RD_ERR_STAT 0x00FB0200
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#define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
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#define CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
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#define DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
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#define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
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#define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
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#define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
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#define CMD_CLR_BUF 0x00F20500
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#define DAT_CLR_BUF 0x00F20200
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#define CMD_VALID_BUF 0x00FA0500
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/* Device Address Register Definitions */
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#define DEV_ADDR_MASK 0x7F
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#define DEV_EN 0x80
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/* Device Configure Register Definitions */
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#define CONF_DVICE 0x01
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/* Device Mode Register Definitions */
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#define AP_CLK 0x01
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#define INAK_CI 0x02
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#define INAK_CO 0x04
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#define INAK_II 0x08
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#define INAK_IO 0x10
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#define INAK_BI 0x20
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#define INAK_BO 0x40
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/* Device Status Register Definitions */
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#define DEV_CON 0x01
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#define DEV_CON_CH 0x02
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#define DEV_SUS 0x04
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#define DEV_SUS_CH 0x08
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#define DEV_RST 0x10
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/* Error Code Register Definitions */
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#define ERR_EC_MASK 0x0F
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#define ERR_EA 0x10
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/* Error Status Register Definitions */
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#define ERR_PID 0x01
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#define ERR_UEPKT 0x02
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#define ERR_DCRC 0x04
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#define ERR_TIMOUT 0x08
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#define ERR_EOP 0x10
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#define ERR_B_OVRN 0x20
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#define ERR_BTSTF 0x40
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#define ERR_TGL 0x80
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/* Endpoint Select Register Definitions */
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#define EP_SEL_F 0x01
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#define EP_SEL_ST 0x02
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#define EP_SEL_STP 0x04
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#define EP_SEL_PO 0x08
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#define EP_SEL_EPN 0x10
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#define EP_SEL_B_1_FULL 0x20
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#define EP_SEL_B_2_FULL 0x40
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/* Endpoint Status Register Definitions */
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#define EP_STAT_ST 0x01
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#define EP_STAT_DA 0x20
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#define EP_STAT_RF_MO 0x40
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#define EP_STAT_CND_ST 0x80
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/* Clear Buffer Register Definitions */
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#define CLR_BUF_PO 0x01
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/* DMA Interrupt Bit Definitions */
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#define EOT_INT 0x01
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#define NDD_REQ_INT 0x02
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#define SYS_ERR_INT 0x04
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#endif /* __USBREG_H */
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