mirror of https://github.com/PCSX2/pcsx2.git
111 lines
3.8 KiB
C++
111 lines
3.8 KiB
C++
/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2009 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#ifndef __PSXMEMORY_H__
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#define __PSXMEMORY_H__
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extern u8 *psxM;
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extern u8 *psxP;
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extern u8 *psxH;
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extern u8 *psxS;
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extern uptr *psxMemWLUT;
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extern const uptr *psxMemRLUT;
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// Obtains a writable pointer into the IOP's memory, with TLB address translation.
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// If the address maps to read-only memory, NULL is returned.
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// Hacky! This should really never be used, ever, since it bypasses the iop's Hardware
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// Register handler and SPU/DEV/USB maps.
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/*template<typename T>
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static __forceinline T* iopVirtMemW( u32 mem )
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{
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return (psxMemWLUT[(mem) >> 16] == 0) ? NULL : (T*)(psxMemWLUT[(mem) >> 16] + ((mem) & 0xffff));
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}*/
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// Obtains a read-safe pointer into the IOP's physical memory, with TLB address translation.
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// Returns NULL if the address maps to an invalid/unmapped physical address.
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//
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// Hacky! This should really never be used, since anything reading through the
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// TLB should be using iopMemRead/Write instead for each individual access. That ensures
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// correct handling of page boundary crossings.
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template<typename T>
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static __forceinline const T* iopVirtMemR( u32 mem )
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{
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mem &= 0x1fffffff;
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return (psxMemRLUT[mem >> 16] == 0) ? NULL : (const T*)(psxMemRLUT[mem >> 16] + (mem & 0xffff));
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}
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// Obtains a pointer to the IOP's physical mapping (bypasses the TLB)
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static __forceinline u8* iopPhysMem( u32 addr )
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{
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return &psxM[addr & 0x1fffff];
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}
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#define psxSs8(mem) psxS[(mem) & 0xffff]
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#define psxSs16(mem) (*(s16*)&psxS[(mem) & 0x00ff])
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#define psxSs32(mem) (*(s32*)&psxS[(mem) & 0x00ff])
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#define psxSu8(mem) (*(u8*) &psxS[(mem) & 0x00ff])
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#define psxSu16(mem) (*(u16*)&psxS[(mem) & 0x00ff])
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#define psxSu32(mem) (*(u32*)&psxS[(mem) & 0x00ff])
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#define psxPs8(mem) psxP[(mem) & 0xffff]
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#define psxPs16(mem) (*(s16*)&psxP[(mem) & 0xffff])
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#define psxPs32(mem) (*(s32*)&psxP[(mem) & 0xffff])
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#define psxPu8(mem) (*(u8*) &psxP[(mem) & 0xffff])
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#define psxPu16(mem) (*(u16*)&psxP[(mem) & 0xffff])
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#define psxPu32(mem) (*(u32*)&psxP[(mem) & 0xffff])
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#define psxHs8(mem) psxH[(mem) & 0xffff]
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#define psxHs16(mem) (*(s16*)&psxH[(mem) & 0xffff])
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#define psxHs32(mem) (*(s32*)&psxH[(mem) & 0xffff])
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#define psxHu8(mem) (*(u8*) &psxH[(mem) & 0xffff])
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#define psxHu16(mem) (*(u16*)&psxH[(mem) & 0xffff])
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#define psxHu32(mem) (*(u32*)&psxH[(mem) & 0xffff])
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void psxMemAlloc();
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void psxMemReset();
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void psxMemShutdown();
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u8 iopMemRead8 (u32 mem);
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u16 iopMemRead16(u32 mem);
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u32 iopMemRead32(u32 mem);
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void iopMemWrite8 (u32 mem, u8 value);
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void iopMemWrite16(u32 mem, u16 value);
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void iopMemWrite32(u32 mem, u32 value);
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// x86reg and mmreg are always x86 regs
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void psxRecMemRead8();
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int psxRecMemConstRead8(u32 x86reg, u32 mem, u32 sign);
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void psxRecMemRead16();
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int psxRecMemConstRead16(u32 x86reg, u32 mem, u32 sign);
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void psxRecMemRead32();
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int psxRecMemConstRead32(u32 x86reg, u32 mem);
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void psxRecMemWrite8();
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int psxRecMemConstWrite8(u32 mem, int mmreg);
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void psxRecMemWrite16();
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int psxRecMemConstWrite16(u32 mem, int mmreg);
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void psxRecMemWrite32();
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int psxRecMemConstWrite32(u32 mem, int mmreg);
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#endif /* __PSXMEMORY_H__ */
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