mirror of https://github.com/PCSX2/pcsx2.git
198 lines
5.2 KiB
C
198 lines
5.2 KiB
C
/* USBlinuz
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* Copyright (C) 2002-2004 USBlinuz Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __USB_H__
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#define __USB_H__
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#include <stdio.h>
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#define USBdefs
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#include "PS2Edefs.h"
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#ifdef __WIN32__
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#define usleep(x) Sleep(x / 1000)
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#include <windows.h>
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#include <windowsx.h>
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#else
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#include <gtk/gtk.h>
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#define __inline inline
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#endif
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#define USB_LOG __Log
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typedef struct {
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int Log;
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} Config;
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Config conf;
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u8 *usbR;
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u8 *ram;
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typedef struct {
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int unused;
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} usbStruct;
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usbStruct usb;
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#define usbRs8(mem) usbR[(mem) & 0xffff]
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#define usbRs16(mem) (*(s16*)&usbR[(mem) & 0xffff])
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#define usbRs32(mem) (*(s32*)&usbR[(mem) & 0xffff])
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#define usbRu8(mem) (*(u8*) &usbR[(mem) & 0xffff])
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#define usbRu16(mem) (*(u16*)&usbR[(mem) & 0xffff])
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#define usbRu32(mem) (*(u32*)&usbR[(mem) & 0xffff])
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/*
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* URB OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net>
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*
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* usb-ohci.h
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*/
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/*
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* The HCCA (Host Controller Communications Area) is a 256 byte
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* structure defined in the OHCI spec. that the host controller is
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* told the base address of. It must be 256-byte aligned.
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*/
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#define NUM_INTS 32 /* part of the OHCI standard */
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struct ohci_hcca {
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u32 int_table[NUM_INTS]; /* Interrupt ED table */
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u16 frame_no; /* current frame number */
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u16 pad1; /* set to 0 on each frame_no change */
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u32 done_head; /* info returned for an interrupt */
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u8 reserved_for_hc[116];
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};
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/*
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* Maximum number of root hub ports.
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*/
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#define MAX_ROOT_PORTS 15 /* maximum OHCI root hub ports */
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/*
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* This is the structure of the OHCI controller's memory mapped I/O
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* region. This is Memory Mapped I/O. You must use the readl() and
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* writel() macros defined in asm/io.h to access these!!
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*/
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struct ohci_regs {
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/* control and status registers */
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u32 revision;
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u32 control;
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u32 cmdstatus;
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u32 intrstatus;
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u32 intrenable;
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u32 intrdisable;
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/* memory pointers */
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u32 hcca;
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u32 ed_periodcurrent;
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u32 ed_controlhead;
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u32 ed_controlcurrent;
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u32 ed_bulkhead;
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u32 ed_bulkcurrent;
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u32 donehead;
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/* frame counters */
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u32 fminterval;
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u32 fmremaining;
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u32 fmnumber;
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u32 periodicstart;
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u32 lsthresh;
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/* Root hub ports */
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struct ohci_roothub_regs {
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u32 a;
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u32 b;
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u32 status;
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u32 portstatus[MAX_ROOT_PORTS];
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} roothub;
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};
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/* OHCI CONTROL AND STATUS REGISTER MASKS */
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/*
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* HcControl (control) register masks
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*/
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#define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */
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#define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */
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#define OHCI_CTRL_IE (1 << 3) /* isochronous enable */
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#define OHCI_CTRL_CLE (1 << 4) /* control list enable */
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#define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */
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#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */
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#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */
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#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */
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#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */
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/* pre-shifted values for HCFS */
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# define OHCI_USB_RESET (0 << 6)
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# define OHCI_USB_RESUME (1 << 6)
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# define OHCI_USB_OPER (2 << 6)
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# define OHCI_USB_SUSPEND (3 << 6)
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/*
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* HcCommandStatus (cmdstatus) register masks
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*/
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#define OHCI_HCR (1 << 0) /* host controller reset */
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#define OHCI_CLF (1 << 1) /* control list filled */
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#define OHCI_BLF (1 << 2) /* bulk list filled */
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#define OHCI_OCR (1 << 3) /* ownership change request */
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#define OHCI_SOC (3 << 16) /* scheduling overrun count */
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/*
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* masks used with interrupt registers:
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* HcInterruptStatus (intrstatus)
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* HcInterruptEnable (intrenable)
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* HcInterruptDisable (intrdisable)
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*/
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#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */
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#define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */
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#define OHCI_INTR_SF (1 << 2) /* start frame */
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#define OHCI_INTR_RD (1 << 3) /* resume detect */
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#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */
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#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */
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#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */
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#define OHCI_INTR_OC (1 << 30) /* ownership change */
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#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */
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/**********************/
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struct ohci_hcca *hcca;
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struct ohci_regs *ohci;
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#define PSXCLK 36864000 /* 36.864 Mhz */
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USBcallback USBirq;
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void SaveConfig();
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void LoadConfig();
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FILE *usbLog;
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void __Log(char *fmt, ...);
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void SysMessage(char *fmt, ...);
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#endif
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