mirror of https://github.com/PCSX2/pcsx2.git
144 lines
6.0 KiB
C
144 lines
6.0 KiB
C
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#ifdef __linux__
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#include <signal.h>
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#endif
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#include "vtlb.h"
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#include <xmmintrin.h>
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// [TODO] This *could* be replaced with an assignment operator on u128 that implicitly
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// uses _mm_store and _mm_load internally. However, there are alignment concerns --
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// u128 is not alignment strict. (we would need a u128 and u128a for types known to
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// be strictly 128-bit aligned).
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static __fi void CopyQWC( void* dest, const void* src )
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{
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_mm_store_ps( (float*)dest, _mm_load_ps((const float*)src) );
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}
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static __fi void ZeroQWC( void* dest )
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{
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_mm_store_ps( (float*)dest, _mm_setzero_ps() );
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}
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static __fi void ZeroQWC( u128& dest )
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{
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_mm_store_ps( (float*)&dest, _mm_setzero_ps() );
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}
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#define PSM(mem) (vtlb_GetPhyPtr((mem)&0x1fffffff)) //pcsx2 is a competition.The one with most hacks wins :D
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#define psHs8(mem) (*(s8 *)&eeHw[(mem) & 0xffff])
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#define psHs16(mem) (*(s16*)&eeHw[(mem) & 0xffff])
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#define psHs32(mem) (*(s32*)&eeHw[(mem) & 0xffff])
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#define psHs64(mem) (*(s64*)&eeHw[(mem) & 0xffff])
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#define psHu8(mem) (*(u8 *)&eeHw[(mem) & 0xffff])
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#define psHu16(mem) (*(u16*)&eeHw[(mem) & 0xffff])
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#define psHu32(mem) (*(u32*)&eeHw[(mem) & 0xffff])
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#define psHu64(mem) (*(u64*)&eeHw[(mem) & 0xffff])
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#define psHu128(mem)(*(u128*)&eeHw[(mem) & 0xffff])
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#define psMs8(mem) (*(s8 *)&eeMem->Main[(mem) & 0x1ffffff])
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#define psMs16(mem) (*(s16*)&eeMem->Main[(mem) & 0x1ffffff])
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#define psMs32(mem) (*(s32*)&eeMem->Main[(mem) & 0x1ffffff])
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#define psMs64(mem) (*(s64*)&eeMem->Main[(mem) & 0x1ffffff])
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#define psMu8(mem) (*(u8 *)&eeMem->Main[(mem) & 0x1ffffff])
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#define psMu16(mem) (*(u16*)&eeMem->Main[(mem) & 0x1ffffff])
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#define psMu32(mem) (*(u32*)&eeMem->Main[(mem) & 0x1ffffff])
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#define psMu64(mem) (*(u64*)&eeMem->Main[(mem) & 0x1ffffff])
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#define psRs8(mem) (*(s8 *)&eeMem->ROM[(mem) & 0x3fffff])
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#define psRs16(mem) (*(s16*)&eeMem->ROM[(mem) & 0x3fffff])
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#define psRs32(mem) (*(s32*)&eeMem->ROM[(mem) & 0x3fffff])
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#define psRs64(mem) (*(s64*)&eeMem->ROM[(mem) & 0x3fffff])
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#define psRu8(mem) (*(u8 *)&eeMem->ROM[(mem) & 0x3fffff])
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#define psRu16(mem) (*(u16*)&eeMem->ROM[(mem) & 0x3fffff])
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#define psRu32(mem) (*(u32*)&eeMem->ROM[(mem) & 0x3fffff])
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#define psRu64(mem) (*(u64*)&eeMem->ROM[(mem) & 0x3fffff])
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#define psR1s8(mem) (*(s8 *)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR1s16(mem) (*(s16*)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR1s32(mem) (*(s32*)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR1s64(mem) (*(s64*)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR1u8(mem) (*(u8 *)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR1u16(mem) (*(u16*)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR1u32(mem) (*(u32*)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR1u64(mem) (*(u64*)&eeMem->ROM1[(mem) & 0x3ffff])
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#define psR2s8(mem) (*(s8 *)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psR2s16(mem) (*(s16*)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psR2s32(mem) (*(s32*)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psR2s64(mem) (*(s64*)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psR2u8(mem) (*(u8 *)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psR2u16(mem) (*(u16*)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psR2u32(mem) (*(u32*)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psR2u64(mem) (*(u64*)&eeMem->ROM2[(mem) & 0x3ffff])
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#define psERs8(mem) (*(s8 *)&eeMem->EROM[(mem) & 0x3ffff])
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#define psERs16(mem) (*(s16*)&eeMem->EROM[(mem) & 0x3ffff])
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#define psERs32(mem) (*(s32*)&eeMem->EROM[(mem) & 0x3ffff])
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#define psERs64(mem) (*(s64*)&eeMem->EROM[(mem) & 0x3ffff])
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#define psERu8(mem) (*(u8 *)&eeMem->EROM[(mem) & 0x3ffff])
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#define psERu16(mem) (*(u16*)&eeMem->EROM[(mem) & 0x3ffff])
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#define psERu32(mem) (*(u32*)&eeMem->EROM[(mem) & 0x3ffff])
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#define psERu64(mem) (*(u64*)&eeMem->EROM[(mem) & 0x3ffff])
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#define psSs32(mem) (*(s32 *)&eeMem->Scratch[(mem) & 0x3fff])
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#define psSs64(mem) (*(s64 *)&eeMem->Scratch[(mem) & 0x3fff])
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#define psSs128(mem) (*(s128*)&eeMem->Scratch[(mem) & 0x3fff])
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#define psSu32(mem) (*(u32 *)&eeMem->Scratch[(mem) & 0x3fff])
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#define psSu64(mem) (*(u64 *)&eeMem->Scratch[(mem) & 0x3fff])
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#define psSu128(mem) (*(u128*)&eeMem->Scratch[(mem) & 0x3fff])
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extern void memSetKernelMode();
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//extern void memSetSupervisorMode();
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extern void memSetUserMode();
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extern void memSetPageAddr(u32 vaddr, u32 paddr);
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extern void memClearPageAddr(u32 vaddr);
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extern void memBindConditionalHandlers();
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extern void memMapVUmicro();
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extern int mmap_GetRamPageInfo( u32 paddr );
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extern void mmap_MarkCountedRamPage( u32 paddr );
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extern void mmap_ResetBlockTracking();
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#define memRead8 vtlb_memRead<mem8_t>
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#define memRead16 vtlb_memRead<mem16_t>
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#define memRead32 vtlb_memRead<mem32_t>
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#define memWrite8 vtlb_memWrite<mem8_t>
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#define memWrite16 vtlb_memWrite<mem16_t>
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#define memWrite32 vtlb_memWrite<mem32_t>
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static __fi void memRead64(u32 mem, mem64_t* out) { vtlb_memRead64(mem, out); }
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static __fi void memRead64(u32 mem, mem64_t& out) { vtlb_memRead64(mem, &out); }
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static __fi void memRead128(u32 mem, mem128_t* out) { vtlb_memRead128(mem, out); }
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static __fi void memRead128(u32 mem, mem128_t& out) { vtlb_memRead128(mem, &out); }
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static __fi void memWrite64(u32 mem, const mem64_t* val) { vtlb_memWrite64(mem, val); }
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static __fi void memWrite64(u32 mem, const mem64_t& val) { vtlb_memWrite64(mem, &val); }
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static __fi void memWrite128(u32 mem, const mem128_t* val) { vtlb_memWrite128(mem, val); }
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static __fi void memWrite128(u32 mem, const mem128_t& val) { vtlb_memWrite128(mem, &val); }
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extern u16 ba0R16(u32 mem);
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