mirror of https://github.com/PCSX2/pcsx2.git
261 lines
5.8 KiB
C++
261 lines
5.8 KiB
C++
#ifndef XBYAK_XBYAK_UTIL_H_
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#define XBYAK_XBYAK_UTIL_H_
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/**
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utility class and functions for Xbyak
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@note this header is UNDER CONSTRUCTION!
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*/
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#include "xbyak/xbyak.h"
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#ifdef _WIN32
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#if (_MSC_VER < 1400) && defined(XBYAK32)
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static inline __declspec(naked) void __cpuid(int[4], int)
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{
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__asm {
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push ebx
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push esi
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mov eax, dword ptr [esp + 4 * 2 + 8] // eaxIn
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cpuid
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mov esi, dword ptr [esp + 4 * 2 + 4] // data
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mov dword ptr [esi], eax
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mov dword ptr [esi + 4], ebx
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mov dword ptr [esi + 8], ecx
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mov dword ptr [esi + 12], edx
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pop esi
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pop ebx
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ret
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}
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}
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#else
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#include <intrin.h> // for __cpuid
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#endif
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#else
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#ifndef __GNUC_PREREQ
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#define __GNUC_PREREQ(major, minor) (((major) << 16) + (minor))
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#endif
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#if __GNUC_PREREQ(4, 3) && !defined(__APPLE__)
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#include <cpuid.h>
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#else
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#if defined(__APPLE__) && defined(XBYAK32) // avoid err : can't find a register in class `BREG' while reloading `asm'
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#define __cpuid(eaxIn, a, b, c, d) __asm__ __volatile__("pushl %%ebx\ncpuid\nmovl %%ebp, %%esi\npopl %%ebx" : "=a"(a), "=S"(b), "=c"(c), "=d"(d) : "0"(eaxIn))
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#else
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#define __cpuid(eaxIn, a, b, c, d) __asm__ __volatile__("cpuid\n" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(eaxIn))
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#endif
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#endif
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#endif
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#ifdef _MSC_VER
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extern "C" unsigned __int64 __xgetbv(int);
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#endif
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namespace Xbyak { namespace util {
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/**
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CPU detection class
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*/
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class Cpu {
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unsigned int type_;
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unsigned int get32bitAsBE(const char *x) const
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{
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return x[0] | (x[1] << 8) | (x[2] << 16) | (x[3] << 24);
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}
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public:
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static inline void getCpuid(unsigned int eaxIn, unsigned int data[4])
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{
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#ifdef _WIN32
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__cpuid(reinterpret_cast<int*>(data), eaxIn);
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#else
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__cpuid(eaxIn, data[0], data[1], data[2], data[3]);
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#endif
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}
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static inline uint64 getXfeature()
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{
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#ifdef _MSC_VER
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return __xgetbv(0);
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#else
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unsigned int eax, edx;
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__asm__ volatile("xgetbv" : "=a"(eax), "=d"(edx) : "c"(0));
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return ((uint64)edx << 32) | eax;
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#endif
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}
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enum Type {
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NONE = 0,
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tMMX = 1 << 0,
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tMMX2 = 1 << 1,
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tCMOV = 1 << 2,
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tSSE = 1 << 3,
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tSSE2 = 1 << 4,
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tSSE3 = 1 << 5,
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tSSSE3 = 1 << 6,
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tSSE41 = 1 << 7,
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tSSE42 = 1 << 8,
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tPOPCNT = 1 << 9,
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tAESNI = 1 << 10,
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tSSE5 = 1 << 11,
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tOSXSACE = 1 << 12,
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tPCLMULQDQ = 1 << 13,
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tAVX = 1 << 14,
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tFMA = 1 << 15,
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t3DN = 1 << 16,
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tE3DN = 1 << 17,
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tSSE4a = 1 << 18,
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tRDTSCP = 1 << 19,
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tINTEL = 1 << 24,
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tAMD = 1 << 25
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};
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Cpu()
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: type_(NONE)
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{
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unsigned int data[4];
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getCpuid(0, data);
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static const char intel[] = "ntel";
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static const char amd[] = "cAMD";
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if (data[2] == get32bitAsBE(amd)) {
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type_ |= tAMD;
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getCpuid(0x80000001, data);
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if (data[3] & (1U << 31)) type_ |= t3DN;
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if (data[3] & (1U << 15)) type_ |= tCMOV;
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if (data[3] & (1U << 30)) type_ |= tE3DN;
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if (data[3] & (1U << 22)) type_ |= tMMX2;
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if (data[3] & (1U << 27)) type_ |= tRDTSCP;
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}
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if (data[2] == get32bitAsBE(intel)) {
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type_ |= tINTEL;
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getCpuid(0x80000001, data);
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if (data[3] & (1U << 27)) type_ |= tRDTSCP;
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}
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getCpuid(1, data);
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if (data[2] & (1U << 0)) type_ |= tSSE3;
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if (data[2] & (1U << 9)) type_ |= tSSSE3;
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if (data[2] & (1U << 19)) type_ |= tSSE41;
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if (data[2] & (1U << 20)) type_ |= tSSE42;
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if (data[2] & (1U << 23)) type_ |= tPOPCNT;
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if (data[2] & (1U << 25)) type_ |= tAESNI;
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if (data[2] & (1U << 1)) type_ |= tPCLMULQDQ;
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if (data[2] & (1U << 27)) type_ |= tOSXSACE;
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if (type_ & tOSXSACE) {
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// check XFEATURE_ENABLED_MASK[2:1] = '11b'
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uint64 bv = getXfeature();
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if ((bv & 6) == 6) {
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if (data[2] & (1U << 28)) type_ |= tAVX;
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if (data[2] & (1U << 12)) type_ |= tFMA;
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}
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}
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if (data[3] & (1U << 15)) type_ |= tCMOV;
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if (data[3] & (1U << 23)) type_ |= tMMX;
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if (data[3] & (1U << 25)) type_ |= tMMX2 | tSSE;
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if (data[3] & (1U << 26)) type_ |= tSSE2;
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}
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bool has(Type type) const
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{
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return (type & type_) != 0;
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}
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};
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class Clock {
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public:
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static inline uint64 getRdtsc()
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{
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#ifdef _MSC_VER
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return __rdtsc();
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#else
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unsigned int eax, edx;
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__asm__ volatile("rdtsc" : "=a"(eax), "=d"(edx));
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return ((uint64)edx << 32) | eax;
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#endif
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}
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Clock()
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: clock_(0)
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, count_(0)
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{
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}
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void begin()
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{
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clock_ -= getRdtsc();
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}
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void end()
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{
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clock_ += getRdtsc();
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count_++;
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}
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int getCount() const { return count_; }
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uint64 getClock() const { return clock_; }
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void clear() { count_ = 0; clock_ = 0; }
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private:
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uint64 clock_;
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int count_;
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};
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#ifdef XBYAK32
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namespace local {
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#ifdef _WIN32
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#define XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(x) static inline __declspec(naked) void set_eip_to_ ## x() { \
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__asm { mov x, dword ptr [esp] } __asm { ret } \
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}
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#else
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#define XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(x) static inline void set_eip_to_ ## x() { \
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__asm__ volatile("movl (%esp), %" #x); \
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}
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#endif
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XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(eax)
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XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(ecx)
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XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(edx)
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XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(ebx)
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XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(esi)
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XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(edi)
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XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG(ebp)
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#undef XBYAK_LOCAL_DEFINE_SET_EIP_TO_REG
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} // end of local
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/**
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get eip to out register
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@note out is not esp
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*/
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template<class T>
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void setEipTo(T *self, const Xbyak::Reg32& out)
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{
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#if 0
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self->call("@f");
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self->L("@@");
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self->pop(out);
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#else
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int idx = out.getIdx();
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switch (idx) {
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case Xbyak::Operand::EAX:
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self->call((void*)local::set_eip_to_eax);
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break;
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case Xbyak::Operand::ECX:
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self->call((void*)local::set_eip_to_ecx);
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break;
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case Xbyak::Operand::EDX:
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self->call((void*)local::set_eip_to_edx);
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break;
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case Xbyak::Operand::EBX:
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self->call((void*)local::set_eip_to_ebx);
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break;
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case Xbyak::Operand::ESI:
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self->call((void*)local::set_eip_to_esi);
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break;
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case Xbyak::Operand::EDI:
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self->call((void*)local::set_eip_to_edi);
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break;
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case Xbyak::Operand::EBP:
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self->call((void*)local::set_eip_to_ebp);
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break;
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default:
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assert(0);
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}
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#endif
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}
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#endif
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} } // end of util
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#endif
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