mirror of https://github.com/PCSX2/pcsx2.git
611 lines
16 KiB
C++
611 lines
16 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2009 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include "GS.h"
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#include "Gif.h"
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#include "Vif_Dma.h"
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#include "iR5900.h"
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using std::min;
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// A three-way toggle used to determine if the GIF is stalling (transferring) or done (finished).
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// Should be a gifstate_t rather then int, but I don't feel like possibly interfering with savestates right now.
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static int gifstate = GIF_STATE_READY;
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static bool gifempty = false;
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static bool gspath3done = false;
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static u32 gscycles = 0, prevcycles = 0, mfifocycles = 0;
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static u32 gifqwc = 0;
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static bool gifmfifoirq = false;
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static __forceinline void clearFIFOstuff(bool full)
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{
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GSCSRr &= ~0xC000; //Clear FIFO stuff
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if (full)
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GSCSRr |= 0x8000; //FIFO full
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else
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GSCSRr |= 0x4000; //FIFO empty
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}
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__forceinline void gsInterrupt()
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{
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GIF_LOG("gsInterrupt: %8.8x", cpuRegs.cycle);
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if (!(gif->chcr.STR))
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{
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//Console.WriteLn("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x", gif->chcr._u32, gif->qwc, done);
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return;
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}
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if ((vif1.cmd & 0x7f) == 0x51) // DIRECTHL
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{
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// Not waiting for the end of the Gif transfer.
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if (Path3progress != IMAGE_MODE) vif1Regs->stat.VGW = false;
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}
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if (Path3progress == STOPPED_MODE)
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{
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gifRegs->stat.clear_flags(GIF_STAT_APATH3 | GIF_STAT_OPH);
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}
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if ((gif->qwc > 0) || (!gspath3done))
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{
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if (!dmacRegs->ctrl.DMAE)
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{
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Console.Warning("gs dma masked, re-scheduling...");
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// re-raise the int shortly in the future
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CPU_INT( DMAC_GIF, 64 );
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return;
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}
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GIFdma();
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return;
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}
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gspath3done = false;
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gscycles = 0;
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gif->chcr.STR = false;
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vif1Regs->stat.VGW = false;
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gifRegs->stat.clear_flags(GIF_STAT_APATH3 | GIF_STAT_OPH | GIF_STAT_P3Q | GIF_STAT_FQC);
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clearFIFOstuff(false);
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hwDmacIrq(DMAC_GIF);
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GIF_LOG("GIF DMA end");
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}
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static u32 WRITERING_DMA(u32 *pMem, u32 qwc)
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{
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gifRegs->stat.APATH = GIF_APATH3;
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gifRegs->stat.OPH = true;
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int size = GetMTGS().PrepDataPacket(GIF_PATH_3, pMem, qwc);
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u8* pgsmem = GetMTGS().GetDataPacketPtr();
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memcpy_aligned(pgsmem, pMem, size<<4);
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GetMTGS().SendDataPacket();
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return size;
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}
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static u32 WRITERING_DMA(tDMA_TAG *pMem, u32 qwc)
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{
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return WRITERING_DMA((u32*)pMem, qwc);
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}
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int _GIFchain()
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{
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u32 qwc = min( gifsplit, (int)gif->qwc );
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tDMA_TAG *pMem;
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pMem = dmaGetAddr(gif->madr);
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if (pMem == NULL)
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{
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// reset path3, fixes dark cloud 2
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GIFPath_Clear( GIF_PATH_3 );
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//must increment madr and clear qwc, else it loops
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gif->madr += gif->qwc * 16;
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gif->qwc = 0;
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Console.Warning( "Hackfix - NULL GIFchain" );
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return -1;
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}
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return WRITERING_DMA(pMem, qwc);
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}
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static __forceinline void GIFchain()
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{
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Registers::Freeze();
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// qwc check now done outside this function
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// Voodoocycles
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// >> 2 so Drakan and Tekken 5 don't mess up in some PATH3 transfer. Cycles to interrupt were getting huge..
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/*if (gif->qwc)*/ gscycles+= ( _GIFchain() >> 2 ); /* guessing */
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Registers::Thaw();
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}
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static __forceinline bool checkTieBit(tDMA_TAG* &ptag)
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{
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if (gif->chcr.TIE && ptag->IRQ)
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{
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GIF_LOG("dmaIrq Set");
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gspath3done = true;
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return true;
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}
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return false;
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}
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static __forceinline tDMA_TAG* ReadTag()
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{
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tDMA_TAG* ptag = dmaGetAddr(gif->tadr); //Set memory pointer to TADR
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if (!(gif->transfer("Gif", ptag))) return NULL;
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gif->madr = ptag[1]._u32; //MADR = ADDR field + SPR
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gscycles += 2; // Add 1 cycles from the QW read for the tag
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gspath3done = hwDmacSrcChainWithStack(gif, ptag->ID);
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return ptag;
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}
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static __forceinline tDMA_TAG* ReadTag2()
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{
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tDMA_TAG* ptag = dmaGetAddr(gif->tadr); //Set memory pointer to TADR
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gif->unsafeTransfer(ptag);
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gif->madr = ptag[1]._u32;
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gspath3done = hwDmacSrcChainWithStack(gif, ptag->ID);
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return ptag;
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}
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void GIFdma()
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{
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tDMA_TAG *ptag;
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gscycles = prevcycles;
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if (gifRegs->ctrl.PSE) // temporarily stop
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{
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Console.WriteLn("Gif dma temp paused?");
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return;
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}
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if ((dmacRegs->ctrl.STD == STD_GIF) && (prevcycles != 0))
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{
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Console.WriteLn("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3, gif->madr, psHu32(DMAC_STADR));
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if ((gif->madr + (gif->qwc * 16)) > dmacRegs->stadr.ADDR)
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{
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CPU_INT(DMAC_GIF, gscycles);
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gscycles = 0;
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return;
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}
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prevcycles = 0;
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gif->qwc = 0;
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}
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clearFIFOstuff(true);
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gifRegs->stat.FQC |= 0x10;// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
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//Path2 gets priority in intermittent mode
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if ((gifRegs->stat.P1Q || (vif1.cmd & 0x7f) == 0x50) && gifRegs->mode.IMT && (Path3progress == IMAGE_MODE))
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{
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// We are in image mode doing DIRECTHL, Path 1 is in queue, and in intermittant mode.
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GIF_LOG("Waiting VU %x, PATH2 %x, GIFMODE %x Progress %x", gifRegs->stat.P1Q, (vif1.cmd & 0x7f), gifRegs->mode._u32, Path3progress);
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CPU_INT(DMAC_GIF, 16);
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return;
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}
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if (vif1Regs->mskpath3 || gifRegs->mode.M3R)
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{
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if (gif->qwc == 0)
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{
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if ((gif->chcr.MOD == CHAIN_MODE) && gif->chcr.STR)
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{
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ptag = ReadTag();
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if (ptag == NULL) return;
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GIF_LOG("PTH3 MASK gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr);
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//Check TIE bit of CHCR and IRQ bit of tag
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if (checkTieBit(ptag)) GIF_LOG("PATH3 MSK dmaIrq Set");
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}
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}
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if (Path3progress == STOPPED_MODE) /*|| (vif1Regs->stat._u32 |= VIF1_STAT_VGW) == 0*/
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{
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vif1Regs->stat.VGW = false;
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if (gif->qwc == 0) CPU_INT(DMAC_GIF, 16);
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return;
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}
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//Check with Path3 masking games
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if (gif->qwc > 0) {
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GIFchain();
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CPU_INT(DMAC_GIF, gscycles * BIAS);
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return;
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}
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//else DevCon.WriteLn("GIFdma() case 1, but qwc = 0!"); //Don't do 0 GIFchain and then return
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}
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// Transfer Dn_QWC from Dn_MADR to GIF
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if ((gif->chcr.MOD == NORMAL_MODE) || (gif->qwc > 0)) // Normal Mode
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{
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if ((dmacRegs->ctrl.STD == STD_GIF) && (gif->chcr.MOD == NORMAL_MODE))
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{
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Console.WriteLn("DMA Stall Control on GIF normal");
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}
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//Check with Path3 masking games
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if (gif->qwc > 0) {
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GIFchain(); //Transfers the data set by the switch
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CPU_INT(DMAC_GIF, gscycles * BIAS);
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return;
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}
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//else DevCon.WriteLn("GIFdma() case 2, but qwc = 0!"); //Don't do 0 GIFchain and then return, fixes Dual Hearts
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}
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if ((gif->chcr.MOD == CHAIN_MODE) && (!gspath3done)) // Chain Mode
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{
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ptag = ReadTag();
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if (ptag == NULL) return;
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GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr);
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if (dmacRegs->ctrl.STD == STD_GIF)
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{
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// there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall
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if (!gspath3done && ((gif->madr + (gif->qwc * 16)) > dmacRegs->stadr.ADDR) && (ptag->ID == TAG_REFS))
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{
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// stalled.
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// We really need to test this. Pay attention to prevcycles, as it used to trigger GIFchains in the code above. (rama)
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Console.WriteLn("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3,gif->madr, psHu32(DMAC_STADR));
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prevcycles = gscycles;
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gif->tadr -= 16;
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hwDmacIrq(DMAC_STALL_SIS);
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CPU_INT(DMAC_GIF, gscycles);
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gscycles = 0;
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return;
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}
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}
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checkTieBit(ptag);
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}
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prevcycles = 0;
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if ((!gspath3done) && (gif->qwc == 0))
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{
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ptag = dmaGetAddr(gif->tadr); //Set memory pointer to TADR
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gif->unsafeTransfer(ptag);
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gif->madr = ptag[1]._u32;
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gspath3done = hwDmacSrcChainWithStack(gif, ptag->ID);
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checkTieBit(ptag);
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GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr);
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CPU_INT(DMAC_GIF, gscycles * BIAS);
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}
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else
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{
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CPU_INT(DMAC_GIF, gscycles * BIAS);
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gscycles = 0;
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}
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}
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void dmaGIF()
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{
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//We used to add wait time for the buffer to fill here, fixing some timing problems in path 3 masking
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//It takes the time of 24 QW for the BUS to become ready - The Punisher And Streetball
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GIF_LOG("dmaGIFstart chcr = %lx, madr = %lx, qwc = %lx\n tadr = %lx, asr0 = %lx, asr1 = %lx", gif->chcr._u32, gif->madr, gif->qwc, gif->tadr, gif->asr0, gif->asr1);
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Path3progress = STOPPED_MODE;
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gspath3done = false; // For some reason this doesn't clear? So when the system starts the thread, we will clear it :)
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gifRegs->stat.P3Q = true;
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gifRegs->stat.FQC |= 0x10; // hack ;)
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clearFIFOstuff(true);
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if (dmacRegs->ctrl.MFD == MFD_GIF) // GIF MFIFO
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{
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//Console.WriteLn("GIF MFIFO");
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gifMFIFOInterrupt();
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return;
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}
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if ((gif->qwc == 0) && (gif->chcr.MOD != NORMAL_MODE))
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{
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tDMA_TAG* ptag = ReadTag2();
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GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr);
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checkTieBit(ptag);
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GIFdma();
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return;
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}
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//Halflife sets a QWC amount in chain mode, no tadr set.
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if (gif->qwc > 0) gspath3done = true;
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GIFdma();
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}
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// called from only one location, so forceinline it:
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static __forceinline bool mfifoGIFrbTransfer()
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{
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u32 mfifoqwc = min(gifqwc, (u32)gif->qwc);
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u32 *src;
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/* Check if the transfer should wrap around the ring buffer */
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if ((gif->madr + mfifoqwc * 16) > (dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK + 16))
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{
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uint s1 = ((dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK + 16) - gif->madr) >> 4;
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uint s2 = (mfifoqwc - s1);
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// fixme - I don't think these should use WRITERING_DMA, since our source
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// isn't the DmaGetAddr(gif->madr) address that WRITERING_DMA expects.
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/* it does (wrap around), so first copy 's1' bytes from 'addr' to 'data' */
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src = (u32*)PSM(gif->madr);
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if (src == NULL) return false;
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s1 = WRITERING_DMA(src, s1);
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if (s1 == (mfifoqwc - s2))
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{
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/* and second copy 's2' bytes from 'maddr' to '&data[s1]' */
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src = (u32*)PSM(dmacRegs->rbor.ADDR);
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if (src == NULL) return false;
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s2 = WRITERING_DMA(src, s2);
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}
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else
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{
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s2 = 0;
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}
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mfifoqwc = s1 + s2;
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}
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else
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{
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/* it doesn't, so just transfer 'qwc*16' words from 'gif->madr' to GS */
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src = (u32*)PSM(gif->madr);
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if (src == NULL) return false;
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mfifoqwc = WRITERING_DMA(src, mfifoqwc);
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gif->madr = dmacRegs->rbor.ADDR + (gif->madr & dmacRegs->rbsr.RMSK);
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}
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gifqwc -= mfifoqwc;
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return true;
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}
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// called from only one location, so forceinline it:
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static __forceinline bool mfifoGIFchain()
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{
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/* Is QWC = 0? if so there is nothing to transfer */
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if (gif->qwc == 0) return true;
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if (gif->madr >= dmacRegs->rbor.ADDR &&
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gif->madr <= (dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK))
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{
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if (!mfifoGIFrbTransfer()) return false;
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}
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else
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{
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int mfifoqwc;
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tDMA_TAG *pMem = dmaGetAddr(gif->madr);
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if (pMem == NULL) return false;
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mfifoqwc = WRITERING_DMA(pMem, gif->qwc);
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mfifocycles += (mfifoqwc) * 2; /* guessing */
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}
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return true;
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}
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static u32 qwctag(u32 mask)
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{
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return (dmacRegs->rbor.ADDR + (mask & dmacRegs->rbsr.RMSK));
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}
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void mfifoGIFtransfer(int qwc)
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{
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tDMA_TAG *ptag;
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mfifocycles = 0;
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gifmfifoirq = false;
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if(qwc > 0 )
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{
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gifqwc += qwc;
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if (!(gifstate & GIF_STATE_EMPTY)) return;
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// if (gifempty == false) return;
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gifstate &= ~GIF_STATE_EMPTY;
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gifempty = false;
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}
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GIF_LOG("mfifoGIFtransfer %x madr %x, tadr %x", gif->chcr._u32, gif->madr, gif->tadr);
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if (gif->qwc == 0)
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{
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if (gif->tadr == spr0->madr)
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{
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//if( gifqwc > 1 ) DevCon.WriteLn("gif mfifo tadr==madr but qwc = %d", gifqwc);
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hwDmacIrq(DMAC_MFIFO_EMPTY);
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gifstate |= GIF_STATE_EMPTY;
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gifempty = true;
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return;
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}
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gif->tadr = qwctag(gif->tadr);
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ptag = dmaGetAddr(gif->tadr);
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gif->unsafeTransfer(ptag);
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gif->madr = ptag[1]._u32;
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mfifocycles += 2;
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GIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x",
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ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr, gif->tadr, gifqwc, spr0->madr);
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gifqwc--;
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|
switch (ptag->ID)
|
|
{
|
|
case TAG_REFE: // Refe - Transfer Packet According to ADDR field
|
|
gif->tadr = qwctag(gif->tadr + 16);
|
|
gifstate = GIF_STATE_DONE; //End Transfer
|
|
break;
|
|
|
|
case TAG_CNT: // CNT - Transfer QWC following the tag.
|
|
gif->madr = qwctag(gif->tadr + 16); //Set MADR to QW after Tag
|
|
gif->tadr = qwctag(gif->madr + (gif->qwc << 4)); //Set TADR to QW following the data
|
|
gifstate = GIF_STATE_READY;
|
|
break;
|
|
|
|
case TAG_NEXT: // Next - Transfer QWC following tag. TADR = ADDR
|
|
{
|
|
u32 temp = gif->madr; //Temporarily Store ADDR
|
|
gif->madr = qwctag(gif->tadr + 16); //Set MADR to QW following the tag
|
|
gif->tadr = temp; //Copy temporarily stored ADDR to Tag
|
|
gifstate = GIF_STATE_READY;
|
|
break;
|
|
}
|
|
|
|
case TAG_REF: // Ref - Transfer QWC from ADDR field
|
|
case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control)
|
|
gif->tadr = qwctag(gif->tadr + 16); //Set TADR to next tag
|
|
gifstate = GIF_STATE_READY;
|
|
break;
|
|
|
|
case TAG_END: // End - Transfer QWC following the tag
|
|
gif->madr = qwctag(gif->tadr + 16); //Set MADR to data following the tag
|
|
gif->tadr = qwctag(gif->madr + (gif->qwc << 4)); //Set TADR to QW following the data
|
|
gifstate = GIF_STATE_DONE; //End Transfer
|
|
break;
|
|
}
|
|
|
|
if ((gif->chcr.TIE) && (ptag->IRQ))
|
|
{
|
|
SPR_LOG("dmaIrq Set");
|
|
gifstate = GIF_STATE_DONE;
|
|
gifmfifoirq = true;
|
|
}
|
|
}
|
|
|
|
Registers::Freeze();
|
|
if (!mfifoGIFchain())
|
|
{
|
|
Console.WriteLn("GIF dmaChain error size=%d, madr=%lx, tadr=%lx", gif->qwc, gif->madr, gif->tadr);
|
|
gifstate = GIF_STATE_STALL;
|
|
}
|
|
Registers::Thaw();
|
|
|
|
if ((gif->qwc == 0) && (gifstate & GIF_STATE_DONE)) gifstate = GIF_STATE_STALL;
|
|
CPU_INT(11,mfifocycles);
|
|
|
|
SPR_LOG("mfifoGIFtransfer end %x madr %x, tadr %x", gif->chcr._u32, gif->madr, gif->tadr);
|
|
}
|
|
|
|
void gifMFIFOInterrupt()
|
|
{
|
|
//Console.WriteLn("gifMFIFOInterrupt");
|
|
mfifocycles = 0;
|
|
|
|
if (Path3progress == STOPPED_MODE)
|
|
{
|
|
gifRegs->stat.APATH = GIF_APATH_IDLE;
|
|
gifRegs->stat.OPH = false;
|
|
}
|
|
|
|
if ((spr0->chcr.STR) && (spr0->qwc == 0))
|
|
{
|
|
spr0->chcr.STR = false;
|
|
hwDmacIrq(DMAC_FROM_SPR);
|
|
}
|
|
|
|
if (!(gif->chcr.STR))
|
|
{
|
|
Console.WriteLn("WTF GIFMFIFO");
|
|
cpuRegs.interrupt &= ~(1 << 11);
|
|
return;
|
|
}
|
|
|
|
if ((gifRegs->stat.P1Q || (vif1.cmd & 0x7f) == 0x50) && gifRegs->mode.IMT && Path3progress == IMAGE_MODE) //Path2 gets priority in intermittent mode
|
|
{
|
|
//GIF_LOG("Waiting VU %x, PATH2 %x, GIFMODE %x Progress %x", psHu32(GIF_STAT) & 0x100, (vif1.cmd & 0x7f), psHu32(GIF_MODE), Path3progress);
|
|
CPU_INT(11,mfifocycles);
|
|
return;
|
|
}
|
|
|
|
if (!(gifstate & GIF_STATE_STALL))
|
|
{
|
|
if (gifqwc <= 0)
|
|
{
|
|
//Console.WriteLn("Empty");
|
|
hwDmacIrq(DMAC_MFIFO_EMPTY);
|
|
gifstate |= GIF_STATE_EMPTY;
|
|
gifempty = true;
|
|
|
|
gifRegs->stat.IMT = false;
|
|
return;
|
|
}
|
|
mfifoGIFtransfer(0);
|
|
return;
|
|
}
|
|
|
|
#ifdef PCSX2_DEVBUILD
|
|
if ((gifstate & GIF_STATE_READY) || (gif->qwc > 0))
|
|
{
|
|
Console.Error("gifMFIFO Panic > Shouldn't go here!");
|
|
return;
|
|
}
|
|
#endif
|
|
//if(gifqwc > 0) Console.WriteLn("GIF MFIFO ending with stuff in it %x", gifqwc);
|
|
if (!gifmfifoirq) gifqwc = 0;
|
|
|
|
gspath3done = false;
|
|
gscycles = 0;
|
|
|
|
gifRegs->stat.clear_flags(GIF_STAT_APATH3 | GIF_STAT_OPH | GIF_STAT_P3Q | GIF_STAT_FQC); // OPH, APATH, P3Q, FQC = 0
|
|
|
|
vif1Regs->stat.VGW = false;
|
|
gif->chcr.STR = false;
|
|
gifstate = GIF_STATE_READY;
|
|
hwDmacIrq(DMAC_GIF);
|
|
clearFIFOstuff(false);
|
|
}
|
|
|
|
void SaveStateBase::gifFreeze()
|
|
{
|
|
FreezeTag( "GIFdma" );
|
|
|
|
Freeze( gifstate );
|
|
Freeze( gifqwc );
|
|
Freeze( gspath3done );
|
|
Freeze( gscycles );
|
|
//Freeze(gifempty);
|
|
// Note: mfifocycles is not a persistent var, so no need to save it here.
|
|
}
|