mirror of https://github.com/PCSX2/pcsx2.git
113 lines
4.4 KiB
C++
113 lines
4.4 KiB
C++
/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2009 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#pragma once
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// Implementations found here: TEST + BTS/BT/BTC/BTR + BSF/BSR! (for lack of better location)
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// Note: This header is meant to be included from within the x86Emitter::Internal namespace.
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//////////////////////////////////////////////////////////////////////////////////////////
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// TEST instruction Implementation
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//
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class xImpl_Test
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{
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public:
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// ------------------------------------------------------------------------
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template< typename T > __forceinline
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void operator()( const xRegister<T>& to, const xRegister<T>& from ) const
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{
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prefix16<T>();
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xWrite8( Is8BitOp<T>() ? 0x84 : 0x85 );
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EmitSibMagic( from, to );
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}
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// ------------------------------------------------------------------------
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template< typename T > __forceinline
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void operator()( const ModSibStrict<T>& dest, int imm ) const
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{
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prefix16<T>();
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xWrite8( Is8BitOp<T>() ? 0xf6 : 0xf7 );
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EmitSibMagic( 0, dest );
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xWrite<T>( imm );
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}
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// ------------------------------------------------------------------------
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template< typename T > __forceinline
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void operator()( const xRegister<T>& to, int imm ) const
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{
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prefix16<T>();
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if( to.IsAccumulator() )
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xWrite8( Is8BitOp<T>() ? 0xa8 : 0xa9 );
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else
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{
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xWrite8( Is8BitOp<T>() ? 0xf6 : 0xf7 );
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EmitSibMagic( 0, to );
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}
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xWrite<T>( imm );
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}
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xImpl_Test() {} // Why does GCC need these?
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};
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enum G8Type
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{
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G8Type_BT = 4,
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G8Type_BTS,
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G8Type_BTR,
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G8Type_BTC,
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};
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//////////////////////////////////////////////////////////////////////////////////////////
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// BSF / BSR -- 16/32 operands supported only.
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//
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// 0xbc [fwd] / 0xbd [rev]
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//
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template< u16 Opcode >
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class xImpl_BitScan
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{
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public:
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xImpl_BitScan() {}
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__forceinline void operator()( const xRegister32& to, const xRegister32& from ) const { xOpWrite0F( Opcode, to, from ); }
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__forceinline void operator()( const xRegister16& to, const xRegister16& from ) const { xOpWrite0F( 0x66, Opcode, to, from ); }
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__forceinline void operator()( const xRegister32& to, const ModSibBase& sibsrc ) const { xOpWrite0F( Opcode, to, sibsrc ); }
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__forceinline void operator()( const xRegister16& to, const ModSibBase& sibsrc ) const { xOpWrite0F( 0x66, Opcode, to, sibsrc ); }
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};
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//////////////////////////////////////////////////////////////////////////////////////////
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// Bit Test Instructions - Valid on 16/32 bit instructions only.
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//
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template< G8Type InstType >
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class xImpl_Group8
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{
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static const uint RegFormOp = 0xa3 | (InstType << 3);
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public:
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__forceinline void operator()( const xRegister32& bitbase, const xRegister32& bitoffset ) const { xOpWrite0F( RegFormOp, bitbase, bitoffset ); }
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__forceinline void operator()( const xRegister16& bitbase, const xRegister16& bitoffset ) const { xOpWrite0F( 0x66, RegFormOp, bitbase, bitoffset ); }
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__forceinline void operator()( const ModSibBase& bitbase, const xRegister32& bitoffset ) const { xOpWrite0F( RegFormOp, bitoffset, bitbase ); }
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__forceinline void operator()( const ModSibBase& bitbase, const xRegister16& bitoffset ) const { xOpWrite0F( 0x66, RegFormOp, bitoffset, bitbase ); }
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__forceinline void operator()( const ModSibStrict<u32>& bitbase, u8 bitoffset ) const { xOpWrite0F( 0xba, InstType, bitbase, bitoffset ); }
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__forceinline void operator()( const ModSibStrict<u16>& bitbase, u8 bitoffset ) const { xOpWrite0F( 0x66, 0xba, InstType, bitbase, bitoffset ); }
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__forceinline void operator()( const xRegister<u32>& bitbase, u8 bitoffset ) const { xOpWrite0F( 0xba, InstType, bitbase, bitoffset ); }
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__forceinline void operator()( const xRegister<u16>& bitbase, u8 bitoffset ) const { xOpWrite0F( 0x66, 0xba, InstType, bitbase, bitoffset ); }
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xImpl_Group8() {}
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};
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