mirror of https://github.com/PCSX2/pcsx2.git
240 lines
10 KiB
C++
240 lines
10 KiB
C++
/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2009 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#pragma once
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// Header: ix86_impl_movs.h -- covers mov, cmov, movsx/movzx, and SETcc (which shares
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// with cmov many similarities).
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// Note: This header is meant to be included from within the x86Emitter::Internal namespace.
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//////////////////////////////////////////////////////////////////////////////////////////
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// MOV instruction Implementation
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class MovImplAll
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{
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public:
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// ------------------------------------------------------------------------
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template< typename T > __forceinline void operator()( const xRegister<T>& to, const xRegister<T>& from ) const
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{
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if( to == from ) return; // ignore redundant MOVs.
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prefix16<T>();
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xWrite8( Is8BitOp<T>() ? 0x88 : 0x89 );
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EmitSibMagic( from, to );
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}
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const ModSibBase& dest, const xRegister<T>& from ) const
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{
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prefix16<T>();
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// mov eax has a special from when writing directly to a DISP32 address
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// (sans any register index/base registers).
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if( from.IsAccumulator() && dest.Index.IsEmpty() && dest.Base.IsEmpty() )
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{
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xWrite8( Is8BitOp<T>() ? 0xa2 : 0xa3 );
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xWrite32( dest.Displacement );
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}
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else
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{
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xWrite8( Is8BitOp<T>() ? 0x88 : 0x89 );
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EmitSibMagic( from.Id, dest );
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}
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}
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const xRegister<T>& to, const ModSibBase& src ) const
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{
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prefix16<T>();
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// mov eax has a special from when reading directly from a DISP32 address
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// (sans any register index/base registers).
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if( to.IsAccumulator() && src.Index.IsEmpty() && src.Base.IsEmpty() )
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{
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xWrite8( Is8BitOp<T>() ? 0xa0 : 0xa1 );
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xWrite32( src.Displacement );
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}
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else
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{
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xWrite8( Is8BitOp<T>() ? 0x8a : 0x8b );
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EmitSibMagic( to, src );
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}
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}
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const ModSibStrict<T>& dest, int imm ) const
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{
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prefix16<T>();
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xWrite8( Is8BitOp<T>() ? 0xc6 : 0xc7 );
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EmitSibMagic( 0, dest );
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xWrite<T>( imm );
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}
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// ------------------------------------------------------------------------
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// preserve_flags - set to true to disable optimizations which could alter the state of
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// the flags (namely replacing mov reg,0 with xor).
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template< typename T > __emitinline void operator()( const xRegister<T>& to, int imm, bool preserve_flags=false ) const
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{
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if( !preserve_flags && (imm == 0) )
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xXOR( to, to );
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else
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{
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// Note: MOV does not have (reg16/32,imm8) forms.
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prefix16<T>();
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xWrite8( (Is8BitOp<T>() ? 0xb0 : 0xb8) | to.Id );
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xWrite<T>( imm );
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}
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}
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const ModSibBase& to, const xImmReg<T>& immOrReg ) const
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{
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_DoI_helpermess( *this, to, immOrReg );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xImmReg<T>& immOrReg ) const
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{
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_DoI_helpermess( *this, to, immOrReg );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, int imm ) const
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{
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_DoI_helpermess( *this, to, imm );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xDirectOrIndirect<T>& from ) const
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{
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if( to == from ) return;
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_DoI_helpermess( *this, to, from );
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}
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template< typename T > __noinline void operator()( const xRegister<T>& to, const xDirectOrIndirect<T>& from ) const
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{
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_DoI_helpermess( *this, xDirectOrIndirect<T>( to ), from );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xRegister<T>& from ) const
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{
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_DoI_helpermess( *this, to, xDirectOrIndirect<T>( from ) );
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}
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MovImplAll() {} // Satisfy GCC's whims.
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};
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#define ccSane() jASSUME( ccType >= 0 && ccType <= 0x0f )
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//////////////////////////////////////////////////////////////////////////////////////////
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// CMOV !! [in all of it's disappointing lack-of glory] .. and ..
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// SETcc!! [more glory, less lack!]
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//
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// CMOV Disclaimer: Caution! This instruction can look exciting and cool, until you
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// realize that it cannot load immediate values into registers. -_-
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//
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// I use explicit method declarations here instead of templates, in order to provide
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// *only* 32 and 16 bit register operand forms (8 bit registers are not valid in CMOV).
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//
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class CMovImplGeneric
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{
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public:
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__forceinline void operator()( JccComparisonType ccType, const xRegister32& to, const xRegister32& from ) const { ccSane(); xOpWrite0F( 0x40 | ccType, to, from ); }
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__noinline void operator()( JccComparisonType ccType, const xRegister32& to, const ModSibBase& sibsrc ) const { ccSane(); xOpWrite0F( 0x40 | ccType, to, sibsrc ); }
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//__noinline void operator()( JccComparisonType ccType, const xDirectOrIndirect32& to, const xDirectOrIndirect32& from ) const { ccSane(); _DoI_helpermess( *this, to, from ); } // too.. lazy.. to fix.
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__forceinline void operator()( JccComparisonType ccType, const xRegister16& to, const xRegister16& from ) const { ccSane(); xOpWrite0F( 0x66, 0x40 | ccType, to, from ); }
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__noinline void operator()( JccComparisonType ccType, const xRegister16& to, const ModSibBase& sibsrc ) const { ccSane(); xOpWrite0F( 0x66, 0x40 | ccType, to, sibsrc ); }
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//__noinline void operator()( JccComparisonType ccType, const xDirectOrIndirect16& to, const xDirectOrIndirect16& from ) const { ccSane(); _DoI_helpermess( *this, to, from ); }
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CMovImplGeneric() {} // don't ask.
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};
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// ------------------------------------------------------------------------
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template< JccComparisonType ccType >
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class CMovImplAll
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{
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static const u16 Opcode = 0x40 | ccType;
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public:
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__forceinline void operator()( const xRegister32& to, const xRegister32& from ) const { ccSane(); xOpWrite0F( Opcode, to, from ); }
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__noinline void operator()( const xRegister32& to, const ModSibBase& sibsrc ) const { ccSane(); xOpWrite0F( Opcode, to, sibsrc ); }
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__noinline void operator()( const xDirectOrIndirect32& to, const xDirectOrIndirect32& from ) const { ccSane(); _DoI_helpermess( *this, to, from ); }
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__forceinline void operator()( const xRegister16& to, const xRegister16& from ) const { ccSane(); xOpWrite0F( 0x66, Opcode, to, from ); }
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__noinline void operator()( const xRegister16& to, const ModSibBase& sibsrc ) const { ccSane(); xOpWrite0F( 0x66, Opcode, to, sibsrc ); }
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__noinline void operator()( const xDirectOrIndirect16& to, const xDirectOrIndirect16& from ) const { ccSane(); _DoI_helpermess( *this, to, from ); }
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CMovImplAll() {} // don't ask.
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};
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// ------------------------------------------------------------------------
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class SetImplGeneric
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{
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// note: SETcc are 0x90, with 0 in the Reg field of ModRM.
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public:
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__forceinline void operator()( JccComparisonType ccType, const xRegister8& to ) const { ccSane(); xOpWrite0F( 0x90 | ccType, 0, to ); }
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__noinline void operator()( JccComparisonType ccType, const ModSibStrict<u8>& dest ) const { ccSane(); xOpWrite0F( 0x90 | ccType, 0, dest ); }
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SetImplGeneric() {} // if you do, ask GCC.
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};
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// ------------------------------------------------------------------------
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template< JccComparisonType ccType >
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class SetImplAll
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{
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static const u16 Opcode = 0x90 | ccType; // SETcc are 0x90 base opcode, with 0 in the Reg field of ModRM.
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public:
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__forceinline void operator()( const xRegister8& to ) const { ccSane(); xOpWrite0F( Opcode, 0, to ); }
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__noinline void operator()( const ModSibStrict<u8>& dest ) const { ccSane(); xOpWrite0F( Opcode, 0, dest ); }
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__noinline void operator()( const xDirectOrIndirect8& dest ) const { ccSane(); _DoI_helpermess( *this, dest ); }
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SetImplAll() {} // if you do, ask GCC.
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};
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//////////////////////////////////////////////////////////////////////////////////////////
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// Mov with sign/zero extension implementations (movsx / movzx)
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//
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// ------------------------------------------------------------------------
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template< bool SignExtend >
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class MovExtendImplAll
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{
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protected:
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static const u16 Opcode = 0xb6 | (SignExtend ? 8 : 0 );
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public:
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__forceinline void operator()( const xRegister32& to, const xRegister16& from ) const { xOpWrite0F( Opcode+1, to, from ); }
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__noinline void operator()( const xRegister32& to, const ModSibStrict<u16>& sibsrc ) const { xOpWrite0F( Opcode+1, to, sibsrc ); }
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__noinline void operator()( const xRegister32& to, const xDirectOrIndirect16& src ) const { _DoI_helpermess( *this, to, src ); }
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__forceinline void operator()( const xRegister32& to, const xRegister8& from ) const { xOpWrite0F( Opcode, to, from ); }
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__noinline void operator()( const xRegister32& to, const ModSibStrict<u8>& sibsrc ) const { xOpWrite0F( Opcode, to, sibsrc ); }
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__noinline void operator()( const xRegister32& to, const xDirectOrIndirect8& src ) const { _DoI_helpermess( *this, to, src ); }
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__forceinline void operator()( const xRegister16& to, const xRegister8& from ) const { xOpWrite0F( 0x66, Opcode, to, from ); }
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__noinline void operator()( const xRegister16& to, const ModSibStrict<u8>& sibsrc ) const { xOpWrite0F( 0x66, Opcode, to, sibsrc ); }
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__noinline void operator()( const xRegister16& to, const xDirectOrIndirect8& src ) const { _DoI_helpermess( *this, to, src ); }
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MovExtendImplAll() {} // don't ask.
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};
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