mirror of https://github.com/PCSX2/pcsx2.git
196 lines
7.1 KiB
C
196 lines
7.1 KiB
C
/* SPU2-X, A plugin for Emulating the Sound Processing Unit of the Playstation 2
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* Developed and maintained by the Pcsx2 Development Team.
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*
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* Original portions from SPU2ghz are (c) 2008 by David Quintana [gigaherz]
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*
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* SPU2-X is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* SPU2-X is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with SPU2-X. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#define SPU2_CORE0 0x00000000
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#define SPU2_CORE1 0x00000400
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#define SPU2_VP(voice) ((voice)*16)
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#define SPU2_VA(voice) ((voice)*12)
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#define REG_VP_VOLL 0x0000 // Voice Volume Left
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#define REG_VP_VOLR 0x0002 // Voice Volume Right
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#define REG_VP_PITCH 0x0004 // Pitch
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#define REG_VP_ADSR1 0x0006 // Envelope 1 (Attack-Decay-Sustain-Release)
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#define REG_VP_ADSR2 0x0008 // Envelope 2 (Attack-Decay-Sustain-Release)
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#define REG_VP_ENVX 0x000A // Current Envelope
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#define REG_VP_VOLXL 0x000C // Current Voice Volume Left
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#define REG_VP_VOLXR 0x000E // Current Voice Volume Right
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// .. repeated for each voice ..
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#define REG_S_PMON 0x0180 // Pitch Modulation Spec.
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#define REG_S_NON 0x0184 // Alloc Noise Generator
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#define REG_S_VMIXL 0x0188 // Voice Output Mix Left (Dry)
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#define REG_S_VMIXEL 0x018C // Voice Output Mix Left (Wet)
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#define REG_S_VMIXR 0x0190 // Voice Output Mix Right (Dry)
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#define REG_S_VMIXER 0x0194 // Voice Output Mix Right (Wet)
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#define REG_P_MMIX 0x0198 // Output Spec. After Voice Mix
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#define REG_C_ATTR 0x019A // Core X Attrib
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#define REG_A_IRQA 0x019C // Interrupt Address Spec.
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#define REG_S_KON 0x01A0 // Key On 0/1
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#define REG_S_KOFF 0x01A4 // Key Off 0/1
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#define REG_A_TSA 0x01A8 // Transfer starting address
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#define REG__1AC 0x01AC // Transfer data
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#define REG__1AE 0x01AE
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#define REG_S_ADMAS 0x01B0 // AutoDMA Status
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// 1b2, 1b4, 1b6, 1b8, 1ba, 1bc, 1be are unknown
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#define REG_VA_SSA 0x01C0 // Waveform data starting address
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#define REG_VA_LSAX 0x01C4 // Loop point address
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#define REG_VA_NAX 0x01C8 // Waveform data that should be read next
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// .. repeated for each voice ..
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#define REG_A_ESA 0x02E0 //Address: Top address of working area for effects processing
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#define R_APF1_SIZE 0x02E4 // Feedback Source A
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#define R_APF2_SIZE 0x02E8 // Feedback Source B
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#define R_SAME_L_DST 0x02EC
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#define R_SAME_R_DST 0x02F0
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#define R_COMB1_L_SRC 0x02F4
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#define R_COMB1_R_SRC 0x02F8
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#define R_COMB2_L_SRC 0x02FC
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#define R_COMB2_R_SRC 0x0300
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#define R_SAME_L_SRC 0x0304
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#define R_SAME_R_SRC 0x0308
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#define R_DIFF_L_DST 0x030C
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#define R_DIFF_R_DST 0x0310
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#define R_COMB3_L_SRC 0x0314
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#define R_COMB3_R_SRC 0x0318
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#define R_COMB4_L_SRC 0x031C
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#define R_COMB4_R_SRC 0x0320
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#define R_DIFF_L_SRC 0x0324 // Some sources have R_DIFF_R_SRC and R_DIFF_L_SRC swapped ><
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#define R_DIFF_R_SRC 0x0328
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#define R_APF1_L_DST 0x032C
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#define R_APF1_R_DST 0x0330
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#define R_APF2_L_DST 0x0334
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#define R_APF2_R_DST 0x0338
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#define REG_A_EEA 0x033C // Address: End address of working area for effects processing (upper part of address only!)
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#define REG_S_ENDX 0x0340 // End Point passed flag
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#define REG_P_STATX 0x0344 // Status register?
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// 0x346 .. 0x3fe are unknown (unused?)
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// core 1 has the same registers with 0x400 added.
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// core 1 ends at 0x746
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// 0x746 .. 0x75e are unknown
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// "Different" register area
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#define REG_P_MVOLL 0x0760 // Master Volume Left
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#define REG_P_MVOLR 0x0762 // Master Volume Right
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#define REG_P_EVOLL 0x0764 // Effect Volume Left
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#define REG_P_EVOLR 0x0766 // Effect Volume Right
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#define REG_P_AVOLL 0x0768 // Core External Input Volume Left (Only Core 1)
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#define REG_P_AVOLR 0x076A // Core External Input Volume Right (Only Core 1)
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#define REG_P_BVOLL 0x076C // Sound Data Volume Left
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#define REG_P_BVOLR 0x076E // Sound Data Volume Right
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#define REG_P_MVOLXL 0x0770 // Current Master Volume Left
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#define REG_P_MVOLXR 0x0772 // Current Master Volume Right
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#define R_IIR_VOL 0x0774
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#define R_COMB1_VOL 0x0776
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#define R_COMB2_VOL 0x0778
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#define R_COMB3_VOL 0x077A
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#define R_COMB4_VOL 0x077C
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#define R_WALL_VOL 0x077E
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#define R_APF1_VOL 0x0780
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#define R_APF2_VOL 0x0782
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#define R_IN_COEF_L 0x0784
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#define R_IN_COEF_R 0x0786
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// values repeat for core1
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// End OF "Different" register area
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// SPDIF interface
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#define SPDIF_OUT 0x07C0 // SPDIF Out: OFF/'PCM'/Bitstream/Bypass
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#define SPDIF_IRQINFO 0x07C2
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#define SPDIF_MODE 0x07C6
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#define SPDIF_MEDIA 0x07C8 // SPDIF Media: 'CD'/DVD
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#define SPDIF_PROTECT 0x07CC // SPDIF Copy Protection
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/*********************************************************************
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Core attributes (SD_C)
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bit 1 - Unknown (this bit is sometimes set)
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bit 2..3 - Unknown (usually never set)
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bit 4..5 - DMA related
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bit 6 - IRQ? DMA mode? wtf?
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bit 7 - effect enable (reverb enable)
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bit 8 - IRQ enable?
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bit 9..14 - noise clock
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bit 15 - mute
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bit 16 - reset
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*********************************************************************/
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#define SPDIF_OUT_OFF 0x0000 // no spdif output
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#define SPDIF_OUT_PCM 0x0020 // encode spdif from spu2 pcm output
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#define SPDIF_OUT_BYPASS 0x0100 // bypass spu2 processing
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#define SPDIF_MODE_BYPASS_BITSTREAM 0x0002 // bypass mode for digital bitstream data
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#define SPDIF_MODE_BYPASS_PCM 0x0000 // bypass mode for pcm data (using analog output)
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#define SPDIF_MODE_MEDIA_CD 0x0800 // source media is a CD
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#define SPDIF_MODE_MEDIA_DVD 0x0000 // source media is a DVD
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#define SPDIF_MEDIA_CDVD 0x0200
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#define SPDIF_MEDIA_400 0x0000
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#define SPDIF_PROTECT_NORMAL 0x0000 // spdif stream is not protected
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#define SPDIF_PROTECT_PROHIBIT 0x8000 // spdif stream can't be copied
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/********************************************************************/
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#define VOICE_PARAM_VOLL 0x0 // Voice Volume Left
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#define VOICE_PARAM_VOLR 0x2 // Voice Volume Right
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#define VOICE_PARAM_PITCH 0x4 // Pitch
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#define VOICE_PARAM_ADSR1 0x6 // Envelope 1 (Attack-Delay-Sustain-Release)
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#define VOICE_PARAM_ADSR2 0x8 // Envelope 2 (Attack-Delay-Sustain-Release)
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#define VOICE_PARAM_ENVX 0xA // Current Envelope
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#define VOICE_PARAM_VOLXL 0xC // Current Voice Volume Left
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#define VOICE_PARAM_VOLXR 0xE // Current Voice Volume Right
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/********************************************************************/
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#define VOICE_ADDR_SSA 0x0 // Waveform data starting address
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#define VOICE_ADDR_LSAX 0x4 // Loop point address
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#define VOICE_ADDR_NAX 0x8 // Waveform data that should be read next
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// --------------------------------------------------------------------------------------
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// SPU2-X Register Table LUT
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// --------------------------------------------------------------------------------------
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#define U16P(x) ((u16 *)&(x))
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// Returns the hiword of a 32 bit integer.
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#define U16P_HI(x) (((u16 *)&(x)) + 1)
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extern u16 *regtable[0x401];
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extern u16 const *const regtable_original[0x401];
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