mirror of https://github.com/PCSX2/pcsx2.git
286 lines
7.5 KiB
C++
286 lines
7.5 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* ix86 core v0.9.1
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*
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* Original Authors (v0.6.2 and prior):
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* linuzappz <linuzappz@pcsx.net>
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* alexey silinov
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* goldfinger
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* zerofrog(@gmail.com)
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*
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* Authors of v0.9.1:
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* Jake.Stine(@gmail.com)
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* cottonvibes(@gmail.com)
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* sudonim(1@gmail.com)
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*/
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#include "common/emitter/internal.h"
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namespace x86Emitter
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{
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void xImpl_JmpCall::operator()(const xAddressReg& absreg) const
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{
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// Jumps are always wide and don't need the rex.W
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xOpWrite(0, 0xff, isJmp ? 4 : 2, absreg.GetNonWide());
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}
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void xImpl_JmpCall::operator()(const xIndirectNative& src) const
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{
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// Jumps are always wide and don't need the rex.W
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EmitRex(0, xIndirect32(src.Base, src.Index, 1, 0));
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xWrite8(0xff);
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EmitSibMagic(isJmp ? 4 : 2, src);
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}
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const xImpl_JmpCall xJMP = {true};
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const xImpl_JmpCall xCALL = {false};
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template <typename Reg1, typename Reg2>
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void prepareRegsForFastcall(const Reg1& a1, const Reg2& a2)
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{
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if (a1.IsEmpty())
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return;
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// Make sure we don't mess up if someone tries to fastcall with a1 in arg2reg and a2 in arg1reg
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if (a2.Id != arg1reg.Id)
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{
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xMOV(Reg1(arg1reg), a1);
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if (!a2.IsEmpty())
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{
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xMOV(Reg2(arg2reg), a2);
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}
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}
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else if (a1.Id != arg2reg.Id)
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{
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xMOV(Reg2(arg2reg), a2);
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xMOV(Reg1(arg1reg), a1);
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}
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else
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{
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xPUSH(a1);
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xMOV(Reg2(arg2reg), a2);
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xPOP(Reg1(arg1reg));
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}
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}
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void xImpl_FastCall::operator()(void* f, const xRegister32& a1, const xRegister32& a2) const
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{
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prepareRegsForFastcall(a1, a2);
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uptr disp = ((uptr)xGetPtr() + 5) - (uptr)f;
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if ((sptr)disp == (s32)disp)
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{
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xCALL(f);
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}
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else
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{
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xMOV(rax, ptrNative[f]);
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xCALL(rax);
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}
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}
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#ifdef __M_X86_64
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void xImpl_FastCall::operator()(void* f, const xRegisterLong& a1, const xRegisterLong& a2) const
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{
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prepareRegsForFastcall(a1, a2);
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uptr disp = ((uptr)xGetPtr() + 5) - (uptr)f;
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if ((sptr)disp == (s32)disp)
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{
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xCALL(f);
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}
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else
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{
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xMOV(rax, ptrNative[f]);
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xCALL(rax);
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}
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}
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void xImpl_FastCall::operator()(void* f, u32 a1, const xRegisterLong& a2) const
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{
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if (!a2.IsEmpty())
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{
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xMOV(arg2reg, a2);
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}
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xMOV(arg1reg, a1);
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(*this)(f, arg1reg, arg2reg);
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}
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#endif
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void xImpl_FastCall::operator()(void* f, void* a1) const
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{
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xLEA(arg1reg, ptr[a1]);
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(*this)(f, arg1reg, arg2reg);
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}
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void xImpl_FastCall::operator()(void* f, u32 a1, const xRegister32& a2) const
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{
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if (!a2.IsEmpty())
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{
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xMOV(arg2regd, a2);
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}
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xMOV(arg1regd, a1);
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(*this)(f, arg1regd, arg2regd);
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}
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void xImpl_FastCall::operator()(void* f, const xIndirect32& a1) const
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{
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xMOV(arg1regd, a1);
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(*this)(f, arg1regd);
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}
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void xImpl_FastCall::operator()(void* f, u32 a1, u32 a2) const
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{
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xMOV(arg1regd, a1);
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xMOV(arg2regd, a2);
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(*this)(f, arg1regd, arg2regd);
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}
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void xImpl_FastCall::operator()(const xIndirectNative& f, const xRegisterLong& a1, const xRegisterLong& a2) const
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{
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prepareRegsForFastcall(a1, a2);
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xCALL(f);
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}
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const xImpl_FastCall xFastCall = {};
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// ------------------------------------------------------------------------
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// Emits a 32 bit jump, and returns a pointer to the 32 bit displacement.
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// (displacements should be assigned relative to the end of the jump instruction,
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// or in other words *(retval+1) )
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__emitinline s32* xJcc32(JccComparisonType comparison, s32 displacement)
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{
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if (comparison == Jcc_Unconditional)
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xWrite8(0xe9);
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else
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{
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xWrite8(0x0f);
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xWrite8(0x80 | comparison);
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}
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xWrite<s32>(displacement);
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return ((s32*)xGetPtr()) - 1;
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}
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// ------------------------------------------------------------------------
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// Emits a 32 bit jump, and returns a pointer to the 8 bit displacement.
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// (displacements should be assigned relative to the end of the jump instruction,
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// or in other words *(retval+1) )
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__emitinline s8* xJcc8(JccComparisonType comparison, s8 displacement)
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{
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xWrite8((comparison == Jcc_Unconditional) ? 0xeb : (0x70 | comparison));
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xWrite<s8>(displacement);
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return (s8*)xGetPtr() - 1;
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}
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// ------------------------------------------------------------------------
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// Writes a jump at the current x86Ptr, which targets a pre-established target address.
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// (usually a backwards jump)
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//
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// slideForward - used internally by xSmartJump to indicate that the jump target is going
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// to slide forward in the event of an 8 bit displacement.
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//
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__emitinline void xJccKnownTarget(JccComparisonType comparison, const void* target, bool slideForward)
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{
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// Calculate the potential j8 displacement first, assuming an instruction length of 2:
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sptr displacement8 = (sptr)target - (sptr)(xGetPtr() + 2);
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const int slideVal = slideForward ? ((comparison == Jcc_Unconditional) ? 3 : 4) : 0;
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displacement8 -= slideVal;
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if (slideForward)
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{
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pxAssertDev(displacement8 >= 0, "Used slideForward on a backward jump; nothing to slide!");
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}
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if (is_s8(displacement8))
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xJcc8(comparison, displacement8);
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else
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{
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// Perform a 32 bit jump instead. :(
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s32* bah = xJcc32(comparison);
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sptr distance = (sptr)target - (sptr)xGetPtr();
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#ifdef __M_X86_64
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// This assert won't physically happen on x86 targets
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pxAssertDev(distance >= -0x80000000LL && distance < 0x80000000LL, "Jump target is too far away, needs an indirect register");
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#endif
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*bah = (s32)distance;
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}
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}
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// Low-level jump instruction! Specify a comparison type and a target in void* form, and
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// a jump (either 8 or 32 bit) is generated.
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__emitinline void xJcc(JccComparisonType comparison, const void* target)
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{
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xJccKnownTarget(comparison, target, false);
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}
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xForwardJumpBase::xForwardJumpBase(uint opsize, JccComparisonType cctype)
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{
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pxAssert(opsize == 1 || opsize == 4);
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pxAssertDev(cctype != Jcc_Unknown, "Invalid ForwardJump conditional type.");
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BasePtr = (s8*)xGetPtr() +
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((opsize == 1) ? 2 : // j8's are always 2 bytes.
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((cctype == Jcc_Unconditional) ? 5 : 6)); // j32's are either 5 or 6 bytes
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if (opsize == 1)
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xWrite8((cctype == Jcc_Unconditional) ? 0xeb : (0x70 | cctype));
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else
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{
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if (cctype == Jcc_Unconditional)
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xWrite8(0xe9);
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else
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{
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xWrite8(0x0f);
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xWrite8(0x80 | cctype);
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}
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}
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xAdvancePtr(opsize);
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}
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void xForwardJumpBase::_setTarget(uint opsize) const
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{
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pxAssertDev(BasePtr != NULL, "");
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sptr displacement = (sptr)xGetPtr() - (sptr)BasePtr;
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if (opsize == 1)
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{
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pxAssertDev(is_s8(displacement), "Emitter Error: Invalid short jump displacement.");
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BasePtr[-1] = (s8)displacement;
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}
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else
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{
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// full displacement, no sanity checks needed :D
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((s32*)BasePtr)[-1] = displacement;
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}
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}
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// returns the inverted conditional type for this Jcc condition. Ie, JNS will become JS.
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__fi JccComparisonType xInvertCond(JccComparisonType src)
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{
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pxAssert(src != Jcc_Unknown);
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if (Jcc_Unconditional == src)
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return Jcc_Unconditional;
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// x86 conditionals are clever! To invert conditional types, just invert the lower bit:
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return (JccComparisonType)((int)src ^ 1);
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}
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} // namespace x86Emitter
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