mirror of https://github.com/PCSX2/pcsx2.git
132 lines
4.2 KiB
C++
132 lines
4.2 KiB
C++
// SPDX-FileCopyrightText: 2002-2023 PCSX2 Dev Team
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// SPDX-License-Identifier: LGPL-3.0+
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#pragma once
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namespace x86Emitter
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{
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enum G1Type
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{
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G1Type_ADD = 0,
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G1Type_OR,
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G1Type_ADC,
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G1Type_SBB,
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G1Type_AND,
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G1Type_SUB,
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G1Type_XOR,
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G1Type_CMP
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};
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extern void _g1_EmitOp(G1Type InstType, const xRegisterInt& to, const xRegisterInt& from);
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// --------------------------------------------------------------------------------------
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// xImpl_Group1
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// --------------------------------------------------------------------------------------
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struct xImpl_Group1
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{
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G1Type InstType;
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void operator()(const xRegisterInt& to, const xRegisterInt& from) const;
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void operator()(const xIndirectVoid& to, const xRegisterInt& from) const;
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void operator()(const xRegisterInt& to, const xIndirectVoid& from) const;
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void operator()(const xRegisterInt& to, int imm) const;
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void operator()(const xIndirect64orLess& to, int imm) const;
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#if 0
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const ModSibBase& to, const xImmReg<T>& immOrReg ) const
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{
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_DoI_helpermess( *this, to, immOrReg );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xImmReg<T>& immOrReg ) const
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{
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_DoI_helpermess( *this, to, immOrReg );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, int imm ) const
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{
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_DoI_helpermess( *this, to, imm );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xDirectOrIndirect<T>& from ) const
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{
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_DoI_helpermess( *this, to, from );
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}
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// FIXME : Make this struct to 8, 16, and 32 bit registers
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template< typename T > __noinline void operator()( const xRegisterBase& to, const xDirectOrIndirect<T>& from ) const
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{
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_DoI_helpermess( *this, xDirectOrIndirect<T>( to ), from );
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}
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// FIXME : Make this struct to 8, 16, and 32 bit registers
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xRegisterBase& from ) const
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{
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_DoI_helpermess( *this, to, xDirectOrIndirect<T>( from ) );
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}
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#endif
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};
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// ------------------------------------------------------------------------
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// This class combines x86 with SSE/SSE2 logic operations (ADD, OR, and NOT).
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// Note: ANDN [AndNot] is handled below separately.
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//
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struct xImpl_G1Logic
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{
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G1Type InstType;
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void operator()(const xRegisterInt& to, const xRegisterInt& from) const;
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void operator()(const xIndirectVoid& to, const xRegisterInt& from) const;
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void operator()(const xRegisterInt& to, const xIndirectVoid& from) const;
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void operator()(const xRegisterInt& to, int imm) const;
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void operator()(const xIndirect64orLess& to, int imm) const;
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xImplSimd_DestRegSSE PS; // packed single precision
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xImplSimd_DestRegSSE PD; // packed double precision
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};
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// ------------------------------------------------------------------------
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// This class combines x86 with SSE/SSE2 arithmetic operations (ADD/SUB).
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//
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struct xImpl_G1Arith
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{
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G1Type InstType;
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void operator()(const xRegisterInt& to, const xRegisterInt& from) const;
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void operator()(const xIndirectVoid& to, const xRegisterInt& from) const;
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void operator()(const xRegisterInt& to, const xIndirectVoid& from) const;
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void operator()(const xRegisterInt& to, int imm) const;
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void operator()(const xIndirect64orLess& to, int imm) const;
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xImplSimd_DestRegSSE PS; // packed single precision
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xImplSimd_DestRegSSE PD; // packed double precision
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xImplSimd_DestRegSSE SS; // scalar single precision
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xImplSimd_DestRegSSE SD; // scalar double precision
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};
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// ------------------------------------------------------------------------
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struct xImpl_G1Compare
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{
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void operator()(const xRegisterInt& to, const xRegisterInt& from) const;
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void operator()(const xIndirectVoid& to, const xRegisterInt& from) const;
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void operator()(const xRegisterInt& to, const xIndirectVoid& from) const;
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void operator()(const xRegisterInt& to, int imm) const;
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void operator()(const xIndirect64orLess& to, int imm) const;
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xImplSimd_DestSSE_CmpImm PS;
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xImplSimd_DestSSE_CmpImm PD;
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xImplSimd_DestSSE_CmpImm SS;
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xImplSimd_DestSSE_CmpImm SD;
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};
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} // End namespace x86Emitter
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