mirror of https://github.com/PCSX2/pcsx2.git
197 lines
6.0 KiB
C++
197 lines
6.0 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2009 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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// Note: This header is meant to be included from within the x86Emitter::Internal namespace.
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// Instructions implemented in this header are as follows -->>
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enum G1Type
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{
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G1Type_ADD=0,
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G1Type_OR,
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G1Type_ADC,
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G1Type_SBB,
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G1Type_AND,
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G1Type_SUB,
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G1Type_XOR,
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G1Type_CMP
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};
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// -------------------------------------------------------------------
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//
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template< G1Type InstType >
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class xImpl_Group1
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{
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public:
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// ------------------------------------------------------------------------
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template< typename T > __forceinline void operator()( const xRegister<T>& to, const xRegister<T>& from ) const
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{
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prefix16<T>();
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xWrite8( (Is8BitOp<T>() ? 0 : 1) | (InstType<<3) );
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EmitSibMagic( from, to );
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}
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const ModSibBase& sibdest, const xRegister<T>& from ) const
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{
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prefix16<T>();
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xWrite8( (Is8BitOp<T>() ? 0 : 1) | (InstType<<3) );
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EmitSibMagic( from, sibdest );
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}
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const xRegister<T>& to, const ModSibBase& sibsrc ) const
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{
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prefix16<T>();
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xWrite8( (Is8BitOp<T>() ? 2 : 3) | (InstType<<3) );
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EmitSibMagic( to, sibsrc );
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}
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// ------------------------------------------------------------------------
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// Note on Imm forms : use int as the source operand since it's "reasonably inert" from a compiler
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// perspective. (using uint tends to make the compiler try and fail to match signed immediates with
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// one of the other overloads).
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template< typename T > __noinline void operator()( const ModSibStrict<T>& sibdest, int imm ) const
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{
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if( Is8BitOp<T>() )
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{
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xWrite8( 0x80 );
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EmitSibMagic( InstType, sibdest );
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xWrite<s8>( imm );
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}
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else
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{
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prefix16<T>();
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xWrite8( is_s8( imm ) ? 0x83 : 0x81 );
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EmitSibMagic( InstType, sibdest );
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if( is_s8( imm ) )
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xWrite<s8>( imm );
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else
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xWrite<T>( imm );
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}
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}
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// ------------------------------------------------------------------------
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template< typename T > __forceinline void operator()( const xRegister<T>& to, int imm ) const
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{
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prefix16<T>();
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if( !Is8BitOp<T>() && is_s8( imm ) )
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{
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xWrite8( 0x83 );
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EmitSibMagic( InstType, to );
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xWrite<s8>( imm );
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}
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else
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{
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if( to.IsAccumulator() )
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xWrite8( (Is8BitOp<T>() ? 4 : 5) | (InstType<<3) );
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else
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{
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xWrite8( Is8BitOp<T>() ? 0x80 : 0x81 );
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EmitSibMagic( InstType, to );
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}
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xWrite<T>( imm );
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}
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}
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const ModSibBase& to, const xImmReg<T>& immOrReg ) const
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{
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_DoI_helpermess( *this, to, immOrReg );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xImmReg<T>& immOrReg ) const
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{
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_DoI_helpermess( *this, to, immOrReg );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, int imm ) const
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{
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_DoI_helpermess( *this, to, imm );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xDirectOrIndirect<T>& from ) const
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{
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_DoI_helpermess( *this, to, from );
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}
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template< typename T > __noinline void operator()( const xRegister<T>& to, const xDirectOrIndirect<T>& from ) const
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{
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_DoI_helpermess( *this, xDirectOrIndirect<T>( to ), from );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xRegister<T>& from ) const
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{
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_DoI_helpermess( *this, to, xDirectOrIndirect<T>( from ) );
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}
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xImpl_Group1() {} // Why does GCC need these?
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};
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// ------------------------------------------------------------------------
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// This class combines x86 with SSE/SSE2 logic operations (ADD, OR, and NOT).
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// Note: ANDN [AndNot] is handled below separately.
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//
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template< G1Type InstType, u16 OpcodeSSE >
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class xImpl_G1Logic : public xImpl_Group1<InstType>
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{
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public:
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using xImpl_Group1<InstType>::operator();
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const SimdImpl_DestRegSSE<0x00,OpcodeSSE> PS; // packed single precision
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const SimdImpl_DestRegSSE<0x66,OpcodeSSE> PD; // packed double precision
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xImpl_G1Logic() {}
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};
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// ------------------------------------------------------------------------
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// This class combines x86 with SSE/SSE2 arithmetic operations (ADD/SUB).
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//
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template< G1Type InstType, u16 OpcodeSSE >
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class xImpl_G1Arith : public xImpl_G1Logic<InstType, OpcodeSSE >
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{
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public:
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using xImpl_Group1<InstType>::operator();
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const SimdImpl_DestRegSSE<0xf3,OpcodeSSE> SS; // scalar single precision
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const SimdImpl_DestRegSSE<0xf2,OpcodeSSE> SD; // scalar double precision
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xImpl_G1Arith() {}
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};
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// ------------------------------------------------------------------------
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class xImpl_G1Compare : xImpl_Group1< G1Type_CMP >
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{
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protected:
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template< u8 Prefix > struct Woot
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{
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__forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from, SSE2_ComparisonType cmptype ) const{ xOpWrite0F( Prefix, 0xc2, to, from, (u8)cmptype ); }
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__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from, SSE2_ComparisonType cmptype ) const { xOpWrite0F( Prefix, 0xc2, to, from, (u8)cmptype ); }
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Woot() {}
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};
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public:
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using xImpl_Group1<G1Type_CMP>::operator();
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const Woot<0x00> PS;
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const Woot<0x66> PD;
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const Woot<0xf3> SS;
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const Woot<0xf2> SD;
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xImpl_G1Compare() {} //GCWhat?
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};
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