mirror of https://github.com/PCSX2/pcsx2.git
233 lines
5.7 KiB
C++
233 lines
5.7 KiB
C++
// SPDX-FileCopyrightText: 2014 PPSSPP Project, 2014-2023 PCSX2 Dev Team
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// SPDX-License-Identifier: GPL-2.0+
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#include "MipsStackWalk.h"
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#include "SymbolMap.h"
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#include "MIPSAnalyst.h"
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#include "DebugInterface.h"
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#include "R5900OpcodeTables.h"
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#define _RS ((rawOp >> 21) & 0x1F)
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#define _RT ((rawOp >> 16) & 0x1F)
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#define _RD ((rawOp >> 11) & 0x1F)
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#define _IMM16 ((signed short)(rawOp & 0xFFFF))
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#define MIPS_REG_SP 29
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#define MIPS_REG_FP 30
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#define MIPS_REG_RA 31
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#define INVALIDTARGET 0xFFFFFFFF
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namespace MipsStackWalk
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{
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// In the worst case, we scan this far above the pc for an entry.
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const int MAX_FUNC_SIZE = 32768 * 4;
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// After this we assume we're stuck.
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const size_t MAX_DEPTH = 1024;
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static u32 GuessEntry(DebugInterface* cpu, u32 pc)
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{
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SymbolInfo info;
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if (cpu->GetSymbolMap().GetSymbolInfo(&info, pc))
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{
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return info.address;
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}
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return INVALIDTARGET;
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}
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bool IsSWInstr(const R5900::OPCODE& op)
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{
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if ((op.flags & IS_MEMORY) && (op.flags & IS_STORE))
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{
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switch (op.flags & MEMTYPE_MASK)
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{
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case MEMTYPE_WORD:
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case MEMTYPE_DWORD:
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case MEMTYPE_QWORD:
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return true;
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}
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}
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return false;
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}
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bool IsJRInstr(const R5900::OPCODE& op)
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{
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if ((op.flags & IS_BRANCH) && (op.flags & BRANCHTYPE_REGISTER))
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{
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return true;
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}
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return false;
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}
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bool IsAddImmInstr(const R5900::OPCODE& op)
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{
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if (op.flags & IS_ALU)
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return (op.flags & ALUTYPE_MASK) == ALUTYPE_ADDI;
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return false;
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}
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bool IsMovRegsInstr(const R5900::OPCODE& op, u32 rawOp)
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{
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if (op.flags & IS_ALU)
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return (op.flags & ALUTYPE_MASK) == ALUTYPE_ADDI && (_RS == 0 || _RT == 0);
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return false;
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}
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bool ScanForAllocaSignature(DebugInterface* cpu, u32 pc)
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{
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// In God Eater Burst, for example, after 0880E750, there's what looks like an alloca().
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// It's surrounded by "mov fp, sp" and "mov sp, fp", which is unlikely to be used for other reasons.
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// It ought to be pretty close.
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u32 stop = pc - 32 * 4;
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for (; cpu->isValidAddress(pc) && pc >= stop; pc -= 4)
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{
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u32 rawOp = cpu->read32(pc);
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const R5900::OPCODE& op = R5900::GetInstruction(rawOp);
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// We're looking for a "mov fp, sp" close by a "addiu sp, sp, -N".
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if (IsMovRegsInstr(op, rawOp) && _RD == MIPS_REG_FP && (_RS == MIPS_REG_SP || _RT == MIPS_REG_SP))
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{
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return true;
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}
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}
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return false;
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}
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bool ScanForEntry(DebugInterface* cpu, StackFrame& frame, u32 entry, u32& ra)
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{
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// Let's hope there are no > 1MB functions on the PSP, for the sake of humanity...
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const u32 LONGEST_FUNCTION = 1024 * 1024;
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// TODO: Check if found entry is in the same symbol? Might be wrong sometimes...
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int ra_offset = -1;
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const u32 start = frame.pc;
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u32 stop = entry;
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if (entry == INVALIDTARGET)
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{
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stop = std::max<s64>(0, (s64)start - LONGEST_FUNCTION);
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}
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for (u32 pc = start; cpu->isValidAddress(pc) && pc >= stop; pc -= 4)
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{
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u32 rawOp = cpu->read32(pc);
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const R5900::OPCODE& op = R5900::GetInstruction(rawOp);
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// Look for RA write to ram
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if (IsSWInstr(op) && _RT == MIPS_REG_RA && _RS == MIPS_REG_SP)
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{
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ra_offset = _IMM16;
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}
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// Look for previous function end
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if (IsJRInstr(op) && _RS == MIPS_REG_RA)
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{
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// Found previous function end
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// Since no stack setup was found assume this is a leaf
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// with no stack usage
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pc = pc + 8;
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frame.entry = pc;
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frame.stackSize = 0;
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return true;
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}
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// Look for the frame allocation stack pointer subtraction
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if (IsAddImmInstr(op) && _RT == MIPS_REG_SP && _RS == MIPS_REG_SP)
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{
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// A positive imm either means alloca() or we went too far.
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if (_IMM16 > 0)
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{
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// TODO: Maybe check for any alloca() signature and bail?
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continue;
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}
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if (ScanForAllocaSignature(cpu, pc))
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{
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continue;
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}
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frame.entry = pc;
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frame.stackSize = -_IMM16;
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if (ra_offset != -1 && cpu->isValidAddress(frame.sp + ra_offset))
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{
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ra = cpu->read32(frame.sp + ra_offset);
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}
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return true;
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}
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}
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return false;
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}
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bool DetermineFrameInfo(DebugInterface* cpu, StackFrame& frame, u32 possibleEntry, u32 threadEntry, u32& ra)
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{
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if (ScanForEntry(cpu, frame, possibleEntry, ra))
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{
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// Awesome, found one that looks right.
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return true;
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}
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else if (ra != INVALIDTARGET && possibleEntry != INVALIDTARGET)
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{
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// Let's just assume it's a leaf.
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frame.entry = possibleEntry;
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frame.stackSize = 0;
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return true;
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}
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// Okay, we failed to get one. Our possibleEntry could be wrong, it often is.
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// Let's just scan upward.
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u32 newPossibleEntry = frame.pc > threadEntry ? threadEntry : frame.pc - MAX_FUNC_SIZE;
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return ScanForEntry(cpu, frame, newPossibleEntry, ra);
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}
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std::vector<StackFrame> Walk(DebugInterface* cpu, u32 pc, u32 ra, u32 sp, u32 threadEntry, u32 threadStackTop)
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{
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std::vector<StackFrame> frames;
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StackFrame current;
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current.pc = pc;
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current.sp = sp;
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current.entry = INVALIDTARGET;
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current.stackSize = -1;
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u32 prevEntry = INVALIDTARGET;
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while (pc != threadEntry)
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{
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u32 possibleEntry = GuessEntry(cpu, current.pc);
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if (DetermineFrameInfo(cpu, current, possibleEntry, threadEntry, ra))
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{
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frames.push_back(current);
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if (current.entry == threadEntry || GuessEntry(cpu, current.entry) == threadEntry)
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{
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break;
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}
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if (current.entry == prevEntry || frames.size() >= MAX_DEPTH)
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{
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// Recursion, means we're screwed. Let's just give up.
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break;
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}
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prevEntry = current.entry;
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current.pc = ra;
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current.sp += current.stackSize;
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ra = INVALIDTARGET;
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current.entry = INVALIDTARGET;
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current.stackSize = -1;
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}
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else
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{
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// Well, we got as far as we could.
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current.entry = possibleEntry;
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current.stackSize = 0;
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frames.push_back(current);
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break;
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}
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}
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return frames;
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}
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}; // namespace MipsStackWalk
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