mirror of https://github.com/PCSX2/pcsx2.git
349 lines
9.0 KiB
C++
349 lines
9.0 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include "Vif_Dma.h"
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#include "GS.h"
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#include "Gif.h"
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#include "VUmicro.h"
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#include "newVif.h"
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__forceinline void vif1FLUSH()
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{
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if (!(VU0.VI[REG_VPU_STAT].UL & 0x100)) return;
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int _cycles = VU1.cycle;
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vu1Finish();
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g_vifCycles += (VU1.cycle - _cycles) * BIAS;
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}
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void vif1TransferToMemory()
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{
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int size;
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u64* pMem = (u64*)dmaGetAddr(vif1ch->madr, false);
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// VIF from gsMemory
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if (pMem == NULL) //Is vif0ptag empty?
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{
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Console.WriteLn("Vif1 Tag BUSERR");
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dmacRegs->stat.BEIS = true; //Bus Error
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vif1Regs->stat.FQC = 0;
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vif1ch->qwc = 0;
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vif1.done = true;
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CPU_INT(DMAC_VIF1, 0);
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return; //An error has occurred.
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}
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// MTGS concerns: The MTGS is inherently disagreeable with the idea of downloading
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// stuff from the GS. The *only* way to handle this case safely is to flush the GS
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// completely and execute the transfer there-after.
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//Console.Warning("Real QWC %x", vif1ch->qwc);
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XMMRegisters::Freeze();
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if (GSreadFIFO2 == NULL)
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{
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for (size = vif1ch->qwc; size > 0; --size)
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{
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if (size > 1)
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{
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GetMTGS().WaitGS();
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GSreadFIFO(&psHu64(VIF1_FIFO));
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}
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pMem[0] = psHu64(VIF1_FIFO);
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pMem[1] = psHu64(VIF1_FIFO + 8);
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pMem += 2;
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}
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}
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else
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{
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GetMTGS().WaitGS();
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GSreadFIFO2(pMem, vif1ch->qwc);
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// set incase read
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psHu64(VIF1_FIFO) = pMem[2*vif1ch->qwc-2];
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psHu64(VIF1_FIFO + 8) = pMem[2*vif1ch->qwc-1];
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}
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XMMRegisters::Thaw();
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g_vifCycles += vif1ch->qwc * 2;
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vif1ch->madr += vif1ch->qwc * 16; // mgs3 scene changes
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if(vif1.GSLastDownloadSize > vif1ch->qwc)
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vif1Regs->stat.FQC = vif1.GSLastDownloadSize - vif1ch->qwc;
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else
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vif1Regs->stat.FQC = 0;
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vif1ch->qwc = 0;
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}
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bool _VIF1chain()
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{
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u32 *pMem;
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if (vif1ch->qwc == 0)
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{
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vif1.inprogress = 0;
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return true;
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}
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// Clarification - this is TO memory mode, for some reason i used the other way round >.<
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if (vif1.dmamode == VIF_NORMAL_TO_MEM_MODE)
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{
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vif1TransferToMemory();
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vif1.inprogress = 0;
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return true;
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}
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pMem = (u32*)dmaGetAddr(vif1ch->madr, !vif1ch->chcr.DIR);
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if (pMem == NULL)
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{
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vif1.cmd = 0;
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vif1.tag.size = 0;
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vif1ch->qwc = 0;
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return true;
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}
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VIF_LOG("VIF1chain size=%d, madr=%lx, tadr=%lx",
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vif1ch->qwc, vif1ch->madr, vif1ch->tadr);
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if (vif1.vifstalled)
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return VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, false);
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else
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return VIF1transfer(pMem, vif1ch->qwc * 4, false);
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}
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__forceinline void vif1SetupTransfer()
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{
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tDMA_TAG *ptag;
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switch (vif1.dmamode)
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{
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case VIF_NORMAL_TO_MEM_MODE:
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case VIF_NORMAL_FROM_MEM_MODE:
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vif1.inprogress = 1;
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vif1.done = true;
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g_vifCycles = 2;
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break;
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case VIF_CHAIN_MODE:
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ptag = dmaGetAddr(vif1ch->tadr, false); //Set memory pointer to TADR
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if (!(vif1ch->transfer("Vif1 Tag", ptag))) return;
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vif1ch->madr = ptag[1]._u32; //MADR = ADDR field + SPR
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g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag
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// Transfer dma tag if tte is set
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VIF_LOG("VIF1 Tag %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n",
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ptag[1]._u32, ptag[0]._u32, vif1ch->qwc, ptag->ID, vif1ch->madr, vif1ch->tadr);
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if (!vif1.done && ((dmacRegs->ctrl.STD == STD_VIF1) && (ptag->ID == TAG_REFS))) // STD == VIF1
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{
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// there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall
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if ((vif1ch->madr + vif1ch->qwc * 16) >= dmacRegs->stadr.ADDR)
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{
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// stalled
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hwDmacIrq(DMAC_STALL_SIS);
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return;
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}
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}
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vif1.inprogress = 1;
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if (vif1ch->chcr.TTE)
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{
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bool ret;
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if (vif1.vifstalled)
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ret = VIF1transfer((u32*)ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, true); //Transfer Tag on stall
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else
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ret = VIF1transfer((u32*)ptag + 2, 2, true); //Transfer Tag
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if ((ret == false) && vif1.irqoffset < 2)
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{
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vif1.inprogress = 0; //Better clear this so it has to do it again (Jak 1)
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return; //There has been an error or an interrupt
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}
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}
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vif1.irqoffset = 0;
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vif1.done |= hwDmacSrcChainWithStack(vif1ch, ptag->ID);
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//Check TIE bit of CHCR and IRQ bit of tag
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if (vif1ch->chcr.TIE && ptag->IRQ)
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{
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VIF_LOG("dmaIrq Set");
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//End Transfer
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vif1.done = true;
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return;
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}
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break;
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}
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}
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__forceinline void vif1Interrupt()
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{
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VIF_LOG("vif1Interrupt: %8.8x", cpuRegs.cycle);
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g_vifCycles = 0;
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//Some games (Fahrenheit being one) start vif first, let it loop through blankness while it sets MFIFO mode, so we need to check it here.
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if (dmacRegs->ctrl.MFD == MFD_VIF1) // VIF MFIFO
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{
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//Console.WriteLn("VIFMFIFO\n");
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// Test changed because the Final Fantasy 12 opening somehow has the tag in *Undefined* mode, which is not in the documentation that I saw.
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if (vif1ch->chcr.MOD == NORMAL_MODE) Console.WriteLn("MFIFO mode is normal (which isn't normal here)! %x", vif1ch->chcr._u32);
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vif1Regs->stat.FQC = min((u16)0x10, vif1ch->qwc);
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vifMFIFOInterrupt();
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return;
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}
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if (vif1ch->chcr.DIR) vif1Regs->stat.FQC = min(vif1ch->qwc, (u16)16);
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//Simulated GS transfer time done, clear the flags
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if(gifRegs->stat.APATH == GIF_APATH2 && (vif1.cmd & 0x70) != 0x50)
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{
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gifRegs->stat.APATH = GIF_APATH_IDLE;
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}
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if (schedulepath3msk & 0x10) Vif1MskPath3();
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if ((vif1Regs->stat.VGW))
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{
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if (GSTransferStatus.PTH3 < STOPPED_MODE || GSTransferStatus.PTH1 != STOPPED_MODE)
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{
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CPU_INT(DMAC_VIF1, 4);
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return;
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}
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else
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{
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vif1Regs->stat.VGW = false;
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}
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}
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if (!(vif1ch->chcr.STR)) Console.WriteLn("Vif1 running when CHCR == %x", vif1ch->chcr._u32);
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if (vif1.irq && vif1.tag.size == 0)
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{
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vif1Regs->stat.INT = true;
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hwIntcIrq(VIF1intc);
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--vif1.irq;
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if (vif1Regs->stat.test(VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS))
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{
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//vif1Regs->stat.FQC = 0;
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// One game doesn't like vif stalling at end, can't remember what. Spiderman isn't keen on it tho
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vif1ch->chcr.STR = false;
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return;
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}
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else if ((vif1ch->qwc > 0) || (vif1.irqoffset > 0))
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{
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if (vif1.stallontag)
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vif1SetupTransfer();
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else
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_VIF1chain();//CPU_INT(DMAC_STALL_SIS, vif1ch->qwc * BIAS);
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}
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}
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if (vif1.inprogress & 0x1)
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{
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_VIF1chain();
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// VIF_NORMAL_FROM_MEM_MODE is a very slow operation.
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// Timesplitters 2 depends on this beeing a bit higher than 128.
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if (vif1ch->chcr.DIR) vif1Regs->stat.FQC = min(vif1ch->qwc, (u16)16);
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// Refraction - Removing voodoo timings for now, completely messes a lot of Path3 masked games.
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/*if (vif1.dmamode == VIF_NORMAL_FROM_MEM_MODE ) CPU_INT(DMAC_VIF1, 1024);
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else */CPU_INT(DMAC_VIF1, g_vifCycles /*VifCycleVoodoo*/);
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return;
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}
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if (!vif1.done)
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{
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if (!(dmacRegs->ctrl.DMAE))
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{
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Console.WriteLn("vif1 dma masked");
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return;
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}
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if ((vif1.inprogress & 0x1) == 0) vif1SetupTransfer();
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if (vif1ch->chcr.DIR) vif1Regs->stat.FQC = min(vif1ch->qwc, (u16)16);
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CPU_INT(DMAC_VIF1, g_vifCycles);
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return;
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}
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if (vif1.vifstalled && vif1.irq)
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{
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DevCon.WriteLn("VIF1 looping on stall\n");
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CPU_INT(DMAC_VIF1, 0);
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return; //Dont want to end if vif is stalled.
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}
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#ifdef PCSX2_DEVBUILD
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if (vif1ch->qwc > 0) Console.WriteLn("VIF1 Ending with %x QWC left");
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if (vif1.cmd != 0) Console.WriteLn("vif1.cmd still set %x tag size %x", vif1.cmd, vif1.tag.size);
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#endif
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vif1Regs->stat.VPS = VPS_IDLE; //Vif goes idle as the stall happened between commands;
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vif1ch->chcr.STR = false;
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g_vifCycles = 0;
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VIF_LOG("VIF1 End");
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hwDmacIrq(DMAC_VIF1);
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}
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void dmaVIF1()
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{
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VIF_LOG("dmaVIF1 chcr = %lx, madr = %lx, qwc = %lx\n"
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" tadr = %lx, asr0 = %lx, asr1 = %lx",
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vif1ch->chcr._u32, vif1ch->madr, vif1ch->qwc,
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vif1ch->tadr, vif1ch->asr0, vif1ch->asr1);
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vif1.done = false;
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g_vifCycles = 0;
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vif1.inprogress = 0;
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#ifdef PCSX2_DEVBUILD
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if (dmacRegs->ctrl.STD == STD_VIF1)
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{
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//DevCon.WriteLn("VIF Stall Control Source = %x, Drain = %x", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3);
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}
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#endif
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if ((vif1ch->chcr.MOD == NORMAL_MODE) || vif1ch->qwc > 0) // Normal Mode
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{
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if (dmacRegs->ctrl.STD == STD_VIF1)
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Console.WriteLn("DMA Stall Control on VIF1 normal");
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if (vif1ch->chcr.DIR) // to Memory
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vif1.dmamode = VIF_NORMAL_FROM_MEM_MODE;
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else
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vif1.dmamode = VIF_NORMAL_TO_MEM_MODE;
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if(vif1ch->chcr.MOD == CHAIN_MODE && vif1ch->qwc > 0) DevCon.Warning(L"VIF1 QWC on Chain CHCR " + vif1ch->chcr.desc());
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}
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else
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{
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vif1.dmamode = VIF_CHAIN_MODE;
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}
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vif1Regs->stat.FQC = min((u16)0x10, vif1ch->qwc);
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// Chain Mode
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vif1Interrupt();
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}
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