mirror of https://github.com/PCSX2/pcsx2.git
439 lines
12 KiB
C++
439 lines
12 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include <list>
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#include "Gif_Unit.h"
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#include "Counters.h"
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#include "Config.h"
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using namespace Threading;
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using namespace R5900;
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alignas(16) u8 g_RealGSMem[Ps2MemSize::GSregs];
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void gsSetVideoMode(GS_VideoMode mode)
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{
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gsVideoMode = mode;
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UpdateVSyncRate();
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}
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// Make sure framelimiter options are in sync with GS capabilities.
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void gsReset()
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{
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GetMTGS().ResetGS();
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UpdateVSyncRate();
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memzero(g_RealGSMem);
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CSRreg.Reset();
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GSIMR.reset();
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}
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void gsUpdateFrequency(Pcsx2Config& config)
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{
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switch (EmuConfig.LimiterMode)
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{
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case LimiterModeType::Nominal:
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config.GS.LimitScalar = EmuConfig.Framerate.NominalScalar;
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break;
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case LimiterModeType::Slomo:
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config.GS.LimitScalar = EmuConfig.Framerate.SlomoScalar;
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break;
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case LimiterModeType::Turbo:
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config.GS.LimitScalar = EmuConfig.Framerate.TurboScalar;
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break;
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default:
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pxAssert("Unknown framelimiter mode!");
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}
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UpdateVSyncRate();
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}
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static __fi void gsCSRwrite( const tGS_CSR& csr )
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{
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if (csr.RESET) {
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GUNIT_WARN("GUNIT_WARN: csr.RESET");
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//Console.Warning( "csr.RESET" );
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//gifUnit.Reset(true); // Don't think gif should be reset...
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gifUnit.gsSIGNAL.queued = false;
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GetMTGS().SendSimplePacket(GS_RINGTYPE_RESET, 0, 0, 0);
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CSRreg.Reset();
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GSIMR.reset();
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}
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if(csr.FLUSH)
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{
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// Our emulated GS has no FIFO, but if it did, it would flush it here...
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//Console.WriteLn("GS_CSR FLUSH GS fifo: %x (CSRr=%x)", value, GSCSRr);
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}
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if(csr.SIGNAL)
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{
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// SIGNAL : What's not known here is whether or not the SIGID register should be updated
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// here or when the IMR is cleared (below).
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GUNIT_LOG("csr.SIGNAL");
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if (gifUnit.gsSIGNAL.queued) {
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//DevCon.Warning("Firing pending signal");
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GSSIGLBLID.SIGID = (GSSIGLBLID.SIGID & ~gifUnit.gsSIGNAL.data[1])
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| (gifUnit.gsSIGNAL.data[0]&gifUnit.gsSIGNAL.data[1]);
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if (!GSIMR.SIGMSK) gsIrq();
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CSRreg.SIGNAL = true; // Just to be sure :p
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}
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else CSRreg.SIGNAL = false;
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gifUnit.gsSIGNAL.queued = false;
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gifUnit.Execute(false, true); // Resume paused transfers
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}
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if (csr.FINISH) {
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CSRreg.FINISH = false;
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gifUnit.gsFINISH.gsFINISHFired = false; //Clear the previously fired FINISH (YS, Indiecar 2005, MGS3)
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}
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if(csr.HSINT) CSRreg.HSINT = false;
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if(csr.VSINT) CSRreg.VSINT = false;
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if(csr.EDWINT) CSRreg.EDWINT = false;
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}
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static __fi void IMRwrite(u32 value)
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{
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GUNIT_LOG("IMRwrite()");
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if (CSRreg.GetInterruptMask() & (~value & GSIMR._u32) >> 8)
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gsIrq();
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GSIMR._u32 = (value & 0x1f00)|0x6000;
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}
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__fi void gsWrite8(u32 mem, u8 value)
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{
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switch (mem)
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{
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// CSR 8-bit write handlers.
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// I'm quite sure these would just write the CSR portion with the other
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// bits set to 0 (no action). The previous implementation masked the 8-bit
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// write value against the previous CSR write value, but that really doesn't
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// make any sense, given that the real hardware's CSR circuit probably has no
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// real "memory" where it saves anything. (for example, you can't write to
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// and change the GS revision or ID portions -- they're all hard wired.) --air
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case GS_CSR: // GS_CSR
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gsCSRwrite( tGS_CSR((u32)value) ); break;
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case GS_CSR + 1: // GS_CSR
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gsCSRwrite( tGS_CSR(((u32)value) << 8) ); break;
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case GS_CSR + 2: // GS_CSR
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gsCSRwrite( tGS_CSR(((u32)value) << 16) ); break;
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case GS_CSR + 3: // GS_CSR
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gsCSRwrite( tGS_CSR(((u32)value) << 24) ); break;
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default:
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*PS2GS_BASE(mem) = value;
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break;
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}
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GIF_LOG("GS write 8 at %8.8lx with data %8.8lx", mem, value);
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}
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//////////////////////////////////////////////////////////////////////////
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// GS Write 16 bit
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__fi void gsWrite16(u32 mem, u16 value)
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{
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GIF_LOG("GS write 16 at %8.8lx with data %8.8lx", mem, value);
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switch (mem)
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{
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// See note above about CSR 8 bit writes, and handling them as zero'd bits
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// for all but the written parts.
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case GS_CSR:
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gsCSRwrite( tGS_CSR((u32)value) );
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return; // do not write to MTGS memory
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case GS_CSR+2:
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gsCSRwrite( tGS_CSR(((u32)value) << 16) );
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return; // do not write to MTGS memory
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case GS_IMR:
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IMRwrite(value);
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return; // do not write to MTGS memory
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}
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*(u16*)PS2GS_BASE(mem) = value;
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}
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//////////////////////////////////////////////////////////////////////////
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// GS Write 32 bit
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__fi void gsWrite32(u32 mem, u32 value)
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{
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pxAssume( (mem & 3) == 0 );
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GIF_LOG("GS write 32 at %8.8lx with data %8.8lx", mem, value);
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switch (mem)
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{
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case GS_CSR:
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gsCSRwrite(tGS_CSR(value));
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return;
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case GS_IMR:
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IMRwrite(value);
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return;
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}
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*(u32*)PS2GS_BASE(mem) = value;
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}
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//////////////////////////////////////////////////////////////////////////
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// GS Write 64 bit
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void __fastcall gsWrite64_generic( u32 mem, const mem64_t* value )
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{
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const u32* const srcval32 = (u32*)value;
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GIF_LOG("GS Write64 at %8.8lx with data %8.8x_%8.8x", mem, srcval32[1], srcval32[0]);
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*(u64*)PS2GS_BASE(mem) = *value;
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}
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void __fastcall gsWrite64_page_00( u32 mem, const mem64_t* value )
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{
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gsWrite64_generic( mem, value );
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}
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void __fastcall gsWrite64_page_01( u32 mem, const mem64_t* value )
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{
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GIF_LOG("GS Write64 at %8.8lx with data %8.8x_%8.8x", mem, (u32*)value[1], (u32*)value[0]);
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switch( mem )
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{
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case GS_BUSDIR:
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gifUnit.stat.DIR = value[0] & 1;
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if (gifUnit.stat.DIR) { // Assume will do local->host transfer
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gifUnit.stat.OPH = true; // Should we set OPH here?
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gifUnit.FlushToMTGS(); // Send any pending GS Primitives to the GS
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GUNIT_LOG("Busdir - GS->EE Download");
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}
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else {
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GUNIT_LOG("Busdir - EE->GS Upload");
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}
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//=========================================================================
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// BUSDIR INSANITY !! MTGS FLUSH NEEDED
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//
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// Yup folks. BUSDIR is evil. The only safe way to handle it is to flush the whole MTGS
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// and ensure complete MTGS and EEcore thread synchronization This is very slow, no doubt,
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// but on the bright side BUSDIR is used quite rarely, indeed.
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// Important: writeback to gsRegs area *prior* to flushing the MTGS. The flush will sync
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// the GS and MTGS register states, and upload our screwy busdir register in the process. :)
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gsWrite64_generic( mem, value );
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GetMTGS().WaitGS();
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return;
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case GS_CSR:
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gsCSRwrite(tGS_CSR(*value));
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return;
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case GS_IMR:
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IMRwrite((u32)value[0]);
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return;
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}
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gsWrite64_generic( mem, value );
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}
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//////////////////////////////////////////////////////////////////////////
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// GS Write 128 bit
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void __fastcall gsWrite128_page_00( u32 mem, const mem128_t* value )
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{
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gsWrite128_generic( mem, value );
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}
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void __fastcall gsWrite128_page_01( u32 mem, const mem128_t* value )
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{
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switch( mem )
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{
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case GS_CSR:
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gsCSRwrite((u32)value[0]);
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return;
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case GS_IMR:
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IMRwrite((u32)value[0]);
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return;
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}
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gsWrite128_generic( mem, value );
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}
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void __fastcall gsWrite128_generic( u32 mem, const mem128_t* value )
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{
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const u32* const srcval32 = (u32*)value;
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GIF_LOG("GS Write128 at %8.8lx with data %8.8x_%8.8x_%8.8x_%8.8x", mem,
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srcval32[3], srcval32[2], srcval32[1], srcval32[0]);
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CopyQWC(PS2GS_BASE(mem), value);
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}
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__fi u8 gsRead8(u32 mem)
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{
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GIF_LOG("GS read 8 from %8.8lx value: %8.8lx", mem, *(u8*)PS2GS_BASE(mem));
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switch (mem & ~0xF)
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{
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case GS_SIGLBLID:
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return *(u8*)PS2GS_BASE(mem);
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default: // Only SIGLBLID and CSR are readable, everything else mirrors CSR
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return *(u8*)PS2GS_BASE(GS_CSR + (mem & 0xF));
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}
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}
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__fi u16 gsRead16(u32 mem)
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{
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GIF_LOG("GS read 16 from %8.8lx value: %8.8lx", mem, *(u16*)PS2GS_BASE(mem));
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switch (mem & ~0xF)
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{
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case GS_SIGLBLID:
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return *(u16*)PS2GS_BASE(mem);
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default: // Only SIGLBLID and CSR are readable, everything else mirrors CSR
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return *(u16*)PS2GS_BASE(GS_CSR + (mem & 0xF));
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}
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}
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__fi u32 gsRead32(u32 mem)
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{
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GIF_LOG("GS read 32 from %8.8lx value: %8.8lx", mem, *(u32*)PS2GS_BASE(mem));
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switch (mem & ~0xF)
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{
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case GS_SIGLBLID:
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return *(u32*)PS2GS_BASE(mem);
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default: // Only SIGLBLID and CSR are readable, everything else mirrors CSR
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return *(u32*)PS2GS_BASE(GS_CSR + (mem & 0xF));
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}
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}
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__fi u64 gsRead64(u32 mem)
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{
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// fixme - PS2GS_BASE(mem+4) = (g_RealGSMem+(mem + 4 & 0x13ff))
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GIF_LOG("GS read 64 from %8.8lx value: %8.8lx_%8.8lx", mem, *(u32*)PS2GS_BASE(mem+4), *(u32*)PS2GS_BASE(mem) );
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switch (mem & ~0xF)
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{
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case GS_SIGLBLID:
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return *(u64*)PS2GS_BASE(mem);
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default: // Only SIGLBLID and CSR are readable, everything else mirrors CSR
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return *(u64*)PS2GS_BASE(GS_CSR + (mem & 0xF));
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}
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}
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__fi u128 gsNonMirroredRead(u32 mem)
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{
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return *(u128*)PS2GS_BASE(mem);
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}
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void gsIrq() {
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hwIntcIrq(INTC_GS);
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}
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// --------------------------------------------------------------------------------------
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// gsFrameSkip
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// --------------------------------------------------------------------------------------
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// This function regulates the frameskipping status of the GS. Our new frameskipper for
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// 0.9.7 is a very simple logic pattern compared to the old mess. The goal now is to provide
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// the most compatible and efficient frameskip, instead of doing the adaptive logic of
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// 0.9.6. This is almost a necessity because of how many games treat the GS: they upload
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// great amounts of data while rendering 2 frames at a time (using double buffering), and
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// then use a simple pageswap to display the contents of the second frame for that vsync.
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// (this approach is mostly seen on interlace games; progressive games less so)
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// The result is that any skip pattern besides a fully consistent 2on,2off would reuslt in
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// tons of missing geometry, rendering frameskip useless.
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//
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// So instead we use a simple "always skipping" or "never skipping" logic.
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//
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// EE vs MTGS:
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// This function does not regulate frame limiting, meaning it does no stalling. Stalling
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// functions are performed by the EE, which itself uses thread sleep logic to avoid spin
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// waiting as much as possible (maximizes CPU resource availability for the GS).
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__fi void gsFrameSkip()
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{
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static int consec_skipped = 0;
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static int consec_drawn = 0;
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static bool isSkipping = false;
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if( !EmuConfig.GS.FrameSkipEnable )
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{
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if( isSkipping )
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{
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// Frameskipping disabled on-the-fly .. make sure the GS is restored to non-skip
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// behavior.
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GSsetFrameSkip( false );
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isSkipping = false;
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}
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return;
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}
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GSsetFrameSkip( isSkipping );
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if( isSkipping )
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{
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++consec_skipped;
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if( consec_skipped >= EmuConfig.GS.FramesToSkip )
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{
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consec_skipped = 0;
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isSkipping = false;
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}
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}
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else
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{
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++consec_drawn;
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if( consec_drawn >= EmuConfig.GS.FramesToDraw )
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{
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consec_drawn = 0;
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isSkipping = true;
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}
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}
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}
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//These are done at VSync Start. Drawing is done when VSync is off, then output the screen when Vsync is on
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//The GS needs to be told at the start of a vsync else it loses half of its picture (could be responsible for some halfscreen issues)
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//We got away with it before i think due to our awful GS timing, but now we have it right (ish)
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void gsPostVsyncStart()
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{
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//gifUnit.FlushToMTGS(); // Needed for some (broken?) homebrew game loaders
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GetMTGS().PostVsyncStart();
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}
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void _gs_ResetFrameskip()
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{
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GSsetFrameSkip( 0 );
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}
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// Disables the GS Frameskip at runtime without any racy mess...
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void gsResetFrameSkip()
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{
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GetMTGS().SendSimplePacket(GS_RINGTYPE_FRAMESKIP, 0, 0, 0);
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}
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void SaveStateBase::gsFreeze()
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{
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FreezeMem(PS2MEM_GS, 0x2000);
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Freeze(gsVideoMode);
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}
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