mirror of https://github.com/PCSX2/pcsx2.git
254 lines
7.4 KiB
C++
254 lines
7.4 KiB
C++
/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2009 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include "iR5900.h"
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#include "VUmicro.h"
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#include "IopMem.h"
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// The full suite of hardware APIs:
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#include "IPU/IPU.h"
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#include "GS.h"
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#include "Counters.h"
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#include "Vif.h"
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#include "VifDma.h"
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#include "SPR.h"
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#include "Sif.h"
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using namespace R5900;
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u8 *psH; // hw mem
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int rdram_devices = 2; // put 8 for TOOL and 2 for PS2 and PSX
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int rdram_sdevid = 0;
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void hwInit()
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{
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gsInit();
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vif0Init();
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vif1Init();
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vifDmaInit();
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sifInit();
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sprInit();
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ipuInit();
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}
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void hwShutdown() {
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ipuShutdown();
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}
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void hwReset()
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{
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hwInit();
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memzero_ptr<Ps2MemSize::Hardware>( PS2MEM_HW );
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//memset(PS2MEM_HW+0x2000, 0, 0x0000e000);
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psHu32(0xf520) = 0x1201;
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psHu32(0xf260) = 0x1D000060;
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// i guess this is kinda a version, it's used by some bioses
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psHu32(0xf590) = 0x1201;
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gsReset();
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ipuReset();
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}
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__forceinline void intcInterrupt()
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{
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if ((cpuRegs.CP0.n.Status.val & 0x400) != 0x400) return;
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if ((psHu32(INTC_STAT)) == 0) {
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DevCon::Notice("*PCSX2*: intcInterrupt already cleared");
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return;
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}
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if ((psHu32(INTC_STAT) & psHu32(INTC_MASK)) == 0) return;
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HW_LOG("intcInterrupt %x", psHu32(INTC_STAT) & psHu32(INTC_MASK));
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if(psHu32(INTC_STAT) & 0x2){
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counters[0].hold = rcntRcount(0);
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counters[1].hold = rcntRcount(1);
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}
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cpuException(0x400, cpuRegs.branch);
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}
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__forceinline void dmacInterrupt()
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{
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if ((cpuRegs.CP0.n.Status.val & 0x10807) != 0x10801) return;
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if( ((psHu16(0xe012) & psHu16(0xe010)) == 0 ) &&
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( psHu16(0xe010) & 0x8000) == 0 ) return;
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if((psHu32(DMAC_CTRL) & 0x1) == 0) return;
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HW_LOG("dmacInterrupt %x", (psHu16(0xe012) & psHu16(0xe010) ||
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psHu16(0xe010) & 0x8000));
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cpuException(0x800, cpuRegs.branch);
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}
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void hwIntcIrq(int n) {
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psHu32(INTC_STAT)|= 1<<n;
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cpuTestINTCInts();
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}
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void hwDmacIrq(int n) {
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psHu32(DMAC_STAT)|= 1<<n;
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cpuTestDMACInts();
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}
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/* Write 'size' bytes to memory address 'addr' from 'data'. */
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int hwMFIFOWrite(u32 addr, u8 *data, u32 size) {
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u32 msize = psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR)+16;
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u8 *dst;
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addr = psHu32(DMAC_RBOR) + (addr & psHu32(DMAC_RBSR));
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/* Check if the transfer should wrap around the ring buffer */
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if ((addr+size) >= msize) {
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int s1 = msize - addr;
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int s2 = size - s1;
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/* it does, so first copy 's1' bytes from 'data' to 'addr' */
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dst = (u8*)PSM(addr);
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if (dst == NULL) return -1;
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memcpy_fast(dst, data, s1);
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/* and second copy 's2' bytes from '&data[s1]' to 'maddr' */
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dst = (u8*)PSM(psHu32(DMAC_RBOR));
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if (dst == NULL) return -1;
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memcpy_fast(dst, &data[s1], s2);
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}
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else {
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/* it doesn't, so just copy 'size' bytes from 'data' to 'addr' */
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dst = (u8*)PSM(addr);
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if (dst == NULL) return -1;
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memcpy_fast(dst, data, size);
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}
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return 0;
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}
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bool hwDmacSrcChainWithStack(DMACh *dma, int id) {
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switch (id) {
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case 0: // Refe - Transfer Packet According to ADDR field
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return true; //End Transfer
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case 1: // CNT - Transfer QWC following the tag.
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dma->madr = dma->tadr + 16; //Set MADR to QW after Tag
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dma->tadr = dma->madr + (dma->qwc << 4); //Set TADR to QW following the data
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return false;
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case 2: // Next - Transfer QWC following tag. TADR = ADDR
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{
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u32 temp = dma->madr; //Temporarily Store ADDR
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dma->madr = dma->tadr + 16; //Set MADR to QW following the tag
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dma->tadr = temp; //Copy temporarily stored ADDR to Tag
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return false;
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}
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case 3: // Ref - Transfer QWC from ADDR field
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case 4: // Refs - Transfer QWC from ADDR field (Stall Control)
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dma->tadr += 16; //Set TADR to next tag
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return false;
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case 5: // Call - Transfer QWC following the tag, save succeeding tag
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{
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u32 temp = dma->madr; //Temporarily Store ADDR
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dma->madr = dma->tadr + 16; //Set MADR to data following the tag
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if ((dma->chcr & 0x30) == 0x0) { //Check if ASR0 is empty
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dma->asr0 = dma->madr + (dma->qwc << 4); //If yes store Succeeding tag
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dma->chcr = (dma->chcr & 0xffffffcf) | 0x10; //1 Address in call stack
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}
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else if((dma->chcr & 0x30) == 0x10){
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dma->chcr = (dma->chcr & 0xffffffcf) | 0x20; //2 Addresses in call stack
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dma->asr1 = dma->madr + (dma->qwc << 4); //If no store Succeeding tag in ASR1
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}else {
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Console::Notice("Call Stack Overflow (report if it fixes/breaks anything)");
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return true; //Return done
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}
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dma->tadr = temp; //Set TADR to temporarily stored ADDR
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return false;
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}
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case 6: // Ret - Transfer QWC following the tag, load next tag
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dma->madr = dma->tadr + 16; //Set MADR to data following the tag
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if ((dma->chcr & 0x30) == 0x20) { //If ASR1 is NOT equal to 0 (Contains address)
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dma->chcr = (dma->chcr & 0xffffffcf) | 0x10; //1 Address left in call stack
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dma->tadr = dma->asr1; //Read ASR1 as next tag
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dma->asr1 = 0; //Clear ASR1
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}
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else { //If ASR1 is empty (No address held)
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if((dma->chcr & 0x30) == 0x10) { //Check if ASR0 is NOT equal to 0 (Contains address)
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dma->chcr = (dma->chcr & 0xffffffcf); //No addresses left in call stack
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dma->tadr = dma->asr0; //Read ASR0 as next tag
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dma->asr0 = 0; //Clear ASR0
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} else { //Else if ASR1 and ASR0 are empty
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//dma->tadr += 16; //Clear tag address - Kills Klonoa 2
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return 1; //End Transfer
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}
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}
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return false;
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case 7: // End - Transfer QWC following the tag
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dma->madr = dma->tadr + 16; //Set MADR to data following the tag
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//Dont Increment tadr, breaks Soul Calibur II and III
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return true; //End Transfer
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}
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return false;
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}
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bool hwDmacSrcChain(DMACh *dma, int id) {
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u32 temp;
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switch (id) {
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case 0: // Refe - Transfer Packet According to ADDR field
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return true; //End Transfer
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case 1: // CNT - Transfer QWC following the tag.
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dma->madr = dma->tadr + 16; //Set MADR to QW after Tag
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dma->tadr = dma->madr + (dma->qwc << 4); //Set TADR to QW following the data
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return false;
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case 2: // Next - Transfer QWC following tag. TADR = ADDR
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temp = dma->madr; //Temporarily Store ADDR
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dma->madr = dma->tadr + 16; //Set MADR to QW following the tag
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dma->tadr = temp; //Copy temporarily stored ADDR to Tag
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return false;
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case 3: // Ref - Transfer QWC from ADDR field
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case 4: // Refs - Transfer QWC from ADDR field (Stall Control)
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dma->tadr += 16; //Set TADR to next tag
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return false;
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case 7: // End - Transfer QWC following the tag
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dma->madr = dma->tadr + 16; //Set MADR to data following the tag
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//Dont Increment tadr, breaks Soul Calibur II and III
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return true; //End Transfer
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}
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return false;
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}
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