mirror of https://github.com/PCSX2/pcsx2.git
706 lines
16 KiB
C
706 lines
16 KiB
C
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#define _GNU_SOURCE
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#include "kloadcore.h"
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#include "kexcepman.h"
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#include "kintrman.h"
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#include "err.h"
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#define ICFG (*(volatile int*)0xbf801450)
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#define IREG (*(volatile int*)0xbf801070)
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#define IMASK (*(volatile int*)0xbf801074)
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#define ICTRL (*(volatile int*)0xbf801078)
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#define DMA_ICR (*(volatile int*)0xbf8010F4)
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#define DMA_ICR2 (*(volatile int*)0xbf801574)
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#define EXCEP_CAUSE (*(volatile int*)0x40C)
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int debug=1;
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#define _dprintf(fmt, args...) \
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if (debug > 0) __printf("intrman: " fmt, ## args)
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struct intrHandler {
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u32 handler;
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void *arg;
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};
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func context_switch_required_handler;
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func context_switch_handler;
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// Additional interrupt mask applied after IMASK
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u32 soft_hw_intr_mask;
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int unknown2[4]; //0x1280 up
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#define INTR_STACK_SIZE 0x800
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unsigned char tempstack[INTR_STACK_SIZE];
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u32 *extable;
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struct intrHandler *intrtable;
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extern struct export export_stub;
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int _start();
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int IntrHandler();
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void intrman_retonly();
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/////////////////////////////syscalls//////////////////////////////////
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__inline void syscall_0();
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void syscall_1_CpuDisableIntr();
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void syscall_2_CpuEnableIntr();
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void syscall_3_intrman_call14();
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void syscall_4_intrman_call17_19();
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void syscall_5_intrman_call18_20();
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void goto_EXCEP_Sys_handler();
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void syscall_8_threadman();
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func syscall[] = {
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(func)syscall_0,
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/* (func)syscall_1_CpuDisableIntr,
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(func)syscall_2_CpuEnableIntr,
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(func)syscall_3_intrman_call14,
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(func)syscall_4_intrman_call17_19,
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(func)syscall_5_intrman_call18_20,
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(func)goto_EXCEP_Sys_handler,
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(func)goto_EXCEP_Sys_handler,
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(func)syscall_8_threadman,
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(func)goto_EXCEP_Sys_handler,
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(func)goto_EXCEP_Sys_handler,
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(func)goto_EXCEP_Sys_handler,
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(func)goto_EXCEP_Sys_handler,
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(func)goto_EXCEP_Sys_handler,
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(func)goto_EXCEP_Sys_handler,
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(func)goto_EXCEP_Sys_handler*/
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};
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///////////////////////////////////////////////////////////////////////
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int intrmanDeinit() {
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return 0;
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}
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///////////////////////////////////////////////////////////////////////
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int intrman_call2()
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{
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IMASK = 0x00;
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DMA_ICR = 0x00;
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DMA_ICR2 = 0x00;
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return 0;
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}
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///////////////////////////////////////////////////////////////////////
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int intrman_call3(){
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return (int)&unknown2;
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}
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///////////////////////////////////////////////////////////////////////
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//
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// interrupt values 0x2E - 0x3F are equivalent to 0x1E - 0x2F with a mode set
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// interrupt values 0x20 - 0x2D have their mode forced to zero
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//
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// mode specifies what registers to save around the call
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// 0 = don't save anything, handler will not change anything
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// 1 = save t0 - t9, gp and fp
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// 2 = save t0 - t9, gp, fp and s0 - s7
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//
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// arg is the value passed to the interrupt handler when it is called
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//
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int RegisterIntrHandler(int interrupt, int mode, intrh_func handler, void *arg)
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{
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u32 ictrl;
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_dprintf("%s interrupt=%x, mode=%x\n", __FUNCTION__, interrupt, mode);
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if (QueryIntrContext()){
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// cannot be called from within an interrupt
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_dprintf("%s ERROR_INTR_CONTEXT\n", __FUNCTION__);
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return ERROR_INTR_CONTEXT;
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}
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CpuSuspendIntr(&ictrl);
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if (interrupt < 0 || interrupt > 0x3F) {
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CpuResumeIntr(ictrl);
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_dprintf("%s ERROR_ILLEGAL_INTRCODE\n", __FUNCTION__);
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return ERROR_ILLEGAL_INTRCODE;
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}
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int real_interrupt = interrupt;
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int real_mode = mode;
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if (interrupt >= 0x2E){
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real_interrupt -= 0x10;
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} else if (interrupt >= 0x20){
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real_mode = 0;
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}
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if (intrtable[real_interrupt].handler){
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CpuResumeIntr(ictrl);
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_dprintf("%s ERROR_DOES_EXIST\n", __FUNCTION__);
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return ERROR_DOES_EXIST;
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}
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intrtable[real_interrupt].handler = (mode & 0x03) | (u32)handler;
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intrtable[real_interrupt].arg = arg;
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CpuResumeIntr(ictrl);
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return 0;
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}
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///////////////////////////////////////////////////////////////////////
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int ReleaseIntrHandler(int interrupt)
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{
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u32 ictrl;
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if (QueryIntrContext()){
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// Cannot be called from within an interrupt
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return ERROR_INTR_CONTEXT;
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}
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CpuSuspendIntr(&ictrl);
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if (interrupt < 0 || interrupt >= 0x40) {
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CpuResumeIntr(ictrl);
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return ERROR_ILLEGAL_INTRCODE;
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}
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if (interrupt >= 0x2E){
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interrupt -= 0x10;
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}
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if (intrtable[interrupt].handler){
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intrtable[interrupt].handler = 0;
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CpuResumeIntr(ictrl);
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return 0;
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}
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CpuResumeIntr(ictrl);
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return ERROR_DOES_EXIST;
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}
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///////////////////////////////////////////////////////////////////////
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int CpuSuspendIntr(u32 *ictrl)
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{
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u32 rval = ICTRL;
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if (ictrl) *ictrl = rval;
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if (rval == 0) return ERROR_CPUDI;
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return 0;
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}
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///////////////////////////////////////////////////////////////////////
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int CpuResumeIntr(u32 ictrl)
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{
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ICTRL = ictrl;
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return 0;
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}
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///////////////////////////////////////////////////////////////////////
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int CpuDisableIntr()
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{
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if (ICTRL) return 0;
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return ERROR_CPUDI;
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}
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///////////////////////////////////////////////////////////////////////
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int CpuEnableIntr()
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{
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//_dprintf("%s\n", __FUNCTION__);
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// intrman_syscall_08();
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// _dprintf("syscall ok\n");
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CpuEnableICTRL();
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return 0;
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}
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///////////////////////////////////////////////////////////////////////
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int CpuGetICTRL()
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{
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return ICTRL;
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}
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///////////////////////////////////////////////////////////////////////
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int CpuEnableICTRL()
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{
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ICTRL = 1;
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return 1;
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}
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///////////////////////////////////////////////////////////////////////
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void intrman_syscall_04()
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{
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__asm__ (
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"li $3, 4\n"
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"syscall\n"
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);
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}
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///////////////////////////////////////////////////////////////////////
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void intrman_syscall_08()
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{
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__asm__ (
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"li $3, 8\n"
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"syscall\n"
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);
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}
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///////////////////////////////////////////////////////////////////////
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void intrman_syscall_10()
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{
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__asm__ (
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"li $3, 16\n"
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"syscall\n"
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);
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}
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///////////////////////////////////////////////////////////////////////
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void intrman_syscall_14()
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{
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__asm__ (
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"li $3, 20\n"
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"syscall\n"
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);
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}
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///////////////////////////////////////////////////////////////////////
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void intrman_syscall_0C()
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{
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__asm__ (
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"li $3, 12\n"
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"syscall\n"
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);
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}
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///////////////////////////////////////////////////////////////////////
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//
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// Interrupt:
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// 0 - 0x1F normal interrupt
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// 0x20 - 0x26
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// 0x27 - 0x2D
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//
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// Return 0 for success, -101 for invalid interrupt number
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//
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#define ERROR_BAD_NUMBER -101
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#define INUM_DMA_0 0x20
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#define INUM_DMA_BERR 0x27
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#define INUM_DMA_7 0x28
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#define IMODE_DMA_IRM 0x100
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#define IMODE_DMA_IQE 0x200
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#define INUM_DMA 3
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int EnableIntr(int interrupt)
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{
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int retval = 0;
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u32 low_irq = interrupt & 0xFF;
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u32 high_irq = interrupt & 0xFFFFFF00;
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u32 ictrl;
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CpuSuspendIntr(&ictrl);
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if( interrupt < 0 ) {
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retval = ERROR_BAD_NUMBER;
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}
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else if (low_irq < INUM_DMA_0){
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IMASK |= (1 << low_irq);
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} else if (low_irq < INUM_DMA_BERR){
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DMA_ICR = (DMA_ICR & ((~(1<<(low_irq-INUM_DMA_0)))&0x00FFFFFF))
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| (1 << (INUM_DMA_BERR-INUM_DMA_0 + 16))
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| (1<<(low_irq-INUM_DMA_0+0x10))
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| ((high_irq & IMODE_DMA_IRM) ? (1<<(low_irq-INUM_DMA_0)) : 0);
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DMA_ICR2 = (DMA_ICR2 & ((~(1<<(low_irq-INUM_DMA_0)))&0x00FFFFFF))
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| ((high_irq & IMODE_DMA_IQE) ? (1<<(low_irq-0x10)) : 0);
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IMASK |= 1<<INUM_DMA;
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} else if ( (low_irq-INUM_DMA_7)<6){ // low_irq = 0x27 isn't handled?
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u32 extra = 0;
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if (high_irq & IMODE_DMA_IQE)
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extra = (1<<(low_irq-INUM_DMA_7 + (INUM_DMA_BERR-INUM_DMA_0)));
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DMA_ICR2=(DMA_ICR2&(~(1<<(low_irq-INUM_DMA_7 + (INUM_DMA_BERR-INUM_DMA_0))) & 0x00FFFFFF)) | (1<<(low_irq-INUM_DMA_7+0x10)) | extra;
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DMA_ICR |= (DMA_ICR&0x00FFFFFF)| (1 << (INUM_DMA_BERR-INUM_DMA_0 + 16));
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IMASK |= 1<<INUM_DMA;
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} else {
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retval = ERROR_BAD_NUMBER;
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}
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CpuResumeIntr(ictrl);
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return retval;
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}
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///////////////////////////////////////////////////////////////////////
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//not checked
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int DisableIntr(int interrupt, int *oldstat){
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u32 ictrl;
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u32 old_IMASK;
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u32 low_irq;
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u32 stat;
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u32 ret;
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low_irq = interrupt & 0xFF;
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CpuSuspendIntr(&ictrl);
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ret = -101;
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stat = -103;
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if (low_irq<0) goto end;
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ret = 0;
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if (low_irq<0x20)
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{
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old_IMASK=IMASK;
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IMASK&=~(1<<low_irq);
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if (old_IMASK&(1<<low_irq))
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{
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stat = low_irq;
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goto end;
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}
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ret = -103;
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goto end;
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}
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if (low_irq<0x27)
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{
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if (DMA_ICR & 0xFFFFFF & (1<<(low_irq-0x10)))
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{
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if (((DMA_ICR & 0xFFFFFF)>>(low_irq-0x20)) & 0x01) stat = low_irq | 0x100;
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if (DMA_ICR2 & (1<<(low_irq-0x20))) stat |= 0x200;
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DMA_ICR2 &= ~(1<<(low_irq-0x20)) & 0xFFFFFF;
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goto end;
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}
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ret = -103;
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goto end;
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}
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if (low_irq<0x2E)
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{
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if (DMA_ICR2 & 0xFFFFFF & (1<<(low_irq-0x18)))
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{
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stat = low_irq;
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if (((DMA_ICR2 & 0xFFFFFF)>>(low_irq-0x21))&0x01) stat |= 0x200;
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DMA_ICR2 &= ~(1<<(low_irq-0x18)) & 0xFFFFFF;
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goto end;
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}
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ret = -103;
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goto end;
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}
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end:
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if (oldstat) *(volatile int*)oldstat = stat;
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CpuResumeIntr(ictrl);
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return ret;
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}
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///////////////////////////////////////////////////////////////////////
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// Enable
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void intrman_call16(int interrupt)
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{
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u32 ictrl;
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CpuSuspendIntr(&ictrl);
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interrupt &= 0xFF;
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if (interrupt < 0x20){
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soft_hw_intr_mask |= (1 << interrupt);
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} else if (interrupt < 0x28){
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unknown2[1] |= 1 << (interrupt-0x08);
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} else if (interrupt < 0x2E){
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unknown2[2] |= 1 << (interrupt-0x10);
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}
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CpuResumeIntr(ictrl);
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}
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///////////////////////////////////////////////////////////////////////
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// Disable
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void intrman_call15(int interrupt)
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{
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u32 ictrl;
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CpuSuspendIntr(&ictrl);
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interrupt &= 0xFF;
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if (interrupt < 0x20){
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soft_hw_intr_mask &= ~(1 << interrupt);
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} else if (interrupt < 0x28){
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unknown2[1] &= ~(1 << (interrupt-0x08));
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} else if (interrupt < 0x2E){
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unknown2[2] &= ~(1 << (interrupt-0x10));
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}
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CpuResumeIntr(ictrl);
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}
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///////////////////////////////////////////////////////////////////////
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void intrman_call27(int arg0)
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{
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unknown2[3]=arg0;
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}
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///////////////////////////////////////////////////////////////////////
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//
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int IntrHandler()
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{
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u32 masked_icr = DMA_ICR & unknown2[1];
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_dprintf("%s\n", __FUNCTION__);
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while (masked_icr & 0x7F008000){
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int i;
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if (masked_icr & 0x00008000){
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// Int 0x25
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func int_func = (func)(intrtable[0x25].handler & 0xFFFFFFFC);
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DMA_ICR &= 0x00FF7FFF;
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if (int_func){
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int_func(intrtable[0x25].arg);
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}
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}
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// Check each DMA interrupt
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// The bits 24 - 30 are set for DMA channels 0 - 6 (ints 0x20 - 0x26 respectively)
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// The bits 16 - 23 are the corresponding mask bits - the interrupt is only generated if the mask bit is set.
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for (i=0; i < 7; ++i){
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u32 ibit = 0x01000000 << i;
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if (masked_icr & ibit){
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func int_func = (func)(intrtable[0x20+i].handler & 0xFFFFFFFC);
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DMA_ICR &= (ibit | 0x00FFFFFF);
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if (int_func){
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if (!int_func(intrtable[0x20+i].arg)){
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// Disable / mask the interrupt if it was not handled
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DMA_ICR &= (~(0x00010000 << i) & 0x00FFFFFF);
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}
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}
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}
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}
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}
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DMA_ICR &= 0x007FFFFF;
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while (DMA_ICR & 0x00800000){
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// do nothing
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}
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{
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u32 temp_icr = DMA_ICR;
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temp_icr &= 0x007FFFFF;
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temp_icr |= 0x00800000;
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DMA_ICR = temp_icr;
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}
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return 1;
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}
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///////////////////////////////////////////////////////////////////////
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//
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// Default context switch handler - does not switch context.
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//
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int default_ctx_switch_handler(u32 sp_in)
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{
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return sp_in;
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}
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///////////////////////////////////////////////////////////////////////
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//
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// Default routine to request a context switch. Does not request one.
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//
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int default_ctx_switch_required_handler()
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{
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return 0;
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}
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void SetCtxSwitchHandler(func handler){
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context_switch_handler = handler;
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}
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void* ResetCtxSwitchHandler()
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{
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context_switch_handler = default_ctx_switch_handler;
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return &context_switch_handler;
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}
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void SetCtxSwitchReqHandler(func handler)
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{
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context_switch_required_handler = handler;
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}
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int ResetCtxSwitchReqHandler()
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{
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context_switch_required_handler = default_ctx_switch_required_handler;
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}
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///////////////////////////////////////////////////////////////////////
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// Return non-zero if sp is in an interrupt context
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int QueryIntrStack(unsigned char* sp)
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{
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int retval = 0;
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if ( (sp < tempstack + INTR_STACK_SIZE) && (sp > tempstack) ){
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retval = 1;
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}
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return retval;
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}
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///////////////////////////////////////////////////////////////////////
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// Return non-zero is we're currently in a interrupt context
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int QueryIntrContext()
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{
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unsigned char* sp;
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__asm__ ("move %0, $29\n" : "=r"(sp) :);
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return QueryIntrStack(sp);
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}
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///////////////////////////////////////////////////////////////////////
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//
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int iCatchMultiIntr()
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{
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unsigned char* sp;
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__asm__ ("move %0, $29\n" : "=r"(sp) :);
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if (QueryIntrStack(sp)){
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if (sp >= tempstack + 0x160){
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u32 SR;
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__asm__ ("mfc0 %0, $12\n" : "=r"(SR));
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if (SR & 1 == 0){
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u32 set_SR = SR | 1;
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__asm__ volatile (
|
|
"mtc0 %0, $12\n"
|
|
"nop\n"
|
|
"nop\n"
|
|
"mtc0 %1, $12\n" : : "r"(set_SR), "r" (SR)
|
|
);
|
|
}
|
|
return SR;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
///////////////////////////////////////////////////////////////////////
|
|
// called by EXCEP_Sys_handler
|
|
void EXCEP_Sys_8() {
|
|
_dprintf("%s\n", __FUNCTION__);
|
|
}
|
|
///////////////////////////////////////////////////////////////////////
|
|
//not finished
|
|
void syscall_3_intrman_call14(){
|
|
}
|
|
|
|
///////////////////////////////////////////////////////////////////////
|
|
//not finished
|
|
void syscall_4_intrman_call17_19(){
|
|
}
|
|
|
|
///////////////////////////////////////////////////////////////////////
|
|
__inline void syscall_0(){
|
|
func funct;
|
|
funct=(func)((*(volatile int*)(0x404))+4);
|
|
__asm__ (
|
|
"jr %0\n"
|
|
"rfe\n"
|
|
: "=r" (funct)
|
|
);
|
|
}
|
|
|
|
///////////////////////////////////////////////////////////////////////
|
|
void retonly(){}
|
|
|
|
u32 callContextSwitchRequiredHandler()
|
|
{
|
|
if (NULL != context_switch_required_handler){
|
|
return context_switch_required_handler();
|
|
} else {
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
//////////////////////////////entrypoint///////////////////////////////
|
|
struct export export_stub={
|
|
0x41C00000,
|
|
0,
|
|
VER(1, 2), // 1.2 => 0x102
|
|
0,
|
|
"intrman",
|
|
(func)_start, // entrypoint
|
|
(func)intrmanDeinit,
|
|
(func)intrman_call2,
|
|
(func)intrman_call3,
|
|
(func)RegisterIntrHandler,
|
|
(func)ReleaseIntrHandler,
|
|
(func)EnableIntr,
|
|
(func)DisableIntr,
|
|
(func)CpuDisableIntr,
|
|
(func)CpuEnableIntr,
|
|
(func)intrman_syscall_04, // 0x0A
|
|
(func)intrman_syscall_08,
|
|
(func)CpuGetICTRL,
|
|
(func)CpuEnableICTRL,
|
|
(func)intrman_syscall_0C, // 0x0E
|
|
(func)intrman_call15,
|
|
(func)intrman_call16, // 0x10
|
|
(func)CpuSuspendIntr,
|
|
(func)CpuResumeIntr,
|
|
(func)CpuSuspendIntr,
|
|
(func)CpuResumeIntr,
|
|
(func)intrman_syscall_10,
|
|
(func)intrman_syscall_14,
|
|
(func)QueryIntrContext, // 0x17
|
|
(func)QueryIntrStack,
|
|
(func)iCatchMultiIntr,
|
|
(func)retonly,
|
|
(func)intrman_call27,
|
|
(func)SetCtxSwitchHandler, // 0x1C (called by threadman)
|
|
(func)ResetCtxSwitchHandler,
|
|
(func)SetCtxSwitchReqHandler, // 0x1E (called by threadman)
|
|
(func)ResetCtxSwitchReqHandler,
|
|
0
|
|
};
|
|
|
|
extern struct exHandler EXCEP_Int_priority_exception_handler;
|
|
extern struct exHandler EXCEP_Int_handler;
|
|
extern struct exHandler EXCEP_Sys_handler;
|
|
|
|
//////////////////////////////entrypoint///////////////////////////////
|
|
int _start(){
|
|
int i;
|
|
|
|
intrtable = (struct intrHandler*)(GetExHandlersTable() + 0x40);
|
|
|
|
IMASK = 0x00;
|
|
DMA_ICR = 0x00;
|
|
DMA_ICR2 = 0x00;
|
|
|
|
for (i=0; i < 0x2F; i++) {
|
|
intrtable[i].handler = 0;
|
|
intrtable[i].arg = 0;
|
|
}
|
|
|
|
soft_hw_intr_mask = 0xFFFFFFFF;
|
|
unknown2[1] = -1;
|
|
unknown2[2] = -1;
|
|
unknown2[0] = (int)intrtable;
|
|
|
|
RegisterExceptionHandler(0, &EXCEP_Int_handler);
|
|
RegisterPriorityExceptionHandler(0, 3, &EXCEP_Int_priority_exception_handler);
|
|
RegisterExceptionHandler(8, &EXCEP_Sys_handler);
|
|
RegisterIntrHandler(3, 1, &IntrHandler, 0);
|
|
RegisterLibraryEntries(&export_stub);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void ijb_ping1()
|
|
{
|
|
_dprintf("%s\n", __FUNCTION__);
|
|
unsigned char* x = tempstack;
|
|
}
|
|
void ijb_trace3(u32 a0, u32 a1, u32 a2, u32 a3)
|
|
{
|
|
__printf("trace3: 0x%x, 0x%x, 0x%x\n", a0, a1, a2);
|
|
while (1){}
|
|
}
|