mirror of https://github.com/PCSX2/pcsx2.git
468 lines
12 KiB
C
468 lines
12 KiB
C
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#include "kloadcore.h"
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#include "kintrman.h"
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#include "kdmacman.h"
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#include "ksifman.h"
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#define min(a, b) ((a)<(b)?(a):(b))
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#define max(a, b) ((a)>(b)?(a):(b))
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#define CONFIG_1450 (*(volatile int*)0xBF801450)
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#define BD0 (*(volatile int*)0xBD000000) //mscom
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#define BD1 (*(volatile int*)0xBD000010) //smcom
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#define BD2 (*(volatile int*)0xBD000020) //msflag
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#define BD3 (*(volatile int*)0xBD000030) //smflag
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#define BD4 (*(volatile int*)0xBD000040)
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#define BD5 (*(volatile int*)0xBD000050)
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#define BD6 (*(volatile int*)0xBD000060)
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#define BD7 (*(volatile int*)0xBD000070)
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int debug=1;
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#define _dprintf(fmt, args...) \
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if (debug > 0) __printf("sifman: " fmt, ## args)
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struct sifData{
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int data,
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words,
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count,
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addr;
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};
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int sifSIF2Init =0,
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sifInit =0;
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struct sm_internal{
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short id, //+000 some id...?!?
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res1; //+002 not used
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int index; //+004 current position in dma buffer
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struct sifData *crtbuf; //+008 address of current used buffer
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struct sifData buf1[32]; //+00C first buffer
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struct sifData buf2[32]; //+20C second buffer
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int (*function)(int);//+40C a function ?!?
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int param; //+410 a parameter for function
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int res2; //+414 not used
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} vars;
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struct sifData one;
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int res3, res4;
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int _start(int argc, char* argv);
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void RegisterSif0Handler();
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///////////////////////////////////////////////////////////////////////
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int getBD2_loopchanging(){
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register int a, b;
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a=BD2;
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b=BD2;
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while (a!=b) {
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a=b;
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b=BD2;
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}
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return a;
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}
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///////////////////////////////////////////////////////////////////////
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int getBD3_loopchanging(){
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register int a, b;
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a=BD3;
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b=BD3;
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while (a!=b) {
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a=b;
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b=BD3;
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}
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return a;
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}
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///////////////////////////////////////////////////////////////////////[04]
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void SifSIF2Init(){
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if (sifSIF2Init!=0) return;
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DMAch_SIF2_CHCR = 0; //reset ch. 2
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DMAch_DPCR|= 0x800; //enable dma ch. 2
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DMAch_DPCR;
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sifSIF2Init =1;
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}
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///////////////////////////////////////////////////////////////////////[05]
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void SifInit(){
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u32 x, y;
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u32 msflag;
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_dprintf("%s: sifInit=%d\n", __FUNCTION__, sifInit);
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if (sifInit!=0) return;
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DMAch_DPCR2 |=0x8800; //enable dma ch. 9 and 10
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DMAch_SIF9_CHCR = 0;
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DMAch_SIFA_CHCR = 0;
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SifSIF2Init();
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if (CONFIG_1450 & 0x10)
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CONFIG_1450 |= 0x10;
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CONFIG_1450 |= 0x1;
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RegisterSif0Handler();
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CpuSuspendIntr(&x); //intrman
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CpuEnableIntr(); //intrman
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_dprintf("%s: waiting EE...\n", __FUNCTION__);
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do { //EE kernel sif ready
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CpuSuspendIntr(&y); //intrman
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msflag = getBD2_loopchanging();
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CpuResumeIntr(y); //intrman
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} while(!(msflag & 0x10000));
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_dprintf("%s: EE ready\n", __FUNCTION__);
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CpuResumeIntr(x); //intrman
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SifSetDChain();
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SifSetIOPrcvaddr(0); //sif1 receive buffer
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BD3 = 0x10000; //IOPEE_sifman_init
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BD3;
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sifInit =1;
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_dprintf("%s ok\n", __FUNCTION__);
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}
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///////////////////////////////////////////////////////////////////////[02]
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void SifDeinit(){
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int x;
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DisableIntr(INT_DMA9, &x);
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ReleaseIntrHandler(INT_DMA9);
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DMAch_SIF9_CHCR=0;
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DMAch_SIFA_CHCR=0;
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if (CONFIG_1450 & 0x10)
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CONFIG_1450 |= 0x10;
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}
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///////////////////////////////////////////////////////////////////////[29]
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int SifCheckInit(){
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return sifInit;
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}
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///////////////////////////////////////////////////////////////////////[06]
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void SifSetDChain(){
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if ((BD4 & 0x40) == 0) BD4=0x40;
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DMAch_SIFA_CHCR =0;
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DMAch_SIFA_BCR_size =32;
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DMAch_SIFA_CHCR =DMAf_08|DMAf_CO|DMAf_TR|DMAf_30;//EE->IOP (to memory)
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}
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///////////////////////////////////////////////////////////////////////[30]
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void SifSet0CB(int (*_function)(int), int _param){
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vars.function=_function;
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vars.param=_param;
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}
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///////////////////////////////////////////////////////////////////////[31]
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void SifReset0CB(){
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vars.function=NULL;
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vars.param=0;
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}
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///////////////////////////////////////////////////////////////////////
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int Sif0Handler(void *common) {
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struct sm_internal *vars = (struct sm_internal *)common;
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int var_10;
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if (vars->function)
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vars->function(vars->param);
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if ((DMAch_SIF9_CHCR & DMAf_TR == 0) && (vars->index>0)) {
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DMAch_SIF9_CHCR =0;
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DMAch_SIF9_TADR =(int)vars->crtbuf;
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DMAch_SIF9_BCR =32;
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if (BD4 & 0x20 == 0) BD4 = 0x20;
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vars->id++;
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if (vars->crtbuf == vars->buf1){
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vars->index=0;
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vars->crtbuf=vars->buf2;
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}else
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vars->crtbuf=vars->buf1;
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DMAch_SIF9_CHCR = DMAf_DR|DMAf_08|DMAf_CO|DMAf_LI|DMAf_TR;//IOP->EE (from memory)
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var_10=DMAch_SIF9_CHCR;
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}
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return 1;
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}
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///////////////////////////////////////////////////////////////////////
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void RegisterSif0Handler(){
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u32 x;
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vars.index=0;
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vars.crtbuf=vars.buf1;
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vars.function=NULL;
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vars.param=0;
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CpuSuspendIntr(&x); //intrman
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RegisterIntrHandler(INT_DMA9, 1, Sif0Handler, &vars); //intrman
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EnableIntr(INT_DMA9); //intrman
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CpuResumeIntr(x); //intrman
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}
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///////////////////////////////////////////////////////////////////////
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void enqueue(struct sifman_DMA *psd){
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vars.crtbuf[vars.index].data=(u32)psd->data & 0xFFFFFF; //16MB addressability
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if (psd->attr & SIF_DMA_INT_I)
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vars.crtbuf[vars.index].data |= 0x40000000;
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vars.crtbuf[vars.index].words=(psd->size + 3)/4 & 0xFFFFFF;
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vars.crtbuf[vars.index].count = ((psd->size + 3)/16 + (((psd->size + 3)/4) & 3))
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| 0x10000000;
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if (psd->attr & SIF_DMA_INT_O)
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vars.crtbuf[vars.index].count |=0x80000000;
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vars.crtbuf[vars.index].addr = (u32)psd->addr & 0x1FFFFFFF; //512MB addresability
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vars.index++;
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}
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///////////////////////////////////////////////////////////////////////[07]
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u32 SifSetDma(struct sifman_DMA *psd, int len){
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int var_20;
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register unsigned int ret;
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int i;
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if (32-vars.index < len) return 0; //no place
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ret = vars.id;
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ret = (ret << 16) | ((vars.index & 0xFF) << 8) | (len & 0xFF);
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if (vars.index)
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vars.crtbuf[vars.index-1].data &= 0x7FFFFFFF;
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for (i=0; i<len; i++)
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enqueue(&psd[i]);
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vars.crtbuf[vars.index-1].data |= 0x80000000;
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if ((DMAch_SIF9_CHCR & DMAf_TR) == 0) {
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DMAch_SIF9_CHCR=0;
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DMAch_SIF9_TADR=(int)vars.crtbuf;
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if ((BD4 & 0x20) == 0) BD4=0x20;
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DMAch_SIF9_BCR_size=32;
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vars.index=0;
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vars.id++;
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if (vars.crtbuf==vars.buf1)vars.crtbuf=vars.buf2;
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//stupid :D (why the if?)
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DMAch_SIF9_CHCR=DMAf_DR|DMAf_08|DMAf_CO|DMAf_LI|DMAf_TR;//IOP->EE
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var_20=DMAch_SIF9_CHCR; //?!?
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}
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return ret;
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}
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///////////////////////////////////////////////////////////////////////[08]
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int SifDmaStat(u32 id){
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if (DMAch_SIF9_CHCR & DMAf_TR){
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if (id>>16 == vars.id) return 1; //waiting in queue
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if (id>>16+1 == vars.id) return 0; //running
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}
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return -1; //terminated
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}
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///////////////////////////////////////////////////////////////////////[09]
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void SifSend(struct sifman_DMA sd){
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sd.size = sd.size /4 + ((sd.size & 3) > 0);
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one.data = ((u32)sd.data & 0xFFFFFF) | 0x80000000;
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one.words= sd.size & 0xFFFFFF;
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if (sd.attr & SIF_DMA_INT_I) one.data |= 0x40000000;
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one.count = (sd.size/4 + ((sd.size & 3)>0)) | 0x10000000;
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if (sd.attr & SIF_DMA_INT_O) one.count|= 0x80000000;
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one.addr = (u32)sd.addr & 0xFFFFFFF;
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if (BD4 & 0x20 == 0) BD4=0x20;
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DMAch_SIF9_CHCR=0;
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DMAch_SIF9_TADR=(u32)&one;
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DMAch_SIF9_BCR_size=32;
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DMAch_SIF9_CHCR=DMAf_DR|DMAf_08|DMAf_CO|DMAf_LI|DMAf_TR; //IOP->EE
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DMAch_SIF9_CHCR;
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}
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///////////////////////////////////////////////////////////////////////[10]
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void SifSendSync(){
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while (DMAch_SIF9_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[11]
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int SifIsSending(){
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return (DMAch_SIF9_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[12]
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void SifSetSIF0DMA(void *data, int size, int attr){
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size=size/4 + ((size & 3)>0);
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if (BD4 & 0x20 == 0) BD4=0x20;
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DMAch_SIF9_CHCR=0;
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DMAch_SIF9_MADR=(u32)data & 0xFFFFFF;
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DMAch_SIF9_BCR_size=32;
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DMAch_SIF9_BCR_count=size/32 + ((size & 0x1F)>0);
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DMAch_SIF9_CHCR=DMAf_DR|DMAf_CO|DMAf_TR;
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DMAch_SIF9_CHCR;
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}
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///////////////////////////////////////////////////////////////////////[13]
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void SifSendSync0(){
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while (DMAch_SIF9_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[14]
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int SifIsSending0(){
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return (DMAch_SIF9_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[15]
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void SifSetSIF1DMA(void *data, int size, int attr){
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size=size/4 + ((size & 3)>0);
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if (BD4 & 0x40 == 0) BD4=0x40;
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DMAch_SIFA_CHCR=0;
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DMAch_SIFA_MADR=(u32)data & 0xFFFFFF;
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DMAch_SIFA_BCR_size=32;
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DMAch_SIFA_BCR_count=size/32 + ((size & 0x1F)>0);
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DMAch_SIFA_CHCR=DMAf_CO|DMAf_TR|
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(attr & SIF_DMA_BSN?DMAf_30:0);
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DMAch_SIFA_CHCR;
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}
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///////////////////////////////////////////////////////////////////////[16]
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void SifSendSync1(){
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while (DMAch_SIFA_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[17]
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int SifIsSending1(){
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return (DMAch_SIFA_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[18]
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void SifSetSIF2DMA(void *data, int size, int attr){
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size=size/4 + ((size & 3)>0);
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if (BD4 & 0x80 == 0) BD4=0x80;
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DMAch_SIF2_CHCR=0;
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DMAch_SIF2_MADR=(u32)data & 0xFFFFFF;
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DMAch_SIF2_BCR_size=min(size, 32);
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DMAch_SIF2_BCR_count=size/32 + ((size & 0x1F)>0);
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DMAch_SIF2_CHCR=DMAf_CO |DMAf_TR|
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((attr & SIF_TO_EE ?DMAf_DR:
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(attr & SIF_DMA_BSN?DMAf_30:0)));
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DMAch_SIF2_CHCR;
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}
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///////////////////////////////////////////////////////////////////////[19]
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void SifSendSync2(){
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while (DMAch_SIF2_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[20]
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int SifIsSending2(){
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return (DMAch_SIF2_CHCR & DMAf_TR);
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}
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///////////////////////////////////////////////////////////////////////[21]
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int SifGetEEIOPflags(){
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return getBD2_loopchanging();
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}
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///////////////////////////////////////////////////////////////////////[22]
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int SifSetEEIOPflags(int val){
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BD2=val;
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return getBD2_loopchanging();
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}
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///////////////////////////////////////////////////////////////////////[23]
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int SifGetIOPEEflags(){
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return getBD3_loopchanging();
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}
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///////////////////////////////////////////////////////////////////////[24]
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int SifSetIOPEEflags(int val){
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BD3=val;
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return getBD3_loopchanging();
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}
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///////////////////////////////////////////////////////////////////////[25]
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int SifGetEErcvaddr(){
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return BD0;
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}
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///////////////////////////////////////////////////////////////////////[26]
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int SifGetIOPrcvaddr(){
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return BD1;
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}
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///////////////////////////////////////////////////////////////////////[27]
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int SifSetIOPrcvaddr(int val){
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BD1=val;
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return BD1;
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}
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///////////////////////////////////////////////////////////////////////[28]
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void SifSet1450_2(){
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CONFIG_1450 |= 2;
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CONFIG_1450 &= ~2;
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CONFIG_1450;
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}
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///////////////////////////////////////////////////////////////////////[01,03,32,33,34,35]
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void _retonly(){}
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//////////////////////////////entrypoint///////////////////////////////
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struct export sifman_stub={
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0x41C00000,
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0,
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VER(1, 1), // 1.1 => 0x101
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0,
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"sifman",
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(func)_start, // entrypoint
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(func)_retonly,
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(func)SifDeinit,
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(func)_retonly,
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(func)SifSIF2Init,
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(func)SifInit,
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(func)SifSetDChain,
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(func)SifSetDma,
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(func)SifDmaStat,
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(func)SifSend,
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(func)SifSendSync,
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(func)SifIsSending,
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(func)SifSetSIF0DMA,
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(func)SifSendSync0,
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(func)SifIsSending0,
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(func)SifSetSIF1DMA,
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(func)SifSendSync1,
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(func)SifIsSending1,
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(func)SifSetSIF2DMA,
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(func)SifSendSync2,
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(func)SifIsSending2,
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(func)SifGetEEIOPflags,
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(func)SifSetEEIOPflags,
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(func)SifGetIOPEEflags,
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(func)SifSetIOPEEflags,
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(func)SifGetEErcvaddr,
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(func)SifGetIOPrcvaddr,
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(func)SifSetIOPrcvaddr,
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(func)SifSet1450_2,
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(func)SifCheckInit,
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(func)SifSet0CB,
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(func)SifReset0CB,
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(func)_retonly,
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(func)_retonly,
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(func)_retonly,
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(func)_retonly,
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0
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};
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//////////////////////////////entrypoint///////////////////////////////[00]
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int _start(int argc, char* argv){
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return RegisterLibraryEntries(&sifman_stub) > 0;
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}
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