mirror of https://github.com/PCSX2/pcsx2.git
277 lines
8.0 KiB
C++
277 lines
8.0 KiB
C++
// SPDX-FileCopyrightText: 2002-2024 PCSX2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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/*
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* ix86 core v0.9.1
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*
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* Original Authors (v0.6.2 and prior):
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* linuzappz <linuzappz@pcsx.net>
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* alexey silinov
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* goldfinger
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* zerofrog(@gmail.com)
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*
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* Authors of v0.9.1:
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* Jake.Stine(@gmail.com)
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* cottonvibes(@gmail.com)
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* sudonim(1@gmail.com)
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*/
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#include "common/emitter/internal.h"
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#include "common/emitter/implement/helpers.h"
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namespace x86Emitter
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{
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void _xMovRtoR(const xRegisterInt& to, const xRegisterInt& from)
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{
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pxAssert(to.GetOperandSize() == from.GetOperandSize());
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if (to == from)
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return; // ignore redundant MOVs.
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xOpWrite(from.GetPrefix16(), from.Is8BitOp() ? 0x88 : 0x89, from, to);
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}
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void xImpl_Mov::operator()(const xRegisterInt& to, const xRegisterInt& from) const
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{
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// FIXME WTF?
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_xMovRtoR(to, from);
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}
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void xImpl_Mov::operator()(const xIndirectVoid& dest, const xRegisterInt& from) const
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{
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// mov eax has a special from when writing directly to a DISP32 address
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// (sans any register index/base registers).
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xOpWrite(from.GetPrefix16(), from.Is8BitOp() ? 0x88 : 0x89, from, dest);
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}
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void xImpl_Mov::operator()(const xRegisterInt& to, const xIndirectVoid& src) const
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{
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// mov eax has a special from when reading directly from a DISP32 address
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// (sans any register index/base registers).
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xOpWrite(to.GetPrefix16(), to.Is8BitOp() ? 0x8a : 0x8b, to, src);
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}
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void xImpl_Mov::operator()(const xIndirect64orLess& dest, sptr imm) const
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{
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switch (dest.GetOperandSize())
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{
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case 1:
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pxAssertMsg(imm == (s8)imm || imm == (u8)imm, "Immediate won't fit!");
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break;
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case 2:
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pxAssertMsg(imm == (s16)imm || imm == (u16)imm, "Immediate won't fit!");
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break;
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case 4:
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pxAssertMsg(imm == (s32)imm || imm == (u32)imm, "Immediate won't fit!");
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break;
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case 8:
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pxAssertMsg(imm == (s32)imm, "Immediate won't fit in immediate slot, go through a register!");
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break;
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default:
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pxAssertMsg(0, "Bad indirect size!");
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}
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xOpWrite(dest.GetPrefix16(), dest.Is8BitOp() ? 0xc6 : 0xc7, 0, dest, dest.GetImmSize());
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dest.xWriteImm(imm);
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}
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// preserve_flags - set to true to disable optimizations which could alter the state of
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// the flags (namely replacing mov reg,0 with xor).
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void xImpl_Mov::operator()(const xRegisterInt& to, sptr imm, bool preserve_flags) const
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{
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switch (to.GetOperandSize())
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{
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case 1:
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pxAssertMsg(imm == (s8)imm || imm == (u8)imm, "Immediate won't fit!");
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break;
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case 2:
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pxAssertMsg(imm == (s16)imm || imm == (u16)imm, "Immediate won't fit!");
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break;
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case 4:
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pxAssertMsg(imm == (s32)imm || imm == (u32)imm, "Immediate won't fit!");
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break;
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case 8:
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pxAssertMsg(imm == (s32)imm || imm == (u32)imm, "Immediate won't fit in immediate slot, use mov64 or lea!");
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break;
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default:
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pxAssertMsg(0, "Bad indirect size!");
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}
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const xRegisterInt& to_ = to.GetNonWide();
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if (!preserve_flags && (imm == 0))
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{
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_g1_EmitOp(G1Type_XOR, to_, to_);
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}
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else if (imm == (sptr)(u32)imm || !to.IsWide())
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{
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// Note: MOV does not have (reg16/32,imm8) forms.
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u8 opcode = (to_.Is8BitOp() ? 0xb0 : 0xb8) | to_.Id;
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xOpAccWrite(to_.GetPrefix16(), opcode, 0, to_);
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to_.xWriteImm(imm);
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}
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else
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{
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xOpWrite(to.GetPrefix16(), 0xc7, 0, to);
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to.xWriteImm(imm);
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}
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}
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const xImpl_Mov xMOV;
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void xImpl_MovImm64::operator()(const xRegister64& to, s64 imm, bool preserve_flags) const
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{
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if (imm == (u32)imm || imm == (s32)imm)
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{
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xMOV(to, imm, preserve_flags);
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}
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else
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{
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u8 opcode = 0xb8 | to.Id;
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xOpAccWrite(to.GetPrefix16(), opcode, 0, to);
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xWrite64(imm);
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}
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}
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const xImpl_MovImm64 xMOV64;
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// --------------------------------------------------------------------------------------
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// CMOVcc
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// --------------------------------------------------------------------------------------
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#define ccSane() pxAssertMsg(ccType >= 0 && ccType <= 0x0f, "Invalid comparison type specifier.")
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// Macro useful for trapping unwanted use of EBP.
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//#define EbpAssert() pxAssert( to != ebp )
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#define EbpAssert()
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void xImpl_CMov::operator()(const xRegister16or32or64& to, const xRegister16or32or64& from) const
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{
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pxAssert(to->GetOperandSize() == from->GetOperandSize());
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ccSane();
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xOpWrite0F(to->GetPrefix16(), 0x40 | ccType, to, from);
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}
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void xImpl_CMov::operator()(const xRegister16or32or64& to, const xIndirectVoid& sibsrc) const
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{
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ccSane();
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xOpWrite0F(to->GetPrefix16(), 0x40 | ccType, to, sibsrc);
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}
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//void xImpl_CMov::operator()( const xDirectOrIndirect32& to, const xDirectOrIndirect32& from ) const { ccSane(); _DoI_helpermess( *this, to, from ); }
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//void xImpl_CMov::operator()( const xDirectOrIndirect16& to, const xDirectOrIndirect16& from ) const { ccSane(); _DoI_helpermess( *this, to, from ); }
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void xImpl_Set::operator()(const xRegister8& to) const
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{
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ccSane();
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xOpWrite0F(0x90 | ccType, 0, to);
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}
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void xImpl_Set::operator()(const xIndirect8& dest) const
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{
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ccSane();
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xOpWrite0F(0x90 | ccType, 0, dest);
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}
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//void xImpl_Set::operator()( const xDirectOrIndirect8& dest ) const { ccSane(); _DoI_helpermess( *this, dest ); }
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void xImpl_MovExtend::operator()(const xRegister16or32or64& to, const xRegister8& from) const
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{
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EbpAssert();
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xOpWrite0F(
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(to->GetOperandSize() == 2) ? 0x66 : 0,
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SignExtend ? 0xbe : 0xb6,
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to, from);
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}
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void xImpl_MovExtend::operator()(const xRegister16or32or64& to, const xIndirect8& sibsrc) const
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{
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EbpAssert();
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xOpWrite0F(
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(to->GetOperandSize() == 2) ? 0x66 : 0,
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SignExtend ? 0xbe : 0xb6,
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to, sibsrc);
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}
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void xImpl_MovExtend::operator()(const xRegister32or64& to, const xRegister16& from) const
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{
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EbpAssert();
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xOpWrite0F(SignExtend ? 0xbf : 0xb7, to, from);
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}
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void xImpl_MovExtend::operator()(const xRegister32or64& to, const xIndirect16& sibsrc) const
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{
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EbpAssert();
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xOpWrite0F(SignExtend ? 0xbf : 0xb7, to, sibsrc);
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}
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void xImpl_MovExtend::operator()(const xRegister64& to, const xRegister32& from) const
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{
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EbpAssert();
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pxAssertMsg(SignExtend, "Use mov for 64-bit movzx");
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xOpWrite(0, 0x63, to, from);
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}
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void xImpl_MovExtend::operator()(const xRegister64& to, const xIndirect32& sibsrc) const
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{
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EbpAssert();
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pxAssertMsg(SignExtend, "Use mov for 64-bit movzx");
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xOpWrite(0, 0x63, to, sibsrc);
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}
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const xImpl_MovExtend xMOVSX = {true};
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const xImpl_MovExtend xMOVZX = {false};
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const xImpl_CMov xCMOVA = {Jcc_Above};
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const xImpl_CMov xCMOVAE = {Jcc_AboveOrEqual};
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const xImpl_CMov xCMOVB = {Jcc_Below};
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const xImpl_CMov xCMOVBE = {Jcc_BelowOrEqual};
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const xImpl_CMov xCMOVG = {Jcc_Greater};
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const xImpl_CMov xCMOVGE = {Jcc_GreaterOrEqual};
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const xImpl_CMov xCMOVL = {Jcc_Less};
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const xImpl_CMov xCMOVLE = {Jcc_LessOrEqual};
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const xImpl_CMov xCMOVZ = {Jcc_Zero};
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const xImpl_CMov xCMOVE = {Jcc_Equal};
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const xImpl_CMov xCMOVNZ = {Jcc_NotZero};
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const xImpl_CMov xCMOVNE = {Jcc_NotEqual};
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const xImpl_CMov xCMOVO = {Jcc_Overflow};
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const xImpl_CMov xCMOVNO = {Jcc_NotOverflow};
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const xImpl_CMov xCMOVC = {Jcc_Carry};
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const xImpl_CMov xCMOVNC = {Jcc_NotCarry};
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const xImpl_CMov xCMOVS = {Jcc_Signed};
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const xImpl_CMov xCMOVNS = {Jcc_Unsigned};
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const xImpl_CMov xCMOVPE = {Jcc_ParityEven};
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const xImpl_CMov xCMOVPO = {Jcc_ParityOdd};
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const xImpl_Set xSETA = {Jcc_Above};
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const xImpl_Set xSETAE = {Jcc_AboveOrEqual};
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const xImpl_Set xSETB = {Jcc_Below};
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const xImpl_Set xSETBE = {Jcc_BelowOrEqual};
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const xImpl_Set xSETG = {Jcc_Greater};
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const xImpl_Set xSETGE = {Jcc_GreaterOrEqual};
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const xImpl_Set xSETL = {Jcc_Less};
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const xImpl_Set xSETLE = {Jcc_LessOrEqual};
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const xImpl_Set xSETZ = {Jcc_Zero};
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const xImpl_Set xSETE = {Jcc_Equal};
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const xImpl_Set xSETNZ = {Jcc_NotZero};
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const xImpl_Set xSETNE = {Jcc_NotEqual};
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const xImpl_Set xSETO = {Jcc_Overflow};
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const xImpl_Set xSETNO = {Jcc_NotOverflow};
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const xImpl_Set xSETC = {Jcc_Carry};
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const xImpl_Set xSETNC = {Jcc_NotCarry};
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const xImpl_Set xSETS = {Jcc_Signed};
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const xImpl_Set xSETNS = {Jcc_Unsigned};
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const xImpl_Set xSETPE = {Jcc_ParityEven};
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const xImpl_Set xSETPO = {Jcc_ParityOdd};
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} // end namespace x86Emitter
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