* Allow to load the plugin without log (better but not mandatory)
* Only reload the log file when it was open in the first place
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3766 96395faa-99c1-11dd-bbfe-3dabce05a288
(note to devs: a sure-fire fix for GCC's templated function problems is to typecast the templated function to itself explicitly -- works nicely for all versions of GCC and the ?: operator as well).
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3763 96395faa-99c1-11dd-bbfe-3dabce05a288
* All remaining code for handling partial/fragmented unpacks removed.
* vifRegs.NUM is now accurately simulated when queuing data from fragmented unpacks.
* Reduced the VIFunpack fragment buffer from 1MB to 4KB (max size of an unpack due to NUM being limited to 8 bits).
* Removed vif/vifRegs globals formally used by VIF interpreters (everything relies on the templated vifIdx now -- simpler and faster!)
* g_vifMask vars are integrated into vifStruct.
* All VIF mask register stuff uses the SSE-friendly vifStruct.MaskRow/Col vars now.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3762 96395faa-99c1-11dd-bbfe-3dabce05a288
* Link zz with libjpeg. Well it seems to get the library from another place, but better be safe for the future.
* Use -pthread as a default option (again to be safer)
* Warn about breaking of strict aliasing rule
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3761 96395faa-99c1-11dd-bbfe-3dabce05a288
* Fixed V2/V3 unpacks to behave same as the SSE unpacks (matches undefined PS2 behaviors)
* Removed legacy vifUnpacker (haven't needed it for any regression testing in forever).
* Move some VIF MARK console spam to DevCon (Ape Escape 3)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3746 96395faa-99c1-11dd-bbfe-3dabce05a288
* Both INTC and DMAC exceptions are now issued together when possible (0x400 | 0x800 to the CAUSE register, respectively)
* CPU exceptions are checked on every event now, instead of using scheduled interrupts on bits 30/31. This removes the need to constantly reschedule events during interrupt-disabled states.
* CPU exception test is moved to the top of the EE event test.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3728 96395faa-99c1-11dd-bbfe-3dabce05a288
* remove personal rule target: has not worked since last change...
* Some fix to control. Update package std version
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3721 96395faa-99c1-11dd-bbfe-3dabce05a288
* Remove need for packed structs through use of unions.
* Streamlined the microBlockManager's linked list (less heap allocs and simpler interations).
* Use two 32 bit compares for fast block compares, instead of 6-7 individual u8 compares.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3717 96395faa-99c1-11dd-bbfe-3dabce05a288
- Code refactoring (mostly changing macros to functions/constants...)
- Made it so the disable-regAlloc option flushes every 32bit instruction, instead of every 64bit instruction (upper+lower instruction pair)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3713 96395faa-99c1-11dd-bbfe-3dabce05a288
int src; if (src < 0xffff8000) {}
so solution is either use (int)0xffff8000 or -0x8000...
it also doesn't seem to print out warnings about this either D:
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3712 96395faa-99c1-11dd-bbfe-3dabce05a288
* Writes via 16 and 8 bit ops now use 32-bit read/modify/write operations by default; which should enable nearly complete support for all such operations (instead of the formerly spotty coverage before).
* Eliminated almost all former 8/16-bit specific register operations. All code shares the same 32 bit handlers now.
* Completely revamped the developer trace logs for hardware registers! *ALL* registers are logged now, complete with address, name, and value being read/written (and nicely formatted!).
* Handlers are now fully page-based using templated functions (minor speedup)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3704 96395faa-99c1-11dd-bbfe-3dabce05a288
arcum42