From fee3d7c15182ad716af0b409edc2840fc217fe37 Mon Sep 17 00:00:00 2001 From: Gregory Hainaut Date: Thu, 29 Oct 2015 22:35:48 +0100 Subject: [PATCH] pcsx2: sed /branch/g_branch/ Be nice with grep. --- pcsx2/x86/iR5900.h | 5 +--- pcsx2/x86/ix86-32/iR5900-32.cpp | 28 +++++++++--------- pcsx2/x86/microVU_Compile.inl | 2 +- pcsx2/x86/sVU_Micro.cpp | 4 +-- pcsx2/x86/sVU_zerorec.cpp | 50 ++++++++++++++++----------------- 5 files changed, 43 insertions(+), 46 deletions(-) diff --git a/pcsx2/x86/iR5900.h b/pcsx2/x86/iR5900.h index 70cb2f802d..e39f8068a2 100644 --- a/pcsx2/x86/iR5900.h +++ b/pcsx2/x86/iR5900.h @@ -22,12 +22,9 @@ #include "VU.h" #include "iCore.h" -extern u32 pc; -extern int branch; - extern u32 maxrecmem; extern u32 pc; // recompiler pc (also used by the SuperVU! .. why? (air)) -extern int branch; // set for branch (also used by the SuperVU! .. why? (air)) +extern int g_branch; // set for branch (also used by the SuperVU! .. why? (air)) extern u32 target; // branch target extern u32 s_nBlockCycles; // cycles of current block recompiling diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp index dac601935e..0c11101997 100644 --- a/pcsx2/x86/ix86-32/iR5900-32.cpp +++ b/pcsx2/x86/ix86-32/iR5900-32.cpp @@ -56,7 +56,7 @@ static __aligned16 uptr hwLUT[_64kb]; u32 s_nBlockCycles = 0; // cycles of current block recompiling u32 pc; // recompiler pc -int branch; // set for branch +int g_branch; // set for branch __aligned16 GPR_reg64 g_cpuConstRegs[32] = {0}; u32 g_cpuHasConstReg = 0, g_cpuFlushedConstReg = 0; @@ -347,7 +347,7 @@ void recBranchCall( void (*func)() ) MOV32RtoM( (uptr)&g_nextEventCycle, EAX ); recCall(func); - branch = 2; + g_branch = 2; } void recCall( void (*func)() ) @@ -747,7 +747,7 @@ static void recResetRaw() recConstBufPtr = recConstBuf; x86FpuState = FPU_STATE; - branch = 0; + g_branch = 0; } static void recShutdown() @@ -869,7 +869,7 @@ void R5900::Dynarec::OpcodeImpl::recSYSCALL() ADD32ItoM((uptr)&cpuRegs.cycle, eeScaleBlockCycles()); xJMP( DispatcherReg ); x86SetJ8(j8Ptr[0]); - //branch = 2; + //g_branch = 2; } //////////////////////////////////////////////////// @@ -882,7 +882,7 @@ void R5900::Dynarec::OpcodeImpl::recBREAK() ADD32ItoM((uptr)&cpuRegs.cycle, eeScaleBlockCycles()); xJMP( DispatcherEvent ); x86SetJ8(j8Ptr[0]); - //branch = 2; + //g_branch = 2; } void recClear(u32 addr, u32 size) @@ -966,7 +966,7 @@ static int *s_pCode; void SetBranchReg( u32 reg ) { - branch = 1; + g_branch = 1; if( reg != 0xffffffff ) { // if( GPR_IS_CONST1(reg) ) @@ -1020,7 +1020,7 @@ void SetBranchReg( u32 reg ) void SetBranchImm( u32 imm ) { - branch = 1; + g_branch = 1; pxAssert( imm ); @@ -1197,7 +1197,7 @@ static u32 eeScaleBlockCycles() // // noDispatch - When set true, then jump to Dispatcher. Used by the recs // for blocks which perform exception checks without branching (it's enabled by -// setting "branch = 2"; +// setting "g_branch = 2"; static void iBranchTest(u32 newpc) { _DynGen_StackFrameCheck(); @@ -1685,7 +1685,7 @@ bool skipMPEG_By_Pattern(u32 sPC) { xMOV(eax, ptr32[&cpuRegs.GPR.n.ra.UL[0]]); xMOV(ptr32[&cpuRegs.pc], eax); iBranchTest(); - branch = 1; + g_branch = 1; pc = s_nEndBlock; Console.WriteLn(Color_StrongGreen, "sceMpegIsEnd pattern found! Recompiling skip video fix..."); return 1; @@ -1744,7 +1744,7 @@ static void __fastcall recRecompile( const u32 startpc ) if (HWADDR(startpc) == ElfEntry) xCALL(eeGameStarting); - branch = 0; + g_branch = 0; // reset recomp state variables s_nBlockCycles = 0; @@ -2145,7 +2145,7 @@ StartRecomp: if (doRecompilation) { // Finally: Generate x86 recompiled code! g_pCurInstInfo = s_pInstCache; - while (!branch && pc < s_nEndBlock) { + while (!g_branch && pc < s_nEndBlock) { recompileNextInstruction(0); // For the love of recursion, batman! } } @@ -2193,7 +2193,7 @@ StartRecomp: if( !(pc&0x10000000) ) maxrecmem = std::max( (pc&~0xa0000000), maxrecmem ); - if( branch == 2 ) + if( g_branch == 2 ) { // Branch type 2 - This is how I "think" this works (air): // Performs a branch/event test but does not actually "break" the block. @@ -2206,10 +2206,10 @@ StartRecomp: } else { - if( branch ) + if( g_branch ) pxAssert( !willbranch3 ); - if( willbranch3 || !branch) { + if( willbranch3 || !g_branch) { iFlushCall(FLUSH_EVERYTHING); diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index f73494861c..cb8318ab69 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -468,7 +468,7 @@ void* mVUcompileSingleInstruction(microVU& mVU, u32 startPC, uptr pState, microF mVUincCycles(mVU, 1); mVUopU(mVU, 0); mVUcheckBadOp(mVU); - if (curI & _Ebit_) { eBitPass1(mVU, branch); DevCon.Warning("E Bit on single instruction");} + if (curI & _Ebit_) { eBitPass1(mVU, g_branch); DevCon.Warning("E Bit on single instruction");} if (curI & _Dbit_) { mVUup.dBit = true; } if (curI & _Tbit_) { mVUup.tBit = true; } if (curI & _Mbit_) { mVUup.mBit = true; DevCon.Warning("M Bit on single instruction");} diff --git a/pcsx2/x86/sVU_Micro.cpp b/pcsx2/x86/sVU_Micro.cpp index c4bfc83354..f0ecbb037b 100644 --- a/pcsx2/x86/sVU_Micro.cpp +++ b/pcsx2/x86/sVU_Micro.cpp @@ -477,7 +477,7 @@ void SuperVUAnalyzeOp(VURegs *VU, _vuopinfo *info, _VURegsNum* pCodeRegs) pc += 8; if (ptr[1] & 0x40000000) { // EOP - branch |= 8; + g_branch |= 8; } VU->code = ptr[1]; @@ -557,7 +557,7 @@ void SuperVUAnalyzeOp(VURegs *VU, _vuopinfo *info, _VURegsNum* pCodeRegs) info->cycle = vucycle; if (lregs->pipe == VUPIPE_BRANCH) { - branch |= 1; + g_branch |= 1; } if (lregs->VIwrite & (1 << REG_Q)) { diff --git a/pcsx2/x86/sVU_zerorec.cpp b/pcsx2/x86/sVU_zerorec.cpp index 10acce37f2..9134d974c8 100644 --- a/pcsx2/x86/sVU_zerorec.cpp +++ b/pcsx2/x86/sVU_zerorec.cpp @@ -881,7 +881,7 @@ static VuFunctionHeader* SuperVURecompileProgram(u32 startpc, int vuindex) // code generation xSetPtr(s_recVUPtr[vuindex]); - branch = 0; + g_branch = 0; SuperVURecompile(); @@ -1121,7 +1121,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V s_listBlocks.push_back(pblock); int i = 0; - branch = 0; + g_branch = 0; pc = startpc; pblock->startpc = startpc; @@ -1153,10 +1153,10 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V { u32* ptr = (u32*) & VU->Micro[pc]; pc += 8; - int prevbranch = branch; + int prevbranch = g_branch; if (ptr[1] & 0x40000000) - branch = 1; + g_branch = 1; if (!(ptr[1] & 0x80000000)) // not I { @@ -1172,7 +1172,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V case 0x2e: // IBLEZ case 0x2c: // IBLTZ case 0x29: // IBNE - branch = 1; + g_branch = 1; break; case 0x14: // fseq @@ -1203,7 +1203,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V // second full pass pc = startpc; - branch = 0; + g_branch = 0; VuInstruction* pprevinst = NULL, *pinst = NULL; while (1) @@ -1211,17 +1211,17 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V if (pc == s_MemSize[s_vu]) { - branch |= 8; + g_branch |= 8; break; } - if (!branch && pbh->pblock != NULL) + if (!g_branch && pbh->pblock != NULL) { pblock->blocks.push_back(pbh->pblock); break; } - int prevbranch = branch; + int prevbranch = g_branch; if (!prevbranch) { @@ -1378,7 +1378,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V pblock->cycles = vucycle; #ifdef SUPERVU_WRITEBACKS - if (!branch || (branch&8)) + if (!g_branch || (g_branch&8)) #endif { // flush writebacks @@ -1401,9 +1401,9 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V } } - if (!branch) return pblock; + if (!g_branch) return pblock; - if (branch & 8) + if (g_branch & 8) { // what if also a jump? pblock->type |= BLOCKTYPE_EOP | BLOCKTYPE_HASEOP; @@ -2897,7 +2897,7 @@ void VuBaseBlock::Recompile() s_pCurBlock = this; s_needFlush = 3; pc = startpc; - branch = 0; + g_branch = 0; s_recWriteQ = s_recWriteP = 0; s_XGKICKReg = -1; s_ScheduleXGKICK = 0; @@ -2993,7 +2993,7 @@ void VuBaseBlock::Recompile() AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag //AND32ItoM((uptr)&VU->GetVifRegs().stat, ~VIF1_STAT_VEW); - if (!branch) MOV32ItoM((uptr)&VU->VI[REG_TPC], endpc); + if (!g_branch) MOV32ItoM((uptr)&VU->VI[REG_TPC], endpc); JMP32((uptr)SuperVUEndProgram - ((uptr)x86Ptr + 5)); } @@ -3034,7 +3034,7 @@ void VuBaseBlock::Recompile() // get rid of any writes, otherwise _freeX86regs will write x86regs[s_JumpX86].mode &= ~MODE_WRITE; - if (branch == 1) + if (g_branch == 1) { if (!x86regs[s_JumpX86].inuse) { @@ -3106,7 +3106,7 @@ void VuBaseBlock::Recompile() // store the last block executed MOV32ItoM((uptr)&g_nLastBlockExecuted, s_pCurBlock->startpc); - switch (branch) + switch (g_branch) { case 1: // branch, esi has new prog @@ -3151,7 +3151,7 @@ void VuBaseBlock::Recompile() break; default: - DevCon.Error("Bad branch %x\n", branch); + DevCon.Error("Bad branch %x\n", g_branch); pxAssert(0); break; } @@ -3925,14 +3925,14 @@ void recVUMI_BranchHandle() if (s_pCurInst->type & INST_BRANCH_DELAY) { - pxAssert((branch&0x17) != 0x10 && (branch&0x17) != 4); // no jump handlig for now + pxAssert((g_branch&0x17) != 0x10 && (g_branch&0x17) != 4); // no jump handlig for now - if ((branch & 0x7) == 3) + if ((g_branch & 0x7) == 3) { // previous was a direct jump curjump = 1; } - else if (branch & 1) curjump = 2; + else if (g_branch & 1) curjump = 2; } pxAssert(s_JumpX86 > 0); @@ -3957,7 +3957,7 @@ void recVUMI_BranchHandle() else x86SetJ8(j8Ptr[ 0 ]); - branch |= 1; + g_branch |= 1; } // supervu specific insts @@ -4220,7 +4220,7 @@ void recVUMI_B(VURegs* vuu, s32 info) s_UnconditionalDelay = 1; } - branch |= 3; + g_branch |= 3; } void recVUMI_BAL(VURegs* vuu, s32 info) @@ -4249,7 +4249,7 @@ void recVUMI_BAL(VURegs* vuu, s32 info) s_UnconditionalDelay = 1; } - branch |= 3; + g_branch |= 3; } void recVUMI_JR(VURegs* vuu, s32 info) @@ -4270,7 +4270,7 @@ void recVUMI_JR(VURegs* vuu, s32 info) PUSH32I(s_vu); PUSH32R(EAX); } - branch |= 0x10; // 0x08 is reserved + g_branch |= 0x10; // 0x08 is reserved } void recVUMI_JALR(VURegs* vuu, s32 info) @@ -4300,7 +4300,7 @@ void recVUMI_JALR(VURegs* vuu, s32 info) PUSH32R(EAX); } - branch |= 4; + g_branch |= 4; } void recVUMI_XGKICK_(VURegs *VU)