mirror of https://github.com/PCSX2/pcsx2.git
zzogl-pg: Get rid of some old 64 bit code.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2799 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -19,17 +19,7 @@
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#ifndef __GSREGS_H__
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#define __GSREGS_H__
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#ifdef _MSC_VER
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typedef void (__fastcall *GIFRegHandler)(u32* data);
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#else
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#ifdef __x86_64__
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typedef void (*GIFRegHandler)(u32* data);
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#else
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typedef void (__fastcall *GIFRegHandler)(u32* data);
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#endif
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#endif
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void __fastcall GIFPackedRegHandlerNull(u32* data);
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void __fastcall GIFPackedRegHandlerRGBA(u32* data);
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@ -1673,10 +1673,6 @@ inline list<CMemoryTarget>::iterator ZeroGS::CMemoryTargetMngr::DestroyTargetIte
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return it;
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}
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#if defined(_MSC_VER) && defined(__x86_64__)
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extern "C" void UnswizzleZ16Target(void* dst, void* src, int iters);
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#endif
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int MemoryTarget_CompareTarget (list<CMemoryTarget>::iterator& it, const tex0Info& tex0, int clutsize, int nClutOffset) {
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if( PSMT_ISCLUT(it->psm) != PSMT_ISCLUT(tex0.psm) ) {
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return 1;
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@ -23,7 +23,7 @@
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#include "Mem.h"
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#include "x86.h"
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#if defined(ZEROGS_SSE2) && (defined(_WIN32)||defined(__x86_64__))
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#if defined(ZEROGS_SSE2) && defined(_WIN32)
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#include <xmmintrin.h>
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#include <emmintrin.h>
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#endif
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@ -261,7 +261,7 @@ _FrameSwizzleBlock(A4_, (src[2*j]+src[2*j+1]+src[2*j+srcpitch]+src[2*j+srcpitch+
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// }
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//}
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#if (defined(_WIN32)||defined(__x86_64__))
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#if defined(_WIN32)
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extern "C" void __fastcall WriteCLUT_T32_I8_CSM1_sse2(u32* vm, u32* clut)
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{
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@ -320,8 +320,6 @@ PCSX2_ALIGNED16(int s_clut16mask[8]) = { 0xffff0000, 0xffff0000, 0xffff0000, 0xf
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0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff};
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}
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#if !defined(__x86_64__)
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extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32* clut)
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{
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__asm {
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@ -436,7 +434,6 @@ WriteUnaligned:
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End:
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}
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}
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#endif // __x86_64__
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#endif // _MSC_VER
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#endif // ZEROGS_SSE2
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@ -542,9 +539,6 @@ void __fastcall WriteCLUT_T32_I4_CSM1_c(u32* vm, u32* clut)
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void SSE2_UnswizzleZ16Target( u16* dst, u16* src, int iters ) {
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#if defined(_MSC_VER)
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# if defined(__x86_64__)
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UnswizzleZ16Target(dst, src, iters);
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# else
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__asm {
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mov edx, iters
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pxor xmm7, xmm7
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@ -593,7 +587,6 @@ Z16Loop:
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sub edx, 1
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jne Z16Loop
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}
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# endif // __x86_64__
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#else // _MSC_VER
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__asm__(".intel_syntax\n"
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