ShuriZma
/
pcsx2
mirror of https://github.com/PCSX2/pcsx2.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

pcsx2: tlb fix 

* pc is incremented before execution of the instruction => must be
    decremented before exception

* PS2 support 48 tlb => mask need 6 bits
This commit is contained in:
Gregory Hainaut 2014-06-20 13:15:27 +02:00
parent 9a82bed3a5
commit fe30f2e48e
2 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
pcsx2/COP0.cpp
View File

@ -334,10 +334,10 @@ namespace COP0 {
void TLBR() {
DevCon.Warning("COP0_TLBR %d:%x,%x,%x,%x\n",
cpuRegs.CP0.n.Random, cpuRegs.CP0.n.PageMask, cpuRegs.CP0.n.EntryHi,
cpuRegs.CP0.n.Index, cpuRegs.CP0.n.PageMask, cpuRegs.CP0.n.EntryHi,
cpuRegs.CP0.n.EntryLo0, cpuRegs.CP0.n.EntryLo1);
int i = cpuRegs.CP0.n.Index&0x1f;
int i = cpuRegs.CP0.n.Index & 0x3f;
cpuRegs.CP0.n.PageMask = tlb[i].PageMask;
cpuRegs.CP0.n.EntryHi = tlb[i].EntryHi&~(tlb[i].PageMask|0x1f00);

1
pcsx2/R5900.cpp
View File

@ -197,6 +197,7 @@ void cpuTlbMiss(u32 addr, u32 bd, u32 excode)
cpuRegs.CP0.n.EntryHi = (addr & 0xFFFFE000) | (cpuRegs.CP0.n.EntryHi & 0x1FFF);
// Don't reinvent the wheel ;)
cpuRegs.pc -= 4;
cpuException(excode, bd);
#if 0
cpuRegs.CP0.n.Cause = excode;