mirror of https://github.com/PCSX2/pcsx2.git
mVU Macro: Some changes for a more correct interlocking behavior again VU0 micro programs.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1708 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -66,35 +66,31 @@ void COP2_Unknown()
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}
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//****************************************************************************
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void _vu0WaitMicro() {
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int startcycle;
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__forceinline void _vu0run(bool breakOnMbit) {
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if ((VU0.VI[REG_VPU_STAT].UL & 0x1) == 0) {
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return;
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}
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if (!(VU0.VI[REG_VPU_STAT].UL & 1)) return;
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startcycle = VU0.cycle;
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int startcycle = VU0.cycle;
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VU0.flags &= ~VUFLAG_MFLAGSET;
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VU0.flags|= VUFLAG_BREAKONMFLAG;
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VU0.flags&= ~VUFLAG_MFLAGSET;
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if (!CHECK_MICROVU0) {
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do {
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CpuVU0.ExecuteBlock();
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// knockout kings 2002 loops here
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if( VU0.cycle-startcycle > 0x1000 ) {
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Console::Notice("VU0 perma-stall, breaking execution..."); // (email zero if gfx are bad)
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break;
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}
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} while ((VU0.VI[REG_VPU_STAT].UL & 0x1) && (VU0.flags & VUFLAG_MFLAGSET) == 0);
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}
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else CpuVU0.ExecuteBlock(); // Note: Need to test Knockout Kings 2002 with mVU!
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do {
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// knockout kings 2002 loops here with sVU
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if (breakOnMbit && (VU0.cycle-startcycle > 0x1000)) {
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Console::Notice("VU0 perma-stall, breaking execution...");
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break; // mVU will never get here (it handles mBit internally)
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}
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CpuVU0.ExecuteBlock();
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} while ((VU0.VI[REG_VPU_STAT].UL & 1) // E-bit Termination
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&& (!breakOnMbit || !(VU0.flags & VUFLAG_MFLAGSET))); // M-bit Break
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//NEW
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cpuRegs.cycle += (VU0.cycle-startcycle)*2;
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VU0.flags&= ~VUFLAG_BREAKONMFLAG;
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}
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void _vu0WaitMicro() { _vu0run(1); } // Runs VU0 Micro Until E-bit or M-Bit End
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void _vu0FinishMicro() { _vu0run(0); } // Runs VU0 Micro Until E-Bit End
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namespace R5900 {
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namespace Interpreter{
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namespace OpcodeImpl
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@ -23,6 +23,7 @@
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#include "R5900OpcodeTables.h"
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extern void _vu0WaitMicro();
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extern void _vu0FinishMicro();
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//------------------------------------------------------------------
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// Macro VU - Helper Macros / Functions
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@ -237,10 +238,11 @@ void recBC2TL() { _setupBranchTest(JZ32, true); }
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// Macro VU - COP2 Transfer Instructions
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//------------------------------------------------------------------
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void COP2_Interlock(bool cond) {
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if (cond) {
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void COP2_Interlock(bool mBitSync) {
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if (cpuRegs.code & 1) {
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iFlushCall(FLUSH_NOCONST);
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CALLFunc((uptr)_vu0WaitMicro);
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if (mBitSync) CALLFunc((uptr)_vu0WaitMicro);
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else CALLFunc((uptr)_vu0FinishMicro);
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}
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}
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@ -255,7 +257,7 @@ void TEST_FBRST_RESET(uptr resetFunct, int vuIndex) {
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static void recCFC2() {
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printCOP2("CFC2");
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COP2_Interlock(cpuRegs.code & 1);
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COP2_Interlock(0);
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if (!_Rt_) return;
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iFlushCall(FLUSH_EVERYTHING);
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@ -275,7 +277,7 @@ static void recCFC2() {
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static void recCTC2() {
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printCOP2("CTC2");
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COP2_Interlock(cpuRegs.code & 1);
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COP2_Interlock(1);
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if (!_Rd_) return;
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iFlushCall(FLUSH_EVERYTHING);
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@ -318,7 +320,7 @@ static void recCTC2() {
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static void recQMFC2() {
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printCOP2("QMFC2");
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COP2_Interlock(cpuRegs.code & 1);
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COP2_Interlock(0);
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if (!_Rt_) return;
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iFlushCall(FLUSH_EVERYTHING);
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@ -332,7 +334,7 @@ static void recQMFC2() {
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static void recQMTC2() {
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printCOP2("QMTC2");
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COP2_Interlock(cpuRegs.code & 1);
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COP2_Interlock(1);
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if (!_Rd_) return;
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iFlushCall(FLUSH_EVERYTHING);
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