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Not my day. Reverted the last change and reimplemented it in a cleaner way. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2581 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
gigaherz 2010-02-10 14:34:52 +00:00
parent ae3934cffb
commit fcf5b97e46
1 changed files with 12 additions and 47 deletions
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59
pcsx2/IopDma.cpp
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@ -277,59 +277,24 @@ struct DmaHandlerInfo
//////////////////////////////////////////////////////////////////////////////////////////////
// Plugin interface accessors
s32 CALLBACK spu2DmaRead (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed)
{
#ifdef ENABLE_NEW_IOPDMA_SPU2
return SPU2dmaRead(channel,data,bytesLeft,bytesProcessed);
s32 CALLBACK spu2DmaRead (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { return SPU2dmaRead(channel,data,bytesLeft,bytesProcessed); }
s32 CALLBACK spu2DmaWrite (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { return SPU2dmaWrite(channel,data,bytesLeft,bytesProcessed); }
void CALLBACK spu2DmaInterrupt (s32 channel) { SPU2dmaInterrupt(channel); }
#else
*bytesProcessed = bytesLeft;
return 0;
s32 CALLBACK spu2DmaRead (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { *bytesProcessed=0; return 0; }
s32 CALLBACK spu2DmaWrite (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { *bytesProcessed=0; return 0; }
void CALLBACK spu2DmaInterrupt (s32 channel) { }
#endif
}
s32 CALLBACK spu2DmaWrite (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed)
{
#ifdef ENABLE_NEW_IOPDMA_SPU2
return SPU2dmaWrite(channel,data,bytesLeft,bytesProcessed);
#else
*bytesProcessed = bytesLeft;
return 0;
#endif
}
void CALLBACK spu2DmaInterrupt (s32 channel)
{
#ifdef ENABLE_NEW_IOPDMA_SPU2
SPU2dmaInterrupt(channel);
#endif
}
s32 CALLBACK dev9DmaRead (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed)
{
#ifdef ENABLE_NEW_IOPDMA_DEV9
return DEV9dmaRead(channel,data,bytesLeft,bytesProcessed);
s32 CALLBACK dev9DmaRead (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { return DEV9dmaRead(channel,data,bytesLeft,bytesProcessed); }
s32 CALLBACK dev9DmaWrite (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { return DEV9dmaWrite(channel,data,bytesLeft,bytesProcessed); }
void CALLBACK dev9DmaInterrupt (s32 channel) { DEV9dmaInterrupt(channel); }
#else
*bytesProcessed = bytesLeft;
return 0;
s32 CALLBACK dev9DmaRead (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { *bytesProcessed=0; return 0; }
s32 CALLBACK dev9DmaWrite (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed) { *bytesProcessed=0; return 0; }
void CALLBACK dev9DmaInterrupt (s32 channel) { }
#endif
}
s32 CALLBACK dev9DmaWrite (s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed)
{
#ifdef ENABLE_NEW_IOPDMA_DEV9
return DEV9dmaWrite(channel,data,bytesLeft,bytesProcessed);
#else
*bytesProcessed = bytesLeft;
return 0;
#endif
}
void CALLBACK dev9DmaInterrupt (s32 channel)
{
#ifdef ENABLE_NEW_IOPDMA_DEV9
DEV9dmaInterrupt(channel);
#endif
}
//////////////////////////////////////////////////////////////////////////////////////////////
// Dma channel definitions