From fcdbae68061ef1b3737636b92b39da51dc86d83c Mon Sep 17 00:00:00 2001 From: Gregory Hainaut Date: Thu, 26 Nov 2015 18:44:40 +0100 Subject: [PATCH] core: massively sed old emitter syntax to the new one It misses jump & FPU. Jump need to be handled manually. Syntax isn't perfect yet because of various casts. But it will allow to have a single emitter syntax and rely on type safety on the future. Conflicts: pcsx2/x86/iR3000Atables.cpp pcsx2/x86/ix86-32/iR5900-32.cpp --- pcsx2/x86/iCOP0.cpp | 86 +- pcsx2/x86/iCore.cpp | 148 +-- pcsx2/x86/iFPU.cpp | 662 +++++------ pcsx2/x86/iFPUd.cpp | 320 ++--- pcsx2/x86/iMMI.cpp | 1584 ++++++++++++------------- pcsx2/x86/iPsxMem.cpp | 136 +-- pcsx2/x86/iR3000A.cpp | 62 +- pcsx2/x86/iR3000Atables.cpp | 454 +++---- pcsx2/x86/iR5900Misc.cpp | 56 +- pcsx2/x86/ix86-32/iCore-32.cpp | 168 +-- pcsx2/x86/ix86-32/iR5900-32.cpp | 72 +- pcsx2/x86/ix86-32/iR5900AritImm.cpp | 74 +- pcsx2/x86/ix86-32/iR5900Branch.cpp | 98 +- pcsx2/x86/ix86-32/iR5900Jump.cpp | 24 +- pcsx2/x86/ix86-32/iR5900LoadStore.cpp | 8 +- pcsx2/x86/ix86-32/iR5900Move.cpp | 188 +-- pcsx2/x86/ix86-32/iR5900MultDiv.cpp | 388 +++--- pcsx2/x86/ix86-32/iR5900Shift.cpp | 210 ++-- pcsx2/x86/ix86-32/iR5900Templates.cpp | 8 +- pcsx2/x86/ix86-32/recVTLB.cpp | 2 +- pcsx2/x86/sVU_Debug.h | 22 +- pcsx2/x86/sVU_Lower.cpp | 768 ++++++------ pcsx2/x86/sVU_Micro.cpp | 992 ++++++++-------- pcsx2/x86/sVU_Upper.cpp | 1362 ++++++++++----------- pcsx2/x86/sVU_zerorec.cpp | 318 ++--- 25 files changed, 4105 insertions(+), 4105 deletions(-) diff --git a/pcsx2/x86/iCOP0.cpp b/pcsx2/x86/iCOP0.cpp index 3132446018..853f1df45e 100644 --- a/pcsx2/x86/iCOP0.cpp +++ b/pcsx2/x86/iCOP0.cpp @@ -54,12 +54,12 @@ static void _setupBranchTest() // But using 32-bit loads here is ok (and faster), because we mask off // everything except the lower 10 bits away. - MOV32MtoR( EAX, (uptr)&psHu32(DMAC_PCR) ); - MOV32ItoR( ECX, 0x3ff ); // ECX is our 10-bit mask var - NOT32R( EAX ); - OR32MtoR( EAX, (uptr)&psHu32(DMAC_STAT) ); - AND32RtoR( EAX, ECX ); - CMP32RtoR( EAX, ECX ); + xMOV(eax, ptr[(&psHu32(DMAC_PCR) )]); + xMOV(ecx, 0x3ff ); // ECX is our 10-bit mask var + xNOT(eax); + xOR(eax, ptr[(&psHu32(DMAC_STAT) )]); + xAND(eax, ecx); + xCMP(eax, ecx); } void recBC0F() @@ -109,10 +109,10 @@ void recDI() //iFlushCall(0); - //MOV32MtoR( EAX, (uptr)&cpuRegs.cycle ); - //MOV32RtoM( (uptr)&g_nextBranchCycle, EAX ); + //xMOV(eax, ptr[&cpuRegs.cycle ]); + //xMOV(ptr[&g_nextBranchCycle], eax); - //CALLFunc( (uptr)Interp::DI ); + //xCALL((void*)(uptr)Interp::DI ); xMOV(eax, ptr[&cpuRegs.CP0.n.Status]); xTEST(eax, 0x20006); // EXL | ERL | EDI @@ -138,23 +138,23 @@ void recMFC0() if( _Rd_ == 9 ) { // This case needs to be handled even if the write-back is ignored (_Rt_ == 0 ) - MOV32MtoR(ECX, (uptr)&cpuRegs.cycle); - MOV32RtoR(EAX, ECX); - SUB32MtoR(EAX, (uptr)&s_iLastCOP0Cycle); + xMOV(ecx, ptr[&cpuRegs.cycle]); + xMOV(eax, ecx); + xSUB(eax, ptr[&s_iLastCOP0Cycle]); u8* skipInc = JNZ8( 0 ); - INC32R(EAX); + xINC(eax); x86SetJ8( skipInc ); - ADD32RtoM((uptr)&cpuRegs.CP0.n.Count, EAX); - MOV32RtoM((uptr)&s_iLastCOP0Cycle, ECX); - MOV32MtoR( EAX, (uptr)&cpuRegs.CP0.r[ _Rd_ ] ); + xADD(ptr[&cpuRegs.CP0.n.Count], eax); + xMOV(ptr[&s_iLastCOP0Cycle], ecx); + xMOV(eax, ptr[&cpuRegs.CP0.r[ _Rd_ ] ]); if( !_Rt_ ) return; _deleteEEreg(_Rt_, 0); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[0],EAX); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[0]], eax); - CDQ(); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[1], EDX); + xCDQ(); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[1]], edx); return; } @@ -165,7 +165,7 @@ void recMFC0() switch(_Imm_ & 0x3F) { case 0: - MOV32MtoR(EAX, (uptr)&cpuRegs.PERF.n.pccr); + xMOV(eax, ptr[&cpuRegs.PERF.n.pccr]); break; case 1: @@ -180,10 +180,10 @@ void recMFC0() break; } _deleteEEreg(_Rt_, 0); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[0],EAX); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[0]], eax); - CDQ(); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[1], EDX); + xCDQ(); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[1]], edx); return; } @@ -193,10 +193,10 @@ void recMFC0() } _eeOnWriteReg(_Rt_, 1); _deleteEEreg(_Rt_, 0); - MOV32MtoR(EAX, (uptr)&cpuRegs.CP0.r[ _Rd_ ]); - CDQ(); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[0], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[1], EDX); + xMOV(eax, ptr[&cpuRegs.CP0.r[ _Rd_ ]]); + xCDQ(); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[0]], eax); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[1]], edx); } void recMTC0() @@ -212,9 +212,9 @@ void recMTC0() break; case 9: - MOV32MtoR(ECX, (uptr)&cpuRegs.cycle); - MOV32RtoM((uptr)&s_iLastCOP0Cycle, ECX); - MOV32ItoM((uptr)&cpuRegs.CP0.r[9], g_cpuConstRegs[_Rt_].UL[0]); + xMOV(ecx, ptr[&cpuRegs.cycle]); + xMOV(ptr[&s_iLastCOP0Cycle], ecx); + xMOV(ptr32[&cpuRegs.CP0.r[9]], g_cpuConstRegs[_Rt_].UL[0]); break; case 25: @@ -228,15 +228,15 @@ void recMTC0() break; case 1: - MOV32MtoR(EAX, (uptr)&cpuRegs.cycle); - MOV32ItoM((uptr)&cpuRegs.PERF.n.pcr0, g_cpuConstRegs[_Rt_].UL[0]); - MOV32RtoM((uptr)&s_iLastPERFCycle[0], EAX); + xMOV(eax, ptr[&cpuRegs.cycle]); + xMOV(ptr32[&cpuRegs.PERF.n.pcr0], g_cpuConstRegs[_Rt_].UL[0]); + xMOV(ptr[&s_iLastPERFCycle[0]], eax); break; case 3: - MOV32MtoR(EAX, (uptr)&cpuRegs.cycle); - MOV32ItoM((uptr)&cpuRegs.PERF.n.pcr1, g_cpuConstRegs[_Rt_].UL[0]); - MOV32RtoM((uptr)&s_iLastPERFCycle[1], EAX); + xMOV(eax, ptr[&cpuRegs.cycle]); + xMOV(ptr32[&cpuRegs.PERF.n.pcr1], g_cpuConstRegs[_Rt_].UL[0]); + xMOV(ptr[&s_iLastPERFCycle[1]], eax); break; } break; @@ -246,7 +246,7 @@ void recMTC0() break; default: - MOV32ItoM((uptr)&cpuRegs.CP0.r[_Rd_], g_cpuConstRegs[_Rt_].UL[0]); + xMOV(ptr32[&cpuRegs.CP0.r[_Rd_]], g_cpuConstRegs[_Rt_].UL[0]); break; } } @@ -261,9 +261,9 @@ void recMTC0() break; case 9: - MOV32MtoR(ECX, (uptr)&cpuRegs.cycle); + xMOV(ecx, ptr[&cpuRegs.cycle]); _eeMoveGPRtoM((uptr)&cpuRegs.CP0.r[9], _Rt_); - MOV32RtoM((uptr)&s_iLastCOP0Cycle, ECX); + xMOV(ptr[&s_iLastCOP0Cycle], ecx); break; case 25: @@ -277,15 +277,15 @@ void recMTC0() break; case 1: - MOV32MtoR(ECX, (uptr)&cpuRegs.cycle); + xMOV(ecx, ptr[&cpuRegs.cycle]); _eeMoveGPRtoM((uptr)&cpuRegs.PERF.n.pcr0, _Rt_); - MOV32RtoM((uptr)&s_iLastPERFCycle[0], ECX); + xMOV(ptr[&s_iLastPERFCycle[0]], ecx); break; case 3: - MOV32MtoR(ECX, (uptr)&cpuRegs.cycle); + xMOV(ecx, ptr[&cpuRegs.cycle]); _eeMoveGPRtoM((uptr)&cpuRegs.PERF.n.pcr1, _Rt_); - MOV32RtoM((uptr)&s_iLastPERFCycle[1], ECX); + xMOV(ptr[&s_iLastPERFCycle[1]], ecx); break; } break; diff --git a/pcsx2/x86/iCore.cpp b/pcsx2/x86/iCore.cpp index f5b2b23652..99336a2b59 100644 --- a/pcsx2/x86/iCore.cpp +++ b/pcsx2/x86/iCore.cpp @@ -178,7 +178,7 @@ int _allocVFtoXMMreg(VURegs *VU, int xmmreg, int vfreg, int mode) { xmmregs[i].needed = 1; if( !(xmmregs[i].mode & MODE_READ) && (mode&MODE_READ) ) { - SSE_MOVAPS_M128_to_XMM(i, VU_VFx_ADDR(vfreg)); + xMOVAPS(xRegisterSSE(i), ptr[(void*)(VU_VFx_ADDR(vfreg))]); xmmregs[i].mode |= MODE_READ; } @@ -202,8 +202,8 @@ int _allocVFtoXMMreg(VURegs *VU, int xmmreg, int vfreg, int mode) { xmmregs[xmmreg].VU = XMM_CONV_VU(VU); xmmregs[xmmreg].counter = g_xmmAllocCounter++; if (mode & MODE_READ) { - if( readfromreg >= 0 ) SSE_MOVAPS_XMM_to_XMM(xmmreg, readfromreg); - else SSE_MOVAPS_M128_to_XMM(xmmreg, VU_VFx_ADDR(xmmregs[xmmreg].reg)); + if( readfromreg >= 0 ) xMOVAPS(xRegisterSSE(xmmreg), xRegisterSSE(readfromreg)); + else xMOVAPS(xRegisterSSE(xmmreg), ptr[(void*)(VU_VFx_ADDR(xmmregs[xmmreg].reg))]); } return xmmreg; @@ -259,7 +259,7 @@ int _allocACCtoXMMreg(VURegs *VU, int xmmreg, int mode) { } if( !(xmmregs[i].mode & MODE_READ) && (mode&MODE_READ)) { - SSE_MOVAPS_M128_to_XMM(i, VU_ACCx_ADDR); + xMOVAPS(xRegisterSSE(i), ptr[(void*)(VU_ACCx_ADDR)]); xmmregs[i].mode |= MODE_READ; } @@ -287,9 +287,9 @@ int _allocACCtoXMMreg(VURegs *VU, int xmmreg, int mode) { if (mode & MODE_READ) { if( readfromreg >= 0 ) - SSE_MOVAPS_XMM_to_XMM(xmmreg, readfromreg); + xMOVAPS(xRegisterSSE(xmmreg), xRegisterSSE(readfromreg)); else - SSE_MOVAPS_M128_to_XMM(xmmreg, VU_ACCx_ADDR); + xMOVAPS(xRegisterSSE(xmmreg), ptr[(void*)(VU_ACCx_ADDR)]); } return xmmreg; @@ -304,7 +304,7 @@ int _allocFPtoXMMreg(int xmmreg, int fpreg, int mode) { if (xmmregs[i].reg != fpreg) continue; if( !(xmmregs[i].mode & MODE_READ) && (mode & MODE_READ)) { - SSE_MOVSS_M32_to_XMM(i, (uptr)&fpuRegs.fpr[fpreg].f); + xMOVSSZX(xRegisterSSE(i), ptr[&fpuRegs.fpr[fpreg].f]); xmmregs[i].mode |= MODE_READ; } @@ -327,7 +327,7 @@ int _allocFPtoXMMreg(int xmmreg, int fpreg, int mode) { xmmregs[xmmreg].counter = g_xmmAllocCounter++; if (mode & MODE_READ) - SSE_MOVSS_M32_to_XMM(xmmreg, (uptr)&fpuRegs.fpr[fpreg].f); + xMOVSSZX(xRegisterSSE(xmmreg), ptr[&fpuRegs.fpr[fpreg].f]); return xmmreg; } @@ -350,13 +350,13 @@ int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode) { if (gprreg == 0 ) { - SSEX_PXOR_XMM_to_XMM(i, i); + xPXOR(xRegisterSSE(i), xRegisterSSE(i)); } else { //pxAssert( !(g_cpuHasConstReg & (1<= 0 ) { - SSEX_MOVD_XMM_to_M32((uptr)&fpuRegs.fprc[ _Fs_ ], mmreg); + xMOVSS(ptr[&fpuRegs.fprc[ _Fs_ ]], xRegisterSSE(mmreg)); } else @@ -155,7 +155,7 @@ void recCTC1() if ( mmreg >= 0 ) { - MOVDMMXtoM((uptr)&fpuRegs.fprc[ _Fs_ ], mmreg); + xMOVD(ptr[&fpuRegs.fprc[ _Fs_ ]], xRegisterMMX(mmreg)); SetMMXstate(); } else @@ -163,8 +163,8 @@ void recCTC1() _deleteGPRtoXMMreg(_Rt_, 1); _deleteMMXreg(MMX_GPR+_Rt_, 1); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - MOV32RtoM( (uptr)&fpuRegs.fprc[ _Fs_ ], EAX ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); + xMOV(ptr[&fpuRegs.fprc[ _Fs_ ]], eax); } } } @@ -192,7 +192,7 @@ void recMFC1() if( regt >= 0 ) { - SSE2_MOVDQ2Q_XMM_to_MM(regt, regs); + xMOVQ(xRegisterMMX(regt), xRegisterSSE(regs)); _signExtendGPRtoMMX(regt, _Rt_, 0); } else @@ -219,17 +219,17 @@ void recMFC1() { if( xmmregs[regt].mode & MODE_WRITE ) { - SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[_Rt_].UL[2], regt); + xMOVH.PS(ptr[&cpuRegs.GPR.r[_Rt_].UL[2]], xRegisterSSE(regt)); } xmmregs[regt].inuse = 0; } _deleteEEreg(_Rt_, 0); - MOV32MtoR( EAX, (uptr)&fpuRegs.fpr[ _Fs_ ].UL ); + xMOV(eax, ptr[&fpuRegs.fpr[ _Fs_ ].UL ]); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX ); + xCDQ( ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], edx); } } } @@ -245,7 +245,7 @@ void recMTC1() if( GPR_IS_CONST1(_Rt_) ) { _deleteFPtoXMMreg(_Fs_, 0); - MOV32ItoM((uptr)&fpuRegs.fpr[ _Fs_ ].UL, g_cpuConstRegs[_Rt_].UL[0]); + xMOV(ptr32[&fpuRegs.fpr[ _Fs_ ].UL], g_cpuConstRegs[_Rt_].UL[0]); } else { @@ -265,9 +265,9 @@ void recMTC1() int mmreg2 = _allocCheckFPUtoXMM(g_pCurInstInfo, _Fs_, MODE_WRITE); if( mmreg2 >= 0 ) - SSE_MOVSS_XMM_to_XMM(mmreg2, mmreg); + xMOVSS(xRegisterSSE(mmreg2), xRegisterSSE(mmreg)); else - SSE_MOVSS_XMM_to_M32((uptr)&fpuRegs.fpr[ _Fs_ ].UL, mmreg); + xMOVSS(ptr[&fpuRegs.fpr[ _Fs_ ].UL], xRegisterSSE(mmreg)); } } else @@ -282,24 +282,24 @@ void recMTC1() if( mmreg2 >= 0 ) { SetMMXstate(); - SSE2_MOVQ2DQ_MM_to_XMM(mmreg2, mmreg); + xMOVQ(xRegisterSSE(mmreg2), xRegisterMMX(mmreg)); } else { SetMMXstate(); - MOVDMMXtoM((uptr)&fpuRegs.fpr[ _Fs_ ].UL, mmreg); + xMOVD(ptr[&fpuRegs.fpr[ _Fs_ ].UL], xRegisterMMX(mmreg)); } } else { if( mmreg2 >= 0 ) { - SSE_MOVSS_M32_to_XMM(mmreg2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); + xMOVSSZX(xRegisterSSE(mmreg2), ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]]); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); - MOV32RtoM((uptr)&fpuRegs.fpr[ _Fs_ ].UL, EAX); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]]); + xMOV(ptr[&fpuRegs.fpr[ _Fs_ ].UL], eax); } } } @@ -349,30 +349,30 @@ static __aligned16 u64 FPU_FLOAT_TEMP[2]; __fi void fpuFloat4(int regd) { // +NaN -> +fMax, -NaN -> -fMax, +Inf -> +fMax, -Inf -> -fMax int t1reg = _allocTempXMMreg(XMMT_FPS, -1); if (t1reg >= 0) { - SSE_MOVSS_XMM_to_XMM(t1reg, regd); - SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&s_neg[0]); - SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]); - SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]); - SSE_ORPS_XMM_to_XMM(regd, t1reg); + xMOVSS(xRegisterSSE(t1reg), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(t1reg), ptr[&s_neg[0]]); + xMIN.SS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); + xMAX.SS(xRegisterSSE(regd), ptr[&g_minvals[0]]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(t1reg)); _freeXMMreg(t1reg); } else { Console.Error("fpuFloat2() allocation error"); t1reg = (regd == 0) ? 1 : 0; // get a temp reg thats not regd - SSE_MOVAPS_XMM_to_M128( (uptr)&FPU_FLOAT_TEMP[0], t1reg ); // backup data in t1reg to a temp address - SSE_MOVSS_XMM_to_XMM(t1reg, regd); - SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&s_neg[0]); - SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]); - SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]); - SSE_ORPS_XMM_to_XMM(regd, t1reg); - SSE_MOVAPS_M128_to_XMM( t1reg, (uptr)&FPU_FLOAT_TEMP[0] ); // restore t1reg data + xMOVAPS(ptr[&FPU_FLOAT_TEMP[0]], xRegisterSSE(t1reg )); // backup data in t1reg to a temp address + xMOVSS(xRegisterSSE(t1reg), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(t1reg), ptr[&s_neg[0]]); + xMIN.SS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); + xMAX.SS(xRegisterSSE(regd), ptr[&g_minvals[0]]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(t1reg)); + xMOVAPS(xRegisterSSE(t1reg), ptr[&FPU_FLOAT_TEMP[0] ]); // restore t1reg data } } __fi void fpuFloat(int regd) { // +/-NaN -> +fMax, +Inf -> +fMax, -Inf -> -fMax if (CHECK_FPU_OVERFLOW) { - SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]); // MIN() must be before MAX()! So that NaN's become +Maximum - SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]); + xMIN.SS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); // MIN() must be before MAX()! So that NaN's become +Maximum + xMAX.SS(xRegisterSSE(regd), ptr[&g_minvals[0]]); } } @@ -390,8 +390,8 @@ __fi void fpuFloat3(int regd) { // it also doesn't like preserving NaN sign with fpuFloat4, so the only way to make Digimon work // is by calling MAXSS first) if (CHECK_FPUCOMPAREHACK) { - //SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]); - SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]); + //xMIN.SS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); + xMAX.SS(xRegisterSSE(regd), ptr[&g_minvals[0]]); } else fpuFloat4(regd); } @@ -407,14 +407,14 @@ void ClampValues(int regd) { //------------------------------------------------------------------ void recABS_S_xmm(int info) { - if( info & PROCESS_EE_S ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - else SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + if( info & PROCESS_EE_S ) xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + else xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); - SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]); - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + xAND.PS(xRegisterSSE(EEREC_D), ptr[&s_pos[0]]); + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags if (CHECK_FPU_OVERFLOW) // Only need to do positive clamp, since EEREC_D is positive - SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)&g_maxvals[0]); + xMIN.SS(xRegisterSSE(EEREC_D), ptr[&g_maxvals[0]]); } FPURECOMPILE_CONSTCODE(ABS_S, XMMINFO_WRITED|XMMINFO_READS); @@ -440,75 +440,75 @@ void FPU_ADD_SUB(int regd, int regt, int issub) if (tempecx != ECX) { Console.Error("FPU: ADD/SUB Allocation Error!"); tempecx = ECX;} if (temp2 == -1) { Console.Error("FPU: ADD/SUB Allocation Error!"); temp2 = EAX;} - SSE2_MOVD_XMM_to_R(tempecx, regd); - SSE2_MOVD_XMM_to_R(temp2, regt); + xMOVD(xRegister32(tempecx), xRegisterSSE(regd)); + xMOVD(xRegister32(temp2), xRegisterSSE(regt)); //mask the exponents - SHR32ItoR(tempecx, 23); - SHR32ItoR(temp2, 23); - AND32ItoR(tempecx, 0xff); - AND32ItoR(temp2, 0xff); + xSHR(xRegister32(tempecx), 23); + xSHR(xRegister32(temp2), 23); + xAND(xRegister32(tempecx), 0xff); + xAND(xRegister32(temp2), 0xff); - SUB32RtoR(tempecx, temp2); //tempecx = exponent difference - CMP32ItoR(tempecx, 25); + xSUB(xRegister32(tempecx), xRegister32(temp2)); //tempecx = exponent difference + xCMP(xRegister32(tempecx), 25); j8Ptr[0] = JGE8(0); - CMP32ItoR(tempecx, 0); + xCMP(xRegister32(tempecx), 0); j8Ptr[1] = JG8(0); j8Ptr[2] = JE8(0); - CMP32ItoR(tempecx, -25); + xCMP(xRegister32(tempecx), -25); j8Ptr[3] = JLE8(0); //diff = -24 .. -1 , expd < expt - NEG32R(tempecx); - DEC32R(tempecx); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); //temp2 = 0xffffffff << tempecx - SSE2_MOVD_R_to_XMM(xmmtemp, temp2); - SSE_ANDPS_XMM_to_XMM(regd, xmmtemp); + xNEG(xRegister32(tempecx)); + xDEC(xRegister32(tempecx)); + xMOV(xRegister32(temp2), 0xffffffff); + xSHL(xRegister32(temp2), cl); //temp2 = 0xffffffff << tempecx + xMOVDZX(xRegisterSSE(xmmtemp), xRegister32(temp2)); + xAND.PS(xRegisterSSE(regd), xRegisterSSE(xmmtemp)); if (issub) - SSE_SUBSS_XMM_to_XMM(regd, regt); + xSUB.SS(xRegisterSSE(regd), xRegisterSSE(regt)); else - SSE_ADDSS_XMM_to_XMM(regd, regt); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(regt)); j8Ptr[4] = JMP8(0); x86SetJ8(j8Ptr[0]); //diff = 25 .. 255 , expt < expd - SSE_MOVAPS_XMM_to_XMM(xmmtemp, regt); - SSE_ANDPS_M128_to_XMM(xmmtemp, (uptr)s_neg); + xMOVAPS(xRegisterSSE(xmmtemp), xRegisterSSE(regt)); + xAND.PS(xRegisterSSE(xmmtemp), ptr[s_neg]); if (issub) - SSE_SUBSS_XMM_to_XMM(regd, xmmtemp); + xSUB.SS(xRegisterSSE(regd), xRegisterSSE(xmmtemp)); else - SSE_ADDSS_XMM_to_XMM(regd, xmmtemp); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(xmmtemp)); j8Ptr[5] = JMP8(0); x86SetJ8(j8Ptr[1]); //diff = 1 .. 24, expt < expd - DEC32R(tempecx); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); //temp2 = 0xffffffff << tempecx - SSE2_MOVD_R_to_XMM(xmmtemp, temp2); - SSE_ANDPS_XMM_to_XMM(xmmtemp, regt); + xDEC(xRegister32(tempecx)); + xMOV(xRegister32(temp2), 0xffffffff); + xSHL(xRegister32(temp2), cl); //temp2 = 0xffffffff << tempecx + xMOVDZX(xRegisterSSE(xmmtemp), xRegister32(temp2)); + xAND.PS(xRegisterSSE(xmmtemp), xRegisterSSE(regt)); if (issub) - SSE_SUBSS_XMM_to_XMM(regd, xmmtemp); + xSUB.SS(xRegisterSSE(regd), xRegisterSSE(xmmtemp)); else - SSE_ADDSS_XMM_to_XMM(regd, xmmtemp); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(xmmtemp)); j8Ptr[6] = JMP8(0); x86SetJ8(j8Ptr[3]); //diff = -255 .. -25, expd < expt - SSE_ANDPS_M128_to_XMM(regd, (uptr)s_neg); + xAND.PS(xRegisterSSE(regd), ptr[s_neg]); if (issub) - SSE_SUBSS_XMM_to_XMM(regd, regt); + xSUB.SS(xRegisterSSE(regd), xRegisterSSE(regt)); else - SSE_ADDSS_XMM_to_XMM(regd, regt); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(regt)); j8Ptr[7] = JMP8(0); x86SetJ8(j8Ptr[2]); //diff == 0 if (issub) - SSE_SUBSS_XMM_to_XMM(regd, regt); + xSUB.SS(xRegisterSSE(regd), xRegisterSSE(regt)); else - SSE_ADDSS_XMM_to_XMM(regd, regt); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(regt)); x86SetJ8(j8Ptr[4]); x86SetJ8(j8Ptr[5]); @@ -522,12 +522,12 @@ void FPU_ADD_SUB(int regd, int regt, int issub) void FPU_ADD(int regd, int regt) { if (FPU_CORRECT_ADD_SUB) FPU_ADD_SUB(regd, regt, 0); - else SSE_ADDSS_XMM_to_XMM(regd, regt); + else xADD.SS(xRegisterSSE(regd), xRegisterSSE(regt)); } void FPU_SUB(int regd, int regt) { if (FPU_CORRECT_ADD_SUB) FPU_ADD_SUB(regd, regt, 1); - else SSE_SUBSS_XMM_to_XMM(regd, regt); + else xSUB.SS(xRegisterSSE(regd), xRegisterSSE(regt)); } //------------------------------------------------------------------ @@ -551,17 +551,17 @@ void FPU_MUL(int regd, int regt, bool reverseOperands) if (CHECK_FPUMULHACK) { - SSE2_MOVD_XMM_to_R(ECX, reverseOperands ? regt : regd); - SSE2_MOVD_XMM_to_R(EDX, reverseOperands ? regd : regt); - CALLFunc( (uptr)&FPU_MUL_HACK ); //returns the hacked result or 0 - TEST32RtoR(EAX, EAX); + xMOVD(ecx, xRegisterSSE(reverseOperands ? regt : regd)); + xMOVD(edx, xRegisterSSE(reverseOperands ? regd : regt)); + xCALL((void*)(uptr)&FPU_MUL_HACK ); //returns the hacked result or 0 + xTEST(eax, eax); noHack = JZ8(0); - SSE2_MOVD_R_to_XMM(regd, EAX); + xMOVDZX(xRegisterSSE(regd), eax); endMul = JMP8(0); x86SetJ8(noHack); } - SSE_MULSS_XMM_to_XMM(regd, regt); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(regt)); if (CHECK_FPUMULHACK) x86SetJ8(endMul); @@ -590,24 +590,24 @@ int recCommutativeOp(int info, int regd, int op) switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: if (regd == EEREC_S) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW /*&& !CHECK_FPUCLAMPHACK */ || (op >= 2)) { fpuFloat2(regd); fpuFloat2(t0reg); } recComOpXMM_to_XMM[op](regd, t0reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW || (op >= 2)) { fpuFloat2(regd); fpuFloat2(EEREC_S); } recComOpXMM_to_XMM_REV[op](regd, EEREC_S); } break; case PROCESS_EE_T: if (regd == EEREC_T) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW || (op >= 2)) { fpuFloat2(regd); fpuFloat2(t0reg); } recComOpXMM_to_XMM_REV[op](regd, t0reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW || (op >= 2)) { fpuFloat2(regd); fpuFloat2(EEREC_T); } recComOpXMM_to_XMM[op](regd, EEREC_T); } @@ -618,15 +618,15 @@ int recCommutativeOp(int info, int regd, int op) recComOpXMM_to_XMM_REV[op](regd, EEREC_S); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_OVERFLOW || (op >= 2)) { fpuFloat2(regd); fpuFloat2(EEREC_T); } recComOpXMM_to_XMM[op](regd, EEREC_T); } break; default: Console.WriteLn(Color_Magenta, "FPU: recCommutativeOp case 4"); - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW || (op >= 2)) { fpuFloat2(regd); fpuFloat2(t0reg); } recComOpXMM_to_XMM[op](regd, t0reg); break; @@ -643,7 +643,7 @@ int recCommutativeOp(int info, int regd, int op) //------------------------------------------------------------------ void recADD_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags ClampValues(recCommutativeOp(info, EEREC_D, 0)); //REC_FPUOP(ADD_S); } @@ -652,7 +652,7 @@ FPURECOMPILE_CONSTCODE(ADD_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT); void recADDA_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags ClampValues(recCommutativeOp(info, EEREC_ACC, 0)); } @@ -671,8 +671,8 @@ static void _setupBranchTest() // (fpuRegs.fprc[31] & 0x00800000) // BC2F checks if the statement is false, BC2T checks if the statement is true. - MOV32MtoR(EAX, (uptr)&fpuRegs.fprc[31]); - TEST32ItoR(EAX, FPUflagC); + xMOV(eax, ptr[&fpuRegs.fprc[31]]); + xTEST(eax, FPUflagC); } void recBC1F() @@ -716,41 +716,41 @@ void recC_EQ_xmm(int info) fpuFloat3(EEREC_S); t0reg = _allocTempXMMreg(XMMT_FPS, -1); if (t0reg >= 0) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); fpuFloat3(t0reg); - SSE_UCOMISS_XMM_to_XMM(EEREC_S, t0reg); + xUCOMI.SS(xRegisterSSE(EEREC_S), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } - else SSE_UCOMISS_M32_to_XMM(EEREC_S, (uptr)&fpuRegs.fpr[_Ft_]); + else xUCOMI.SS(xRegisterSSE(EEREC_S), ptr[&fpuRegs.fpr[_Ft_]]); break; case PROCESS_EE_T: fpuFloat3(EEREC_T); t0reg = _allocTempXMMreg(XMMT_FPS, -1); if (t0reg >= 0) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); fpuFloat3(t0reg); - SSE_UCOMISS_XMM_to_XMM(t0reg, EEREC_T); + xUCOMI.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); _freeXMMreg(t0reg); } - else SSE_UCOMISS_M32_to_XMM(EEREC_T, (uptr)&fpuRegs.fpr[_Fs_]); + else xUCOMI.SS(xRegisterSSE(EEREC_T), ptr[&fpuRegs.fpr[_Fs_]]); break; case (PROCESS_EE_S|PROCESS_EE_T): fpuFloat3(EEREC_S); fpuFloat3(EEREC_T); - SSE_UCOMISS_XMM_to_XMM(EEREC_S, EEREC_T); + xUCOMI.SS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_T)); break; default: Console.WriteLn(Color_Magenta, "recC_EQ_xmm: Default"); tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); if (tempReg < 0) {Console.Error("FPU: DIV Allocation Error!"); tempReg = EAX;} - MOV32MtoR(tempReg, (uptr)&fpuRegs.fpr[_Fs_]); - CMP32MtoR(tempReg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOV(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Fs_]]); + xCMP(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Ft_]]); j8Ptr[0] = JZ8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); if (tempReg >= 0) _freeX86reg(tempReg); @@ -758,10 +758,10 @@ void recC_EQ_xmm(int info) } j8Ptr[0] = JZ8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); } @@ -770,7 +770,7 @@ FPURECOMPILE_CONSTCODE(C_EQ, XMMINFO_READS|XMMINFO_READT); void recC_F() { - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); } //REC_FPUFUNC(C_F); @@ -786,30 +786,30 @@ void recC_LE_xmm(int info ) fpuFloat3(EEREC_S); t0reg = _allocTempXMMreg(XMMT_FPS, -1); if (t0reg >= 0) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); fpuFloat3(t0reg); - SSE_UCOMISS_XMM_to_XMM(EEREC_S, t0reg); + xUCOMI.SS(xRegisterSSE(EEREC_S), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } - else SSE_UCOMISS_M32_to_XMM(EEREC_S, (uptr)&fpuRegs.fpr[_Ft_]); + else xUCOMI.SS(xRegisterSSE(EEREC_S), ptr[&fpuRegs.fpr[_Ft_]]); break; case PROCESS_EE_T: fpuFloat3(EEREC_T); t0reg = _allocTempXMMreg(XMMT_FPS, -1); if (t0reg >= 0) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); fpuFloat3(t0reg); - SSE_UCOMISS_XMM_to_XMM(t0reg, EEREC_T); + xUCOMI.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); _freeXMMreg(t0reg); } else { - SSE_UCOMISS_M32_to_XMM(EEREC_T, (uptr)&fpuRegs.fpr[_Fs_]); + xUCOMI.SS(xRegisterSSE(EEREC_T), ptr[&fpuRegs.fpr[_Fs_]]); j8Ptr[0] = JAE8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); return; } @@ -817,20 +817,20 @@ void recC_LE_xmm(int info ) case (PROCESS_EE_S|PROCESS_EE_T): fpuFloat3(EEREC_S); fpuFloat3(EEREC_T); - SSE_UCOMISS_XMM_to_XMM(EEREC_S, EEREC_T); + xUCOMI.SS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_T)); break; default: // Untested and incorrect, but this case is never reached AFAIK (cottonvibes) Console.WriteLn(Color_Magenta, "recC_LE_xmm: Default"); tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); if (tempReg < 0) {Console.Error("FPU: DIV Allocation Error!"); tempReg = EAX;} - MOV32MtoR(tempReg, (uptr)&fpuRegs.fpr[_Fs_]); - CMP32MtoR(tempReg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOV(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Fs_]]); + xCMP(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Ft_]]); j8Ptr[0] = JLE8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); if (tempReg >= 0) _freeX86reg(tempReg); @@ -838,10 +838,10 @@ void recC_LE_xmm(int info ) } j8Ptr[0] = JBE8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); } @@ -860,30 +860,30 @@ void recC_LT_xmm(int info) fpuFloat3(EEREC_S); t0reg = _allocTempXMMreg(XMMT_FPS, -1); if (t0reg >= 0) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); fpuFloat3(t0reg); - SSE_UCOMISS_XMM_to_XMM(EEREC_S, t0reg); + xUCOMI.SS(xRegisterSSE(EEREC_S), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } - else SSE_UCOMISS_M32_to_XMM(EEREC_S, (uptr)&fpuRegs.fpr[_Ft_]); + else xUCOMI.SS(xRegisterSSE(EEREC_S), ptr[&fpuRegs.fpr[_Ft_]]); break; case PROCESS_EE_T: fpuFloat3(EEREC_T); t0reg = _allocTempXMMreg(XMMT_FPS, -1); if (t0reg >= 0) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); fpuFloat3(t0reg); - SSE_UCOMISS_XMM_to_XMM(t0reg, EEREC_T); + xUCOMI.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); _freeXMMreg(t0reg); } else { - SSE_UCOMISS_M32_to_XMM(EEREC_T, (uptr)&fpuRegs.fpr[_Fs_]); + xUCOMI.SS(xRegisterSSE(EEREC_T), ptr[&fpuRegs.fpr[_Fs_]]); j8Ptr[0] = JA8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); return; } @@ -893,20 +893,20 @@ void recC_LT_xmm(int info) // Note: This fixes a crash in Rule of Rose. fpuFloat3(EEREC_S); fpuFloat3(EEREC_T); - SSE_UCOMISS_XMM_to_XMM(EEREC_S, EEREC_T); + xUCOMI.SS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_T)); break; default: Console.WriteLn(Color_Magenta, "recC_LT_xmm: Default"); tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); if (tempReg < 0) {Console.Error("FPU: DIV Allocation Error!"); tempReg = EAX;} - MOV32MtoR(tempReg, (uptr)&fpuRegs.fpr[_Fs_]); - CMP32MtoR(tempReg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOV(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Fs_]]); + xCMP(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Ft_]]); j8Ptr[0] = JL8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); if (tempReg >= 0) _freeX86reg(tempReg); @@ -914,10 +914,10 @@ void recC_LT_xmm(int info) } j8Ptr[0] = JB8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); } @@ -932,10 +932,10 @@ FPURECOMPILE_CONSTCODE(C_LT, XMMINFO_READS|XMMINFO_READT); void recCVT_S_xmm(int info) { if( !(info&PROCESS_EE_S) || (EEREC_D != EEREC_S && !(info&PROCESS_EE_MODEWRITES)) ) { - SSE_CVTSI2SS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + xCVTSI2SS(xRegisterSSE(EEREC_D), ptr32[&fpuRegs.fpr[_Fs_]]); } else { - SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_D, EEREC_S); + xCVTDQ2PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } @@ -954,27 +954,27 @@ void recCVT_W() if( regs >= 0 ) { if (CHECK_FPU_EXTRA_OVERFLOW) fpuFloat2(regs); - SSE_CVTTSS2SI_XMM_to_R32(EAX, regs); - SSE_MOVMSKPS_XMM_to_R32(EDX, regs); //extract the signs - AND32ItoR(EDX,1); //keep only LSB + xCVTTSS2SI(eax, xRegisterSSE(regs)); + xMOVMSKPS(edx, xRegisterSSE(regs)); //extract the signs + xAND(edx, 1); //keep only LSB } else { - SSE_CVTTSS2SI_M32_to_R32(EAX, (uptr)&fpuRegs.fpr[ _Fs_ ]); - MOV32MtoR(EDX, (uptr)&fpuRegs.fpr[ _Fs_ ]); - SHR32ItoR(EDX, 31); //mov sign to lsb + xCVTTSS2SI(eax, ptr32[&fpuRegs.fpr[ _Fs_ ]]); + xMOV(edx, ptr[&fpuRegs.fpr[ _Fs_ ]]); + xSHR(edx, 31); //mov sign to lsb } //kill register allocation for dst because we write directly to fpuRegs.fpr[_Fd_] _deleteFPtoXMMreg(_Fd_, 2); - ADD32ItoR(EDX, 0x7FFFFFFF); //0x7FFFFFFF if positive, 0x8000 0000 if negative + xADD(edx, 0x7FFFFFFF); //0x7FFFFFFF if positive, 0x8000 0000 if negative - CMP32ItoR(EAX, 0x80000000); //If the result is indefinitive - CMOVE32RtoR(EAX, EDX); //Saturate it + xCMP(eax, 0x80000000); //If the result is indefinitive + xCMOVE(eax, edx); //Saturate it //Write the result - MOV32RtoM((uptr)&fpuRegs.fpr[_Fd_], EAX); + xMOV(ptr[&fpuRegs.fpr[_Fd_]], eax); } //------------------------------------------------------------------ @@ -991,39 +991,39 @@ void recDIVhelper1(int regd, int regt) // Sets flags //if (t1reg == -1) {Console.Error("FPU: DIV Allocation Error!");} if (tempReg == -1) {Console.Error("FPU: DIV Allocation Error!"); tempReg = EAX;} - AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags + xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags /*--- Check for divide by zero ---*/ - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regt); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regt == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(regt)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if regt == zero, sign will be set) ajmp32 = JZ32(0); //Skip if not set /*--- Check for 0/0 ---*/ - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regd); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regd == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(regd)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if regd == zero, sign will be set) pjmp1 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) pjmp2 = JMP8(0); x86SetJ8(pjmp1); //x/0 but not 0/0 - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) x86SetJ8(pjmp2); /*--- Make regd +/- Maximum ---*/ - SSE_XORPS_XMM_to_XMM(regd, regt); // Make regd Positive or Negative - SSE_ANDPS_M128_to_XMM(regd, (uptr)&s_neg[0]); // Get the sign bit - SSE_ORPS_M128_to_XMM(regd, (uptr)&g_maxvals[0]); // regd = +/- Maximum - //SSE_MOVSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]); + xXOR.PS(xRegisterSSE(regd), xRegisterSSE(regt)); // Make regd Positive or Negative + xAND.PS(xRegisterSSE(regd), ptr[&s_neg[0]]); // Get the sign bit + xOR.PS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); // regd = +/- Maximum + //xMOVSSZX(xRegisterSSE(regd), ptr[&g_maxvals[0]]); bjmp32 = JMP32(0); x86SetJ32(ajmp32); /*--- Normal Divide ---*/ if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(regt); } - SSE_DIVSS_XMM_to_XMM(regd, regt); + xDIV.SS(xRegisterSSE(regd), xRegisterSSE(regt)); ClampValues(regd); x86SetJ32(bjmp32); @@ -1035,7 +1035,7 @@ void recDIVhelper1(int regd, int regt) // Sets flags void recDIVhelper2(int regd, int regt) // Doesn't sets flags { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(regt); } - SSE_DIVSS_XMM_to_XMM(regd, regt); + xDIV.SS(xRegisterSSE(regd), xRegisterSSE(regt)); ClampValues(regd); } @@ -1078,21 +1078,21 @@ void recDIV_S_xmm(int info) switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: //Console.WriteLn("FPU: DIV case 1"); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, t0reg); else recDIVhelper2(EEREC_D, t0reg); break; case PROCESS_EE_T: //Console.WriteLn("FPU: DIV case 2"); if (EEREC_D == EEREC_T) { - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); - SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, t0reg); else recDIVhelper2(EEREC_D, t0reg); } else { - SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, EEREC_T); else recDIVhelper2(EEREC_D, EEREC_T); } @@ -1100,21 +1100,21 @@ void recDIV_S_xmm(int info) case (PROCESS_EE_S|PROCESS_EE_T): //Console.WriteLn("FPU: DIV case 3"); if (EEREC_D == EEREC_T) { - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, t0reg); else recDIVhelper2(EEREC_D, t0reg); } else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, EEREC_T); else recDIVhelper2(EEREC_D, EEREC_T); } break; default: //Console.WriteLn("FPU: DIV case 4"); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); - SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, t0reg); else recDIVhelper2(EEREC_D, t0reg); break; @@ -1139,36 +1139,36 @@ void recMADDtemp(int info, int regd) switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: if(regd == EEREC_S) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(regd, t0reg); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(regd); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } } else if (regd == EEREC_ACC){ - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(EEREC_S); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(t0reg, EEREC_S); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_S); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(regd); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } @@ -1176,36 +1176,36 @@ void recMADDtemp(int info, int regd) break; case PROCESS_EE_T: if(regd == EEREC_T) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(regd, t0reg); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(regd); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } } else if (regd == EEREC_ACC){ - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(EEREC_T); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(t0reg, EEREC_T); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(regd); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(EEREC_ACC); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } @@ -1214,47 +1214,47 @@ void recMADDtemp(int info, int regd) case (PROCESS_EE_S|PROCESS_EE_T): if(regd == EEREC_S) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(EEREC_ACC); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } } else if(regd == EEREC_T) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_S); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(EEREC_ACC); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } } else if(regd == EEREC_ACC) { - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_S); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(t0reg); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(t0reg, EEREC_T); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(EEREC_ACC); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } @@ -1263,26 +1263,26 @@ void recMADDtemp(int info, int regd) default: if(regd == EEREC_ACC){ t1reg = _allocTempXMMreg(XMMT_FPS, -1); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); - SSE_MOVSS_M32_to_XMM(t1reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); + xMOVSSZX(xRegisterSSE(t1reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(t0reg); fpuFloat2(t1reg); } - SSE_MULSS_XMM_to_XMM(t0reg, t1reg); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); _freeXMMreg(t1reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(regd, t0reg); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); if (info & PROCESS_EE_ACC) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(EEREC_ACC); } FPU_ADD(regd, EEREC_ACC); } else { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_ADD(regd, t0reg); } @@ -1296,7 +1296,7 @@ void recMADDtemp(int info, int regd) void recMADD_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags recMADDtemp(info, EEREC_D); } @@ -1304,7 +1304,7 @@ FPURECOMPILE_CONSTCODE(MADD_S, XMMINFO_WRITED|XMMINFO_READACC|XMMINFO_READS|XMMI void recMADDA_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags recMADDtemp(info, EEREC_ACC); } @@ -1317,7 +1317,7 @@ FPURECOMPILE_CONSTCODE(MADDA_S, XMMINFO_WRITEACC|XMMINFO_READACC|XMMINFO_READS|X //------------------------------------------------------------------ void recMAX_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags recCommutativeOp(info, EEREC_D, 2); } @@ -1325,7 +1325,7 @@ FPURECOMPILE_CONSTCODE(MAX_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT); void recMIN_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags recCommutativeOp(info, EEREC_D, 3); } @@ -1338,8 +1338,8 @@ FPURECOMPILE_CONSTCODE(MIN_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT); //------------------------------------------------------------------ void recMOV_S_xmm(int info) { - if( info & PROCESS_EE_S ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - else SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + if( info & PROCESS_EE_S ) xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + else xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); } FPURECOMPILE_CONSTCODE(MOV_S, XMMINFO_WRITED|XMMINFO_READS); @@ -1357,121 +1357,121 @@ int t1reg; switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: if(regd == EEREC_S) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(regd, t0reg); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } else if (regd == EEREC_ACC){ - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(EEREC_S); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(t0reg, EEREC_S); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(regd, t0reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_S); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } break; case PROCESS_EE_T: if(regd == EEREC_T) { - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(regd, t0reg); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } else if (regd == EEREC_ACC){ - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(EEREC_T); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(t0reg, EEREC_T); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(regd, t0reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } break; case (PROCESS_EE_S|PROCESS_EE_T): if(regd == EEREC_S) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } else if(regd == EEREC_T) { if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_S); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } else if(regd == EEREC_ACC) { - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_S); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(t0reg); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(t0reg, EEREC_T); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(regd, t0reg); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(EEREC_T); } - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } break; default: if(regd == EEREC_ACC){ t1reg = _allocTempXMMreg(XMMT_FPS, -1); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]); - SSE_MOVSS_M32_to_XMM(t1reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Fs_]]); + xMOVSSZX(xRegisterSSE(t1reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(t0reg); fpuFloat2(t1reg); } - SSE_MULSS_XMM_to_XMM(t0reg, t1reg); + xMUL.SS(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(regd, t0reg); _freeXMMreg(t1reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat2(regd); fpuFloat2(t0reg); } - SSE_MULSS_XMM_to_XMM(regd, t0reg); - if (info & PROCESS_EE_ACC) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_ACC); } - else { SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.ACC); } + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); + if (info & PROCESS_EE_ACC) { xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_ACC)); } + else { xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.ACC]); } if (CHECK_FPU_EXTRA_OVERFLOW) { fpuFloat(regd); fpuFloat(t0reg); } FPU_SUB(t0reg, regd); - SSE_MOVSS_XMM_to_XMM(regd, t0reg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(t0reg)); } break; } @@ -1483,7 +1483,7 @@ int t1reg; void recMSUB_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags recMSUBtemp(info, EEREC_D); } @@ -1491,7 +1491,7 @@ FPURECOMPILE_CONSTCODE(MSUB_S, XMMINFO_WRITED|XMMINFO_READACC|XMMINFO_READS|XMMI void recMSUBA_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags recMSUBtemp(info, EEREC_ACC); } @@ -1504,7 +1504,7 @@ FPURECOMPILE_CONSTCODE(MSUBA_S, XMMINFO_WRITEACC|XMMINFO_READACC|XMMINFO_READS|X //------------------------------------------------------------------ void recMUL_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags ClampValues(recCommutativeOp(info, EEREC_D, 1)); } @@ -1512,7 +1512,7 @@ FPURECOMPILE_CONSTCODE(MUL_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT); void recMULA_S_xmm(int info) { - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags ClampValues(recCommutativeOp(info, EEREC_ACC, 1)); } @@ -1524,11 +1524,11 @@ FPURECOMPILE_CONSTCODE(MULA_S, XMMINFO_WRITEACC|XMMINFO_READS|XMMINFO_READT); // NEG XMM //------------------------------------------------------------------ void recNEG_S_xmm(int info) { - if( info & PROCESS_EE_S ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - else SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + if( info & PROCESS_EE_S ) xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + else xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags - SSE_XORPS_M128_to_XMM(EEREC_D, (uptr)&s_neg[0]); + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags + xXOR.PS(xRegisterSSE(EEREC_D), ptr[&s_neg[0]]); ClampValues(EEREC_D); } @@ -1550,43 +1550,43 @@ void recSUBop(int info, int regd) int t0reg = _allocTempXMMreg(XMMT_FPS, -1); //if (t0reg == -1) {Console.Error("FPU: SUB Allocation Error!");} - //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags + //xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO|FPUflagU)); // Clear O and U flags switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: //Console.WriteLn("FPU: SUB case 1"); - if (regd != EEREC_S) SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + if (regd != EEREC_S) xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); recSUBhelper(regd, t0reg); break; case PROCESS_EE_T: //Console.WriteLn("FPU: SUB case 2"); if (regd == EEREC_T) { - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); recSUBhelper(regd, t0reg); } else { - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); recSUBhelper(regd, EEREC_T); } break; case (PROCESS_EE_S|PROCESS_EE_T): //Console.WriteLn("FPU: SUB case 3"); if (regd == EEREC_T) { - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); recSUBhelper(regd, t0reg); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); recSUBhelper(regd, EEREC_T); } break; default: Console.Warning("FPU: SUB case 4"); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); - SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); + xMOVSSZX(xRegisterSSE(regd), ptr[&fpuRegs.fpr[_Fs_]]); recSUBhelper(regd, t0reg); break; } @@ -1631,29 +1631,29 @@ void recSQRT_S_xmm(int info) roundmodeFlag = true; } - if( info & PROCESS_EE_T ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_T); - else SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Ft_]); + if( info & PROCESS_EE_T ) xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_FLAGS) { int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); if (tempReg == -1) {Console.Error("FPU: SQRT Allocation Error!"); tempReg = EAX;} - AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags + xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags /*--- Check for negative SQRT ---*/ - SSE_MOVMSKPS_XMM_to_R32(tempReg, EEREC_D); - AND32ItoR(tempReg, 1); //Check sign + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(EEREC_D)); + xAND(xRegister32(tempReg), 1); //Check sign pjmp = JZ8(0); //Skip if none are - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags - SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]); // Make EEREC_D Positive + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags + xAND.PS(xRegisterSSE(EEREC_D), ptr[&s_pos[0]]); // Make EEREC_D Positive x86SetJ8(pjmp); _freeX86reg(tempReg); } - else SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]); // Make EEREC_D Positive + else xAND.PS(xRegisterSSE(EEREC_D), ptr[&s_pos[0]]); // Make EEREC_D Positive - if (CHECK_FPU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)&g_maxvals[0]);// Only need to do positive clamp, since EEREC_D is positive - SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D); + if (CHECK_FPU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_D), ptr[&g_maxvals[0]]);// Only need to do positive clamp, since EEREC_D is positive + xSQRT.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); if (CHECK_FPU_EXTRA_OVERFLOW) ClampValues(EEREC_D); // Shouldn't need to clamp again since SQRT of a number will always be smaller than the original number, doing it just incase :/ if (roundmodeFlag) xLDMXCSR (g_sseMXCSR); @@ -1676,47 +1676,47 @@ void recRSQRThelper1(int regd, int t0reg) // Preforms the RSQRT function when re //if (t1reg == -1) {Console.Error("FPU: RSQRT Allocation Error!");} if (tempReg == -1) {Console.Error("FPU: RSQRT Allocation Error!"); tempReg = EAX;} - AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags + xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags /*--- (first) Check for negative SQRT ---*/ - SSE_MOVMSKPS_XMM_to_R32(tempReg, t0reg); - AND32ItoR(tempReg, 1); //Check sign + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t0reg)); + xAND(xRegister32(tempReg), 1); //Check sign pjmp2 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags - SSE_ANDPS_M128_to_XMM(t0reg, (uptr)&s_pos[0]); // Make t0reg Positive + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags + xAND.PS(xRegisterSSE(t0reg), ptr[&s_pos[0]]); // Make t0reg Positive x86SetJ8(pjmp2); /*--- Check for zero ---*/ - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, t0reg); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if t0reg == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if t0reg == zero, sign will be set) pjmp1 = JZ8(0); //Skip if not set /*--- Check for 0/0 ---*/ - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regd); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regd == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(regd)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if regd == zero, sign will be set) qjmp1 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) qjmp2 = JMP8(0); x86SetJ8(qjmp1); //x/0 but not 0/0 - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) x86SetJ8(qjmp2); /*--- Make regd +/- Maximum ---*/ - SSE_ANDPS_M128_to_XMM(regd, (uptr)&s_neg[0]); // Get the sign bit - SSE_ORPS_M128_to_XMM(regd, (uptr)&g_maxvals[0]); // regd = +/- Maximum + xAND.PS(xRegisterSSE(regd), ptr[&s_neg[0]]); // Get the sign bit + xOR.PS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); // regd = +/- Maximum pjmp32 = JMP32(0); x86SetJ8(pjmp1); if (CHECK_FPU_EXTRA_OVERFLOW) { - SSE_MINSS_M32_to_XMM(t0reg, (uptr)&g_maxvals[0]); // Only need to do positive clamp, since t0reg is positive + xMIN.SS(xRegisterSSE(t0reg), ptr[&g_maxvals[0]]); // Only need to do positive clamp, since t0reg is positive fpuFloat2(regd); } - SSE_SQRTSS_XMM_to_XMM(t0reg, t0reg); - SSE_DIVSS_XMM_to_XMM(regd, t0reg); + xSQRT.SS(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xDIV.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); ClampValues(regd); x86SetJ32(pjmp32); @@ -1727,13 +1727,13 @@ void recRSQRThelper1(int regd, int t0reg) // Preforms the RSQRT function when re void recRSQRThelper2(int regd, int t0reg) // Preforms the RSQRT function when regd <- Fs and t0reg <- Ft (Doesn't set flags) { - SSE_ANDPS_M128_to_XMM(t0reg, (uptr)&s_pos[0]); // Make t0reg Positive + xAND.PS(xRegisterSSE(t0reg), ptr[&s_pos[0]]); // Make t0reg Positive if (CHECK_FPU_EXTRA_OVERFLOW) { - SSE_MINSS_M32_to_XMM(t0reg, (uptr)&g_maxvals[0]); // Only need to do positive clamp, since t0reg is positive + xMIN.SS(xRegisterSSE(t0reg), ptr[&g_maxvals[0]]); // Only need to do positive clamp, since t0reg is positive fpuFloat2(regd); } - SSE_SQRTSS_XMM_to_XMM(t0reg, t0reg); - SSE_DIVSS_XMM_to_XMM(regd, t0reg); + xSQRT.SS(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xDIV.SS(xRegisterSSE(regd), xRegisterSSE(t0reg)); ClampValues(regd); } @@ -1749,29 +1749,29 @@ void recRSQRT_S_xmm(int info) switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: //Console.WriteLn("FPU: RSQRT case 1"); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); else recRSQRThelper2(EEREC_D, t0reg); break; case PROCESS_EE_T: //Console.WriteLn("FPU: RSQRT case 2"); - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); - SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); else recRSQRThelper2(EEREC_D, t0reg); break; case (PROCESS_EE_S|PROCESS_EE_T): //Console.WriteLn("FPU: RSQRT case 3"); - SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); else recRSQRThelper2(EEREC_D, t0reg); break; default: //Console.WriteLn("FPU: RSQRT case 4"); - SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); - SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + xMOVSSZX(xRegisterSSE(t0reg), ptr[&fpuRegs.fpr[_Ft_]]); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Fs_]]); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); else recRSQRThelper2(EEREC_D, t0reg); break; diff --git a/pcsx2/x86/iFPUd.cpp b/pcsx2/x86/iFPUd.cpp index 8f27222dbd..0b710e595d 100644 --- a/pcsx2/x86/iFPUd.cpp +++ b/pcsx2/x86/iFPUd.cpp @@ -93,7 +93,7 @@ namespace DOUBLE { void f(); \ void rec##f() { \ iFlushCall(FLUSH_INTERPRETER); \ - CALLFunc((uptr)R5900::Interpreter::OpcodeImpl::COP1::f); \ + xCALL((void*)(uptr)R5900::Interpreter::OpcodeImpl::COP1::f); \ branch = 2; \ } @@ -101,7 +101,7 @@ namespace DOUBLE { void f(); \ void rec##f() { \ iFlushCall(FLUSH_INTERPRETER); \ - CALLFunc((uptr)R5900::Interpreter::OpcodeImpl::COP1::f); \ + xCALL((void*)(uptr)R5900::Interpreter::OpcodeImpl::COP1::f); \ } //------------------------------------------------------------------ @@ -161,21 +161,21 @@ static const __aligned(32) FPUd_Globals s_const = void ToDouble(int reg) { - SSE_UCOMISS_M32_to_XMM(reg, (uptr)s_const.pos_inf); // Sets ZF if reg is equal or incomparable to pos_inf + xUCOMI.SS(xRegisterSSE(reg), ptr[s_const.pos_inf]); // Sets ZF if reg is equal or incomparable to pos_inf u8 *to_complex = JE8(0); // Complex conversion if positive infinity or NaN - SSE_UCOMISS_M32_to_XMM(reg, (uptr)s_const.neg_inf); + xUCOMI.SS(xRegisterSSE(reg), ptr[s_const.neg_inf]); u8 *to_complex2 = JE8(0); // Complex conversion if negative infinity - SSE2_CVTSS2SD_XMM_to_XMM(reg, reg); // Simply convert + xCVTSS2SD(xRegisterSSE(reg), xRegisterSSE(reg)); // Simply convert u8 *end = JMP8(0); x86SetJ8(to_complex); x86SetJ8(to_complex2); // Special conversion for when IEEE sees the value in reg as an INF/NaN - SSE2_PSUBD_M128_to_XMM(reg, (uptr)s_const.one_exp); // Lower exponent by one - SSE2_CVTSS2SD_XMM_to_XMM(reg, reg); - SSE2_PADDQ_M128_to_XMM(reg, (uptr)s_const.dbl_one_exp); // Raise exponent by one + xPSUB.D(xRegisterSSE(reg), ptr[s_const.one_exp]); // Lower exponent by one + xCVTSS2SD(xRegisterSSE(reg), xRegisterSSE(reg)); + xPADD.Q(xRegisterSSE(reg), ptr[s_const.dbl_one_exp]); // Raise exponent by one x86SetJ8(end); } @@ -202,67 +202,67 @@ void ToDouble(int reg) void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc, bool addsub) { if (flags) - AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO | FPUflagU)); + xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO | FPUflagU)); if (flags && acc) - AND32ItoM((uptr)&fpuRegs.ACCflag, ~1); + xAND(ptr32[&fpuRegs.ACCflag], ~1); - SSE_MOVAPS_XMM_to_XMM(absreg, reg); - SSE2_ANDPD_M128_to_XMM(absreg, (uptr)&s_const.dbl_s_pos); + xMOVAPS(xRegisterSSE(absreg), xRegisterSSE(reg)); + xAND.PD(xRegisterSSE(absreg), ptr[&s_const.dbl_s_pos]); - SSE2_UCOMISD_M64_to_XMM(absreg, (uptr)&s_const.dbl_cvt_overflow); + xUCOMI.SD(xRegisterSSE(absreg), ptr[&s_const.dbl_cvt_overflow]); u8 *to_complex = JAE8(0); - SSE2_UCOMISD_M64_to_XMM(absreg, (uptr)&s_const.dbl_underflow); + xUCOMI.SD(xRegisterSSE(absreg), ptr[&s_const.dbl_underflow]); u8 *to_underflow = JB8(0); - SSE2_CVTSD2SS_XMM_to_XMM(reg, reg); //simply convert + xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg)); //simply convert u8 *end = JMP8(0); x86SetJ8(to_complex); - SSE2_UCOMISD_M64_to_XMM(absreg, (uptr)&s_const.dbl_ps2_overflow); + xUCOMI.SD(xRegisterSSE(absreg), ptr[&s_const.dbl_ps2_overflow]); u8 *to_overflow = JAE8(0); - SSE2_PSUBQ_M128_to_XMM(reg, (uptr)&s_const.dbl_one_exp); //lower exponent - SSE2_CVTSD2SS_XMM_to_XMM(reg, reg); //convert - SSE2_PADDD_M128_to_XMM(reg, (uptr)s_const.one_exp); //raise exponent + xPSUB.Q(xRegisterSSE(reg), ptr[&s_const.dbl_one_exp]); //lower exponent + xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg)); //convert + xPADD.D(xRegisterSSE(reg), ptr[s_const.one_exp]); //raise exponent u8 *end2 = JMP8(0); x86SetJ8(to_overflow); - SSE2_CVTSD2SS_XMM_to_XMM(reg, reg); - SSE_ORPS_M128_to_XMM(reg, (uptr)&s_const.pos); //clamp + xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg)); + xOR.PS(xRegisterSSE(reg), ptr[&s_const.pos]); //clamp if (flags && FPU_FLAGS_OVERFLOW) - OR32ItoM((uptr)&fpuRegs.fprc[31], (FPUflagO | FPUflagSO)); + xOR(ptr32[&fpuRegs.fprc[31]], (FPUflagO | FPUflagSO)); if (flags && FPU_FLAGS_OVERFLOW && acc) - OR32ItoM((uptr)&fpuRegs.ACCflag, 1); + xOR(ptr32[&fpuRegs.ACCflag], 1); u8 *end3 = JMP8(0); x86SetJ8(to_underflow); u8 *end4; if (flags && FPU_FLAGS_UNDERFLOW) //set underflow flags if not zero { - SSE2_XORPD_XMM_to_XMM(absreg, absreg); - SSE2_UCOMISD_XMM_to_XMM(reg, absreg); + xXOR.PD(xRegisterSSE(absreg), xRegisterSSE(absreg)); + xUCOMI.SD(xRegisterSSE(reg), xRegisterSSE(absreg)); u8 *is_zero = JE8(0); - OR32ItoM((uptr)&fpuRegs.fprc[31], (FPUflagU | FPUflagSU)); + xOR(ptr32[&fpuRegs.fprc[31]], (FPUflagU | FPUflagSU)); if (addsub) { //On ADD/SUB, the PS2 simply leaves the mantissa bits as they are (after normalization) //IEEE either clears them (FtZ) or returns the denormalized result. //not thoroughly tested : other operations such as MUL and DIV seem to clear all mantissa bits? - SSE_MOVAPS_XMM_to_XMM(absreg, reg); - SSE2_PSLLQ_I8_to_XMM(reg, 12); //mantissa bits - SSE2_PSRLQ_I8_to_XMM(reg, 41); - SSE2_PSRLQ_I8_to_XMM(absreg, 63); //sign bit - SSE2_PSLLQ_I8_to_XMM(absreg, 31); - SSE2_POR_XMM_to_XMM(reg, absreg); + xMOVAPS(xRegisterSSE(absreg), xRegisterSSE(reg)); + xPSLL.Q(xRegisterSSE(reg), 12); //mantissa bits + xPSRL.Q(xRegisterSSE(reg), 41); + xPSRL.Q(xRegisterSSE(absreg), 63); //sign bit + xPSLL.Q(xRegisterSSE(absreg), 31); + xPOR(xRegisterSSE(reg), xRegisterSSE(absreg)); end4 = JMP8(0); } x86SetJ8(is_zero); } - SSE2_CVTSD2SS_XMM_to_XMM(reg, reg); - SSE_ANDPS_M128_to_XMM(reg, (uptr)s_const.neg); //flush to zero + xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg)); + xAND.PS(xRegisterSSE(reg), ptr[s_const.neg]); //flush to zero x86SetJ8(end); x86SetJ8(end2); @@ -277,9 +277,9 @@ void ToPS2FPU(int reg, bool flags, int absreg, bool acc, bool addsub = false) ToPS2FPU_Full(reg, flags, absreg, acc, addsub); else { - SSE2_CVTSD2SS_XMM_to_XMM(reg, reg); //clamp - SSE_MINSS_M32_to_XMM(reg, (uptr)&g_maxvals[0]); - SSE_MAXSS_M32_to_XMM(reg, (uptr)&g_minvals[0]); + xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg)); //clamp + xMIN.SS(xRegisterSSE(reg), ptr[&g_maxvals[0]]); + xMAX.SS(xRegisterSSE(reg), ptr[&g_minvals[0]]); } } @@ -287,33 +287,33 @@ void ToPS2FPU(int reg, bool flags, int absreg, bool acc, bool addsub = false) void SetMaxValue(int regd) { if (FPU_RESULT) - SSE_ORPS_M128_to_XMM(regd, (uptr)&s_const.pos[0]); // set regd to maximum + xOR.PS(xRegisterSSE(regd), ptr[&s_const.pos[0]]); // set regd to maximum else { - SSE_ANDPS_M128_to_XMM(regd, (uptr)&s_const.neg[0]); // Get the sign bit - SSE_ORPS_M128_to_XMM(regd, (uptr)&g_maxvals[0]); // regd = +/- Maximum (CLAMP)! + xAND.PS(xRegisterSSE(regd), ptr[&s_const.neg[0]]); // Get the sign bit + xOR.PS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); // regd = +/- Maximum (CLAMP)! } } #define GET_S(sreg) { \ - if( info & PROCESS_EE_S ) SSE_MOVSS_XMM_to_XMM(sreg, EEREC_S); \ - else SSE_MOVSS_M32_to_XMM(sreg, (uptr)&fpuRegs.fpr[_Fs_]); } + if( info & PROCESS_EE_S ) xMOVSS(xRegisterSSE(sreg), xRegisterSSE(EEREC_S)); \ + else xMOVSSZX(xRegisterSSE(sreg), ptr[&fpuRegs.fpr[_Fs_]]); } #define ALLOC_S(sreg) { sreg = _allocTempXMMreg(XMMT_FPS, -1); GET_S(sreg); } #define GET_T(treg) { \ - if( info & PROCESS_EE_T ) SSE_MOVSS_XMM_to_XMM(treg, EEREC_T); \ - else SSE_MOVSS_M32_to_XMM(treg, (uptr)&fpuRegs.fpr[_Ft_]); } + if( info & PROCESS_EE_T ) xMOVSS(xRegisterSSE(treg), xRegisterSSE(EEREC_T)); \ + else xMOVSSZX(xRegisterSSE(treg), ptr[&fpuRegs.fpr[_Ft_]]); } #define ALLOC_T(treg) { treg = _allocTempXMMreg(XMMT_FPS, -1); GET_T(treg); } #define GET_ACC(areg) { \ - if( info & PROCESS_EE_ACC ) SSE_MOVSS_XMM_to_XMM(areg, EEREC_ACC); \ - else SSE_MOVSS_M32_to_XMM(areg, (uptr)&fpuRegs.ACC); } + if( info & PROCESS_EE_ACC ) xMOVSS(xRegisterSSE(areg), xRegisterSSE(EEREC_ACC)); \ + else xMOVSSZX(xRegisterSSE(areg), ptr[&fpuRegs.ACC]); } #define ALLOC_ACC(areg) { areg = _allocTempXMMreg(XMMT_FPS, -1); GET_ACC(areg); } -#define CLEAR_OU_FLAGS { AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO | FPUflagU)); } +#define CLEAR_OU_FLAGS { xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO | FPUflagU)); } //------------------------------------------------------------------ @@ -325,7 +325,7 @@ void recABS_S_xmm(int info) CLEAR_OU_FLAGS; - SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)s_const.pos); + xAND.PS(xRegisterSSE(EEREC_D), ptr[s_const.pos]); } FPURECOMPILE_CONSTCODE(ABS_S, XMMINFO_WRITED|XMMINFO_READS); @@ -351,50 +351,50 @@ void FPU_ADD_SUB(int tempd, int tempt) //tempd and tempt are overwritten, they a if (tempecx != ECX) { Console.Error("FPU: ADD/SUB Allocation Error!"); tempecx = ECX;} if (temp2 == -1) { Console.Error("FPU: ADD/SUB Allocation Error!"); temp2 = EAX;} - SSE2_MOVD_XMM_to_R(tempecx, tempd); - SSE2_MOVD_XMM_to_R(temp2, tempt); + xMOVD(xRegister32(tempecx), xRegisterSSE(tempd)); + xMOVD(xRegister32(temp2), xRegisterSSE(tempt)); //mask the exponents - SHR32ItoR(tempecx, 23); - SHR32ItoR(temp2, 23); - AND32ItoR(tempecx, 0xff); - AND32ItoR(temp2, 0xff); + xSHR(xRegister32(tempecx), 23); + xSHR(xRegister32(temp2), 23); + xAND(xRegister32(tempecx), 0xff); + xAND(xRegister32(temp2), 0xff); - SUB32RtoR(tempecx, temp2); //tempecx = exponent difference - CMP32ItoR(tempecx, 25); + xSUB(xRegister32(tempecx), xRegister32(temp2)); //tempecx = exponent difference + xCMP(xRegister32(tempecx), 25); j8Ptr[0] = JGE8(0); - CMP32ItoR(tempecx, 0); + xCMP(xRegister32(tempecx), 0); j8Ptr[1] = JG8(0); j8Ptr[2] = JE8(0); - CMP32ItoR(tempecx, -25); + xCMP(xRegister32(tempecx), -25); j8Ptr[3] = JLE8(0); //diff = -24 .. -1 , expd < expt - NEG32R(tempecx); - DEC32R(tempecx); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); //temp2 = 0xffffffff << tempecx - SSE2_MOVD_R_to_XMM(xmmtemp, temp2); - SSE_ANDPS_XMM_to_XMM(tempd, xmmtemp); + xNEG(xRegister32(tempecx)); + xDEC(xRegister32(tempecx)); + xMOV(xRegister32(temp2), 0xffffffff); + xSHL(xRegister32(temp2), cl); //temp2 = 0xffffffff << tempecx + xMOVDZX(xRegisterSSE(xmmtemp), xRegister32(temp2)); + xAND.PS(xRegisterSSE(tempd), xRegisterSSE(xmmtemp)); j8Ptr[4] = JMP8(0); x86SetJ8(j8Ptr[0]); //diff = 25 .. 255 , expt < expd - SSE_ANDPS_M128_to_XMM(tempt, (uptr)s_const.neg); + xAND.PS(xRegisterSSE(tempt), ptr[s_const.neg]); j8Ptr[5] = JMP8(0); x86SetJ8(j8Ptr[1]); //diff = 1 .. 24, expt < expd - DEC32R(tempecx); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); //temp2 = 0xffffffff << tempecx - SSE2_MOVD_R_to_XMM(xmmtemp, temp2); - SSE_ANDPS_XMM_to_XMM(tempt, xmmtemp); + xDEC(xRegister32(tempecx)); + xMOV(xRegister32(temp2), 0xffffffff); + xSHL(xRegister32(temp2), cl); //temp2 = 0xffffffff << tempecx + xMOVDZX(xRegisterSSE(xmmtemp), xRegister32(temp2)); + xAND.PS(xRegisterSSE(tempt), xRegisterSSE(xmmtemp)); j8Ptr[6] = JMP8(0); x86SetJ8(j8Ptr[3]); //diff = -255 .. -25, expd < expt - SSE_ANDPS_M128_to_XMM(tempd, (uptr)s_const.neg); + xAND.PS(xRegisterSSE(tempd), ptr[s_const.neg]); j8Ptr[7] = JMP8(0); x86SetJ8(j8Ptr[2]); @@ -417,20 +417,20 @@ void FPU_MUL(int info, int regd, int sreg, int treg, bool acc) if (CHECK_FPUMULHACK) { - SSE2_MOVD_XMM_to_R(ECX, sreg); - SSE2_MOVD_XMM_to_R(EDX, treg); - CALLFunc( (uptr)&FPU_MUL_HACK ); //returns the hacked result or 0 - TEST32RtoR(EAX, EAX); + xMOVD(ecx, xRegisterSSE(sreg)); + xMOVD(edx, xRegisterSSE(treg)); + xCALL((void*)(uptr)&FPU_MUL_HACK ); //returns the hacked result or 0 + xTEST(eax, eax); noHack = JZ8(0); - SSE2_MOVD_R_to_XMM(regd, EAX); + xMOVDZX(xRegisterSSE(regd), eax); endMul = JMP32(0); x86SetJ8(noHack); } ToDouble(sreg); ToDouble(treg); - SSE2_MULSD_XMM_to_XMM(sreg, treg); + xMUL.SD(xRegisterSSE(sreg), xRegisterSSE(treg)); ToPS2FPU(sreg, true, treg, acc); - SSE_MOVSS_XMM_to_XMM(regd, sreg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(sreg)); if (CHECK_FPUMULHACK) x86SetJ32(endMul); @@ -455,7 +455,7 @@ void recFPUOp(int info, int regd, int op, bool acc) recFPUOpXMM_to_XMM[op](sreg, treg); ToPS2FPU(sreg, true, treg, acc, true); - SSE_MOVSS_XMM_to_XMM(regd, sreg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(sreg)); _freeXMMreg(sreg); _freeXMMreg(treg); } @@ -486,7 +486,7 @@ void recCMP(int info) ALLOC_S(sreg); ALLOC_T(treg); ToDouble(sreg); ToDouble(treg); - SSE2_UCOMISD_XMM_to_XMM(sreg, treg); + xUCOMI.SD(xRegisterSSE(sreg), xRegisterSSE(treg)); _freeXMMreg(sreg); _freeXMMreg(treg); } @@ -499,10 +499,10 @@ void recC_EQ_xmm(int info) recCMP(info); j8Ptr[0] = JZ8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); } @@ -513,10 +513,10 @@ void recC_LE_xmm(int info ) recCMP(info); j8Ptr[0] = JBE8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); } @@ -527,10 +527,10 @@ void recC_LT_xmm(int info) recCMP(info); j8Ptr[0] = JB8(0); - AND32ItoM( (uptr)&fpuRegs.fprc[31], ~FPUflagC ); + xAND(ptr32[&fpuRegs.fprc[31]], ~FPUflagC ); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagC); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagC); x86SetJ8(j8Ptr[1]); } @@ -544,10 +544,10 @@ FPURECOMPILE_CONSTCODE(C_LT, XMMINFO_READS|XMMINFO_READT); void recCVT_S_xmm(int info) { if( !(info&PROCESS_EE_S) || (EEREC_D != EEREC_S && !(info&PROCESS_EE_MODEWRITES)) ) { - SSE_CVTSI2SS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); + xCVTSI2SS(xRegisterSSE(EEREC_D), ptr32[&fpuRegs.fpr[_Fs_]]); } else { - SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_D, EEREC_S); + xCVTDQ2PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } @@ -559,27 +559,27 @@ void recCVT_W() //called from iFPU.cpp's recCVT_W if( regs >= 0 ) { - SSE_CVTTSS2SI_XMM_to_R32(EAX, regs); - SSE_MOVMSKPS_XMM_to_R32(EDX, regs); //extract the signs - AND32ItoR(EDX,1); //keep only LSB + xCVTTSS2SI(eax, xRegisterSSE(regs)); + xMOVMSKPS(edx, xRegisterSSE(regs)); //extract the signs + xAND(edx, 1); //keep only LSB } else { - SSE_CVTTSS2SI_M32_to_R32(EAX, (uptr)&fpuRegs.fpr[ _Fs_ ]); - MOV32MtoR(EDX, (uptr)&fpuRegs.fpr[ _Fs_ ]); - SHR32ItoR(EDX, 31); //mov sign to lsb + xCVTTSS2SI(eax, ptr32[&fpuRegs.fpr[ _Fs_ ]]); + xMOV(edx, ptr[&fpuRegs.fpr[ _Fs_ ]]); + xSHR(edx, 31); //mov sign to lsb } //kill register allocation for dst because we write directly to fpuRegs.fpr[_Fd_] _deleteFPtoXMMreg(_Fd_, 2); - ADD32ItoR(EDX, 0x7FFFFFFF); //0x7FFFFFFF if positive, 0x8000 0000 if negative + xADD(edx, 0x7FFFFFFF); //0x7FFFFFFF if positive, 0x8000 0000 if negative - CMP32ItoR(EAX, 0x80000000); //If the result is indefinitive - CMOVE32RtoR(EAX, EDX); //Saturate it + xCMP(eax, 0x80000000); //If the result is indefinitive + xCMOVE(eax, edx); //Saturate it //Write the result - MOV32RtoM((uptr)&fpuRegs.fpr[_Fd_], EAX); + xMOV(ptr[&fpuRegs.fpr[_Fd_]], eax); } //------------------------------------------------------------------ @@ -596,29 +596,29 @@ void recDIVhelper1(int regd, int regt) // Sets flags if (t1reg == -1) {Console.Error("FPU: DIV Allocation Error!"); return;} if (tempReg == -1) {Console.Error("FPU: DIV Allocation Error!"); tempReg = EAX;} - AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags + xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags //--- Check for divide by zero --- - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regt); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regt == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(regt)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if regt == zero, sign will be set) ajmp32 = JZ32(0); //Skip if not set //--- Check for 0/0 --- - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regd); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regd == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(regd)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if regd == zero, sign will be set) pjmp1 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) pjmp2 = JMP8(0); x86SetJ8(pjmp1); //x/0 but not 0/0 - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) x86SetJ8(pjmp2); //--- Make regd +/- Maximum --- - SSE_XORPS_XMM_to_XMM(regd, regt); // Make regd Positive or Negative + xXOR.PS(xRegisterSSE(regd), xRegisterSSE(regt)); // Make regd Positive or Negative SetMaxValue(regd); //clamp to max bjmp32 = JMP32(0); @@ -627,7 +627,7 @@ void recDIVhelper1(int regd, int regt) // Sets flags //--- Normal Divide --- ToDouble(regd); ToDouble(regt); - SSE2_DIVSD_XMM_to_XMM(regd, regt); + xDIV.SD(xRegisterSSE(regd), xRegisterSSE(regt)); ToPS2FPU(regd, false, regt, false); @@ -641,7 +641,7 @@ void recDIVhelper2(int regd, int regt) // Doesn't sets flags { ToDouble(regd); ToDouble(regt); - SSE2_DIVSD_XMM_to_XMM(regd, regt); + xDIV.SD(xRegisterSSE(regd), xRegisterSSE(regt)); ToPS2FPU(regd, false, regt, false); } @@ -690,7 +690,7 @@ void recDIV_S_xmm(int info) else recDIVhelper2(sreg, treg); - SSE_MOVSS_XMM_to_XMM(EEREC_D, sreg); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(sreg)); if (roundmodeFlag) xLDMXCSR (g_sseMXCSR); _freeXMMreg(sreg); _freeXMMreg(treg); @@ -724,41 +724,41 @@ void recMaddsub(int info, int regd, int op, bool acc) // TEST FOR ACC/MUL OVERFLOWS, PROPOGATE THEM IF THEY OCCUR - TEST32ItoM((uptr)&fpuRegs.fprc[31], FPUflagO); + xTEST(ptr32[&fpuRegs.fprc[31]], FPUflagO); u8 *mulovf = JNZ8(0); ToDouble(sreg); //else, convert - TEST32ItoM((uptr)&fpuRegs.ACCflag, 1); + xTEST(ptr32[&fpuRegs.ACCflag], 1); u8 *accovf = JNZ8(0); ToDouble(treg); //else, convert u8 *operation = JMP8(0); x86SetJ8(mulovf); if (op == 1) //sub - SSE_XORPS_M128_to_XMM(sreg, (uptr)s_const.neg); - SSE_MOVAPS_XMM_to_XMM(treg, sreg); //fall through below + xXOR.PS(xRegisterSSE(sreg), ptr[s_const.neg]); + xMOVAPS(xRegisterSSE(treg), xRegisterSSE(sreg)); //fall through below x86SetJ8(accovf); SetMaxValue(treg); //just in case... I think it has to be a MaxValue already here CLEAR_OU_FLAGS; //clear U flag if (FPU_FLAGS_OVERFLOW) - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagO | FPUflagSO); + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagO | FPUflagSO); if (FPU_FLAGS_OVERFLOW && acc) - OR32ItoM((uptr)&fpuRegs.ACCflag, 1); + xOR(ptr32[&fpuRegs.ACCflag], 1); u32 *skipall = JMP32(0); // PERFORM THE ACCUMULATION AND TEST RESULT. CONVERT TO SINGLE x86SetJ8(operation); if (op == 1) - SSE2_SUBSD_XMM_to_XMM(treg, sreg); + xSUB.SD(xRegisterSSE(treg), xRegisterSSE(sreg)); else - SSE2_ADDSD_XMM_to_XMM(treg, sreg); + xADD.SD(xRegisterSSE(treg), xRegisterSSE(sreg)); ToPS2FPU(treg, true, sreg, acc, true); x86SetJ32(skipall); - SSE_MOVSS_XMM_to_XMM(regd, treg); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(treg)); _freeXMMreg(sreg); _freeXMMreg(treg); } @@ -796,18 +796,18 @@ void recMINMAX(int info, bool ismin) CLEAR_OU_FLAGS; - SSE2_PSHUFD_XMM_to_XMM(sreg, sreg, 0x00); - SSE2_PAND_M128_to_XMM(sreg, (uptr)minmax_mask); - SSE2_POR_M128_to_XMM(sreg, (uptr)&minmax_mask[4]); - SSE2_PSHUFD_XMM_to_XMM(treg, treg, 0x00); - SSE2_PAND_M128_to_XMM(treg, (uptr)minmax_mask); - SSE2_POR_M128_to_XMM(treg, (uptr)&minmax_mask[4]); + xPSHUF.D(xRegisterSSE(sreg), xRegisterSSE(sreg), 0x00); + xPAND(xRegisterSSE(sreg), ptr[minmax_mask]); + xPOR(xRegisterSSE(sreg), ptr[&minmax_mask[4]]); + xPSHUF.D(xRegisterSSE(treg), xRegisterSSE(treg), 0x00); + xPAND(xRegisterSSE(treg), ptr[minmax_mask]); + xPOR(xRegisterSSE(treg), ptr[&minmax_mask[4]]); if (ismin) - SSE2_MINSD_XMM_to_XMM(sreg, treg); + xMIN.SD(xRegisterSSE(sreg), xRegisterSSE(treg)); else - SSE2_MAXSD_XMM_to_XMM(sreg, treg); + xMAX.SD(xRegisterSSE(sreg), xRegisterSSE(treg)); - SSE_MOVSS_XMM_to_XMM(EEREC_D, sreg); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(sreg)); _freeXMMreg(sreg); _freeXMMreg(treg); } @@ -895,7 +895,7 @@ void recNEG_S_xmm(int info) { CLEAR_OU_FLAGS; - SSE_XORPS_M128_to_XMM(EEREC_D, (uptr)&s_const.neg[0]); + xXOR.PS(xRegisterSSE(EEREC_D), ptr[&s_const.neg[0]]); } FPURECOMPILE_CONSTCODE(NEG_S, XMMINFO_WRITED|XMMINFO_READS); @@ -949,25 +949,25 @@ void recSQRT_S_xmm(int info) GET_T(EEREC_D); if (FPU_FLAGS_ID) { - AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags + xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags //--- Check for negative SQRT --- (sqrt(-0) = 0, unlike what the docs say) - SSE_MOVMSKPS_XMM_to_R32(tempReg, EEREC_D); - AND32ItoR(tempReg, 1); //Check sign + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(EEREC_D)); + xAND(xRegister32(tempReg), 1); //Check sign pjmp = JZ8(0); //Skip if none are - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags - SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_const.pos[0]); // Make EEREC_D Positive + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags + xAND.PS(xRegisterSSE(EEREC_D), ptr[&s_const.pos[0]]); // Make EEREC_D Positive x86SetJ8(pjmp); } else { - SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_const.pos[0]); // Make EEREC_D Positive + xAND.PS(xRegisterSSE(EEREC_D), ptr[&s_const.pos[0]]); // Make EEREC_D Positive } ToDouble(EEREC_D); - SSE2_SQRTSD_XMM_to_XMM(EEREC_D, EEREC_D); + xSQRT.SD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); ToPS2FPU(EEREC_D, false, t1reg, false); @@ -996,33 +996,33 @@ void recRSQRThelper1(int regd, int regt) // Preforms the RSQRT function when reg if (t1reg == -1) {Console.Error("FPU: RSQRT Allocation Error!"); return;} if (tempReg == -1) {Console.Error("FPU: RSQRT Allocation Error!"); tempReg = EAX;} - AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags + xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags //--- (first) Check for negative SQRT --- - SSE_MOVMSKPS_XMM_to_R32(tempReg, regt); - AND32ItoR(tempReg, 1); //Check sign + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(regt)); + xAND(xRegister32(tempReg), 1); //Check sign pjmp2 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags - SSE_ANDPS_M128_to_XMM(regt, (uptr)&s_const.pos[0]); // Make regt Positive + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags + xAND.PS(xRegisterSSE(regt), ptr[&s_const.pos[0]]); // Make regt Positive x86SetJ8(pjmp2); //--- Check for zero --- - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regt); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regt == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(regt)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if regt == zero, sign will be set) pjmp1 = JZ8(0); //Skip if not set //--- Check for 0/0 --- - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regd); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regd == zero, sign will be set) + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(regd)); + xMOVMSKPS(xRegister32(tempReg), xRegisterSSE(t1reg)); + xAND(xRegister32(tempReg), 1); //Check sign (if regd == zero, sign will be set) qjmp1 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) qjmp2 = JMP8(0); x86SetJ8(qjmp1); //x/0 but not 0/0 - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) + xOR(ptr32[&fpuRegs.fprc[31]], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) x86SetJ8(qjmp2); SetMaxValue(regd); //clamp to max @@ -1031,8 +1031,8 @@ void recRSQRThelper1(int regd, int regt) // Preforms the RSQRT function when reg ToDouble(regt); ToDouble(regd); - SSE2_SQRTSD_XMM_to_XMM(regt, regt); - SSE2_DIVSD_XMM_to_XMM(regd, regt); + xSQRT.SD(xRegisterSSE(regt), xRegisterSSE(regt)); + xDIV.SD(xRegisterSSE(regd), xRegisterSSE(regt)); ToPS2FPU(regd, false, regt, false); x86SetJ32(pjmp32); @@ -1043,12 +1043,12 @@ void recRSQRThelper1(int regd, int regt) // Preforms the RSQRT function when reg void recRSQRThelper2(int regd, int regt) // Preforms the RSQRT function when regd <- Fs and regt <- Ft (Doesn't set flags) { - SSE_ANDPS_M128_to_XMM(regt, (uptr)&s_const.pos[0]); // Make regt Positive + xAND.PS(xRegisterSSE(regt), ptr[&s_const.pos[0]]); // Make regt Positive ToDouble(regt); ToDouble(regd); - SSE2_SQRTSD_XMM_to_XMM(regt, regt); - SSE2_DIVSD_XMM_to_XMM(regd, regt); + xSQRT.SD(xRegisterSSE(regt), xRegisterSSE(regt)); + xDIV.SD(xRegisterSSE(regd), xRegisterSSE(regt)); ToPS2FPU(regd, false, regt, false); } @@ -1079,7 +1079,7 @@ void recRSQRT_S_xmm(int info) else recRSQRThelper2(sreg, treg); - SSE_MOVSS_XMM_to_XMM(EEREC_D, sreg); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(sreg)); _freeXMMreg(treg); _freeXMMreg(sreg); diff --git a/pcsx2/x86/iMMI.cpp b/pcsx2/x86/iMMI.cpp index be5eae38e1..7822ef7e03 100644 --- a/pcsx2/x86/iMMI.cpp +++ b/pcsx2/x86/iMMI.cpp @@ -77,15 +77,15 @@ void recPLZCW() _eeOnWriteReg(_Rd_, 0); if( (regs = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) { - SSE2_MOVD_XMM_to_R(EAX, regs); + xMOVD(eax, xRegisterSSE(regs)); isXMMreg = true; } else if( (regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) { - MOVD32MMXtoR(EAX, regs); + xMOVD(eax, xRegisterMMX(regs)); SetMMXstate(); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); } _deleteEEreg(_Rd_, 0); @@ -100,52 +100,52 @@ void recPLZCW() // --- first word --- - MOV32ItoR(ECX,31); - TEST32RtoR(EAX, EAX); // TEST sets the sign flag accordingly. + xMOV(ecx, 31); + xTEST(eax, eax); // TEST sets the sign flag accordingly. u8* label_notSigned = JNS8(0); - NOT32R(EAX); + xNOT(eax); x86SetJ8(label_notSigned); - BSRRtoR(EAX, EAX); + xBSR(eax, eax); u8* label_Zeroed = JZ8(0); // If BSR sets the ZF, eax is "trash" - SUB32RtoR(ECX, EAX); - DEC32R(ECX); // PS2 doesn't count the first bit + xSUB(ecx, eax); + xDEC(ecx); // PS2 doesn't count the first bit x86SetJ8(label_Zeroed); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], ECX); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], ecx); // second word if( regs >= 0) { // Check if it was an XMM reg or MMX reg if (isXMMreg) { - SSE2_PSHUFD_XMM_to_XMM(regs&0xf, regs&0xf, 0xe1); - SSE2_MOVD_XMM_to_R(EAX, regs&0xf); - SSE2_PSHUFD_XMM_to_XMM(regs&0xf, regs&0xf, 0xe1); + xPSHUF.D(xRegisterSSE(regs&0xf), xRegisterSSE(regs&0xf), 0xe1); + xMOVD(eax, xRegisterSSE(regs&0xf)); + xPSHUF.D(xRegisterSSE(regs&0xf), xRegisterSSE(regs&0xf), 0xe1); } else { - PSHUFWRtoR(regs&0xf, regs&0xf, 0x4e); - MOVD32MMXtoR(EAX, regs&0xf); - PSHUFWRtoR(regs&0xf, regs&0xf, 0x4e); + xPSHUF.W(xRegisterMMX(regs&0xf), xRegisterMMX(regs&0xf), 0x4e); + xMOVD(eax, xRegisterMMX(regs&0xf)); + xPSHUF.W(xRegisterMMX(regs&0xf), xRegisterMMX(regs&0xf), 0x4e); SetMMXstate(); } } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]); } - MOV32ItoR(ECX, 31); - TEST32RtoR(EAX, EAX); // TEST sets the sign flag accordingly. + xMOV(ecx, 31); + xTEST(eax, eax); // TEST sets the sign flag accordingly. label_notSigned = JNS8(0); - NOT32R(EAX); + xNOT(eax); x86SetJ8(label_notSigned); - BSRRtoR(EAX, EAX); + xBSR(eax, eax); label_Zeroed = JZ8(0); // If BSR sets the ZF, eax is "trash" - SUB32RtoR(ECX, EAX); - DEC32R(ECX); // PS2 doesn't count the first bit + xSUB(ecx, eax); + xDEC(ecx); // PS2 doesn't count the first bit x86SetJ8(label_Zeroed); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], ECX); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], ecx); GPR_DEL_CONST(_Rd_); } @@ -162,18 +162,18 @@ void recPMFHL() case 0x00: // LW t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_LO, 0x88); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO), 0x88); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); break; case 0x01: // UW t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_HI, 0xdd); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_LO, 0xdd); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI), 0xdd); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO), 0xdd); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); break; @@ -181,32 +181,32 @@ void recPMFHL() // fall to interp _deleteEEreg(_Rd_, 0); iFlushCall(FLUSH_INTERPRETER); // since calling CALLFunc - CALLFunc( (uptr)R5900::Interpreter::OpcodeImpl::MMI::PMFHL ); + xCALL((void*)(uptr)R5900::Interpreter::OpcodeImpl::MMI::PMFHL ); break; case 0x03: // LH t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFLW_XMM_to_XMM(t0reg, EEREC_HI, 0x88); - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_LO, 0x88); - SSE2_PSHUFHW_XMM_to_XMM(t0reg, t0reg, 0x88); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0x88); - SSE2_PSRLDQ_I8_to_XMM(t0reg, 4); - SSE2_PSRLDQ_I8_to_XMM(EEREC_D, 4); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.LW(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO), 0x88); + xPSHUF.HW(xRegisterSSE(t0reg), xRegisterSSE(t0reg), 0x88); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x88); + xPSRL.DQ(xRegisterSSE(t0reg), 4); + xPSRL.DQ(xRegisterSSE(EEREC_D), 4); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); break; case 0x04: // SH if( EEREC_D == EEREC_HI ) { - SSE2_PACKSSDW_XMM_to_XMM(EEREC_D, EEREC_LO); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_D, 0x72); + xPACK.SSDW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO)); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x72); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_LO); - SSE2_PACKSSDW_XMM_to_XMM(EEREC_D, EEREC_HI); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO)); + xPACK.SSDW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_HI)); // shuffle so a1a0b1b0->a1b1a0b0 - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_D, 0xd8); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0xd8); } break; default: @@ -224,15 +224,15 @@ void recPMTHL() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READLO|XMMINFO_READHI|XMMINFO_WRITELO|XMMINFO_WRITEHI ); if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE4_BLENDPS_XMM_to_XMM(EEREC_LO, EEREC_S, 0x5); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_S, 0xdd); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_HI, 0x72); + xBLEND.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_S), 0x5); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S), 0xdd); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0x72); } else { - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_S, 0x8d); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_S, 0xdd); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_LO, 0x72); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_HI, 0x72); + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_S), 0x8d); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S), 0xdd); + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO), 0x72); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0x72); } _clearNeededXMMregs(); @@ -286,11 +286,11 @@ void recPSRLH() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); if( (_Sa_&0xf) == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLW_I8_to_XMM(EEREC_D,_Sa_&0xf ); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.W(xRegisterSSE(EEREC_D), _Sa_&0xf ); } _clearNeededXMMregs(); } @@ -302,11 +302,11 @@ void recPSRLW() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); if( _Sa_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLD_I8_to_XMM(EEREC_D,_Sa_ ); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.D(xRegisterSSE(EEREC_D), _Sa_ ); } _clearNeededXMMregs(); } @@ -318,11 +318,11 @@ void recPSRAH() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); if( (_Sa_&0xf) == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRAW_I8_to_XMM(EEREC_D,_Sa_&0xf ); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRA.W(xRegisterSSE(EEREC_D), _Sa_&0xf ); } _clearNeededXMMregs(); } @@ -334,11 +334,11 @@ void recPSRAW() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); if( _Sa_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRAD_I8_to_XMM(EEREC_D,_Sa_ ); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRA.D(xRegisterSSE(EEREC_D), _Sa_ ); } _clearNeededXMMregs(); } @@ -350,11 +350,11 @@ void recPSLLH() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); if( (_Sa_&0xf) == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSLLW_I8_to_XMM(EEREC_D,_Sa_&0xf ); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSLL.W(xRegisterSSE(EEREC_D), _Sa_&0xf ); } _clearNeededXMMregs(); } @@ -366,11 +366,11 @@ void recPSLLW() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); if( _Sa_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSLLD_I8_to_XMM(EEREC_D,_Sa_ ); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSLL.D(xRegisterSSE(EEREC_D), _Sa_ ); } _clearNeededXMMregs(); } @@ -436,44 +436,44 @@ void recPMAXW() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); if ( x86caps.hasStreamingSIMD4Extensions ) { - if( EEREC_S == EEREC_T ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - else if( EEREC_D == EEREC_S ) SSE4_PMAXSD_XMM_to_XMM(EEREC_D, EEREC_T); - else if ( EEREC_D == EEREC_T ) SSE4_PMAXSD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_S == EEREC_T ) xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + else if( EEREC_D == EEREC_S ) xPMAX.SD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if ( EEREC_D == EEREC_T ) xPMAX.SD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE4_PMAXSD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMAX.SD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { int t0reg; if( EEREC_S == EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PCMPGTD_XMM_to_XMM(t0reg, EEREC_T); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPCMP.GTD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); if( EEREC_D == EEREC_S ) { - SSEX_PAND_XMM_to_XMM(EEREC_D, t0reg); - SSEX_PANDN_XMM_to_XMM(t0reg, EEREC_T); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); } else if( EEREC_D == EEREC_T ) { int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSEX_PAND_XMM_to_XMM(EEREC_D, t0reg); - SSEX_PANDN_XMM_to_XMM(t0reg, t1reg); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); _freeXMMreg(t1reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSEX_PAND_XMM_to_XMM(EEREC_D, t0reg); - SSEX_PANDN_XMM_to_XMM(t0reg, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); } - SSEX_POR_XMM_to_XMM(EEREC_D, t0reg); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } } @@ -488,21 +488,21 @@ void recPPACW() int info = eeRecompileCodeXMM( ((_Rs_!=0)?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSE2_PSRLDQ_I8_to_XMM(EEREC_D, 8); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xPSRL.DQ(xRegisterSSE(EEREC_D), 8); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); if( EEREC_D == EEREC_T ) { - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_S, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSE2_PUNPCKLQDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xPUNPCK.LQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_T, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_S, 0x88); - SSE2_PUNPCKLQDQ_XMM_to_XMM(t0reg, EEREC_D); + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S), 0x88); + xPUNPCK.LQDQ(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); // swap mmx regs.. don't ask xmmregs[t0reg] = xmmregs[EEREC_D]; @@ -519,21 +519,21 @@ void recPPACH() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0x88); - SSE2_PSLLDQ_I8_to_XMM(EEREC_D, 4); - SSE2_PSRLDQ_I8_to_XMM(EEREC_D, 8); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x88); + xPSLL.DQ(xRegisterSSE(EEREC_D), 4); + xPSRL.DQ(xRegisterSSE(EEREC_D), 8); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFLW_XMM_to_XMM(t0reg, EEREC_S, 0x88); - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSE2_PSHUFHW_XMM_to_XMM(t0reg, t0reg, 0x88); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0x88); + xPSHUF.LW(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S), 0x88); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xPSHUF.HW(xRegisterSSE(t0reg), xRegisterSSE(t0reg), 0x88); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x88); - SSE2_PSRLDQ_I8_to_XMM(t0reg, 4); - SSE2_PSRLDQ_I8_to_XMM(EEREC_D, 4); - SSE2_PUNPCKLQDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSRL.DQ(xRegisterSSE(t0reg), 4); + xPSRL.DQ(xRegisterSSE(EEREC_D), 4); + xPUNPCK.LQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } @@ -549,32 +549,32 @@ void recPPACB() if( _Rs_ == 0 ) { if( _hasFreeXMMreg() ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSLLW_I8_to_XMM(EEREC_D, 8); - SSEX_PXOR_XMM_to_XMM(t0reg, t0reg); - SSE2_PSRLW_I8_to_XMM(EEREC_D, 8); - SSE2_PACKUSWB_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSLL.W(xRegisterSSE(EEREC_D), 8); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSRL.W(xRegisterSSE(EEREC_D), 8); + xPACK.USWB(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSLLW_I8_to_XMM(EEREC_D, 8); - SSE2_PSRLW_I8_to_XMM(EEREC_D, 8); - SSE2_PACKUSWB_XMM_to_XMM(EEREC_D, EEREC_D); - SSE2_PSRLDQ_I8_to_XMM(EEREC_D, 8); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSLL.W(xRegisterSSE(EEREC_D), 8); + xPSRL.W(xRegisterSSE(EEREC_D), 8); + xPACK.USWB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + xPSRL.DQ(xRegisterSSE(EEREC_D), 8); } } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSLLW_I8_to_XMM(t0reg, 8); - SSE2_PSLLW_I8_to_XMM(EEREC_D, 8); - SSE2_PSRLW_I8_to_XMM(t0reg, 8); - SSE2_PSRLW_I8_to_XMM(EEREC_D, 8); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSLL.W(xRegisterSSE(t0reg), 8); + xPSLL.W(xRegisterSSE(EEREC_D), 8); + xPSRL.W(xRegisterSSE(t0reg), 8); + xPSRL.W(xRegisterSSE(EEREC_D), 8); - SSE2_PACKUSWB_XMM_to_XMM(EEREC_D, t0reg); + xPACK.USWB(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } _clearNeededXMMregs(); @@ -589,27 +589,27 @@ void recPEXT5() int t0reg = _allocTempXMMreg(XMMT_INT, -1); int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); // for bit 5..9 - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); // for bit 15 + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); // for bit 5..9 + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); // for bit 15 - SSE2_PSLLD_I8_to_XMM(t0reg, 22); - SSE2_PSRLW_I8_to_XMM(t1reg, 15); - SSE2_PSRLD_I8_to_XMM(t0reg, 27); - SSE2_PSLLD_I8_to_XMM(t1reg, 20); - SSE2_POR_XMM_to_XMM(t0reg, t1reg); + xPSLL.D(xRegisterSSE(t0reg), 22); + xPSRL.W(xRegisterSSE(t1reg), 15); + xPSRL.D(xRegisterSSE(t0reg), 27); + xPSLL.D(xRegisterSSE(t1reg), 20); + xPOR(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); // for bit 10..14 - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); // for bit 0..4 + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); // for bit 10..14 + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); // for bit 0..4 - SSE2_PSLLD_I8_to_XMM(EEREC_D, 27); - SSE2_PSLLD_I8_to_XMM(t1reg, 17); - SSE2_PSRLD_I8_to_XMM(EEREC_D, 27); - SSE2_PSRLW_I8_to_XMM(t1reg, 11); - SSE2_POR_XMM_to_XMM(EEREC_D, t1reg); + xPSLL.D(xRegisterSSE(EEREC_D), 27); + xPSLL.D(xRegisterSSE(t1reg), 17); + xPSRL.D(xRegisterSSE(EEREC_D), 27); + xPSRL.W(xRegisterSSE(t1reg), 11); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); - SSE2_PSLLW_I8_to_XMM(EEREC_D, 3); - SSE2_PSLLW_I8_to_XMM(t0reg, 11); - SSE2_POR_XMM_to_XMM(EEREC_D, t0reg); + xPSLL.W(xRegisterSSE(EEREC_D), 3); + xPSLL.W(xRegisterSSE(t0reg), 11); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); _freeXMMreg(t1reg); @@ -625,29 +625,29 @@ void recPPAC5() int t0reg = _allocTempXMMreg(XMMT_INT, -1); int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); // for bit 10..14 - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); // for bit 15 + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); // for bit 10..14 + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); // for bit 15 - SSE2_PSLLD_I8_to_XMM(t0reg, 8); - SSE2_PSRLD_I8_to_XMM(t1reg, 31); - SSE2_PSRLD_I8_to_XMM(t0reg, 17); - SSE2_PSLLD_I8_to_XMM(t1reg, 15); - SSE2_POR_XMM_to_XMM(t0reg, t1reg); + xPSLL.D(xRegisterSSE(t0reg), 8); + xPSRL.D(xRegisterSSE(t1reg), 31); + xPSRL.D(xRegisterSSE(t0reg), 17); + xPSLL.D(xRegisterSSE(t1reg), 15); + xPOR(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); // for bit 5..9 - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); // for bit 0..4 + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); // for bit 5..9 + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); // for bit 0..4 - SSE2_PSLLD_I8_to_XMM(EEREC_D, 24); - SSE2_PSRLD_I8_to_XMM(t1reg, 11); - SSE2_PSRLD_I8_to_XMM(EEREC_D, 27); - SSE2_PSLLD_I8_to_XMM(t1reg, 5); - SSE2_POR_XMM_to_XMM(EEREC_D, t1reg); + xPSLL.D(xRegisterSSE(EEREC_D), 24); + xPSRL.D(xRegisterSSE(t1reg), 11); + xPSRL.D(xRegisterSSE(EEREC_D), 27); + xPSLL.D(xRegisterSSE(t1reg), 5); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); - SSE2_PCMPEQD_XMM_to_XMM(t1reg, t1reg); - SSE2_PSRLD_I8_to_XMM(t1reg, 22); - SSE2_PAND_XMM_to_XMM(EEREC_D, t1reg); - SSE2_PANDN_XMM_to_XMM(t1reg, t0reg); - SSE2_POR_XMM_to_XMM(EEREC_D, t1reg); + xPCMP.EQD(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xPSRL.D(xRegisterSSE(t1reg), 22); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xPANDN(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); _freeXMMreg(t0reg); _freeXMMreg(t1reg); @@ -660,11 +660,11 @@ void recPMAXH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PMAXSW_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PMAXSW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPMAX.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPMAX.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PMAXSW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMAX.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -676,14 +676,14 @@ void recPCGTB() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); if( EEREC_D != EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPGTB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.GTB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPGTB_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.GTB(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } _clearNeededXMMregs(); @@ -696,14 +696,14 @@ void recPCGTH() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); if( EEREC_D != EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPGTW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.GTW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPGTW_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.GTW(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } _clearNeededXMMregs(); @@ -717,14 +717,14 @@ void recPCGTW() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); if( EEREC_D != EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPGTD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.GTD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPGTD_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.GTD(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } _clearNeededXMMregs(); @@ -736,11 +736,11 @@ void recPADDSB() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PADDSB_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDSB_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.SB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.SB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDSB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.SB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -751,11 +751,11 @@ void recPADDSH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PADDSW_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDSW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDSW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -777,33 +777,33 @@ void recPADDSW() // if Sign(x) == Sign(y) && Sign(s) != Sign(x) && Sign(x) == 1 then negative overflow (clamp with 0x80000000) // get sign bit - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); // normal addition - if( EEREC_D == EEREC_S ) SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } - SSE2_PXOR_XMM_to_XMM(t0reg, t1reg); // Sign(Rs) != Sign(Rt) - SSE2_PXOR_XMM_to_XMM(t1reg, EEREC_D); // Sign(Rs) != Sign(Rd) - SSE2_PANDN_XMM_to_XMM(t0reg, t1reg); // (Sign(Rs) == Sign(Rt)) & (Sign(Rs) != Sign(Rd)) - SSE2_PSRAD_I8_to_XMM(t0reg, 31); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); // Sign(Rs) != Sign(Rt) + xPXOR(xRegisterSSE(t1reg), xRegisterSSE(EEREC_D)); // Sign(Rs) != Sign(Rd) + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); // (Sign(Rs) == Sign(Rt)) & (Sign(Rs) != Sign(Rd)) + xPSRA.D(xRegisterSSE(t0reg), 31); - SSE2_PCMPEQD_XMM_to_XMM(t1reg, t1reg); - SSE2_PXOR_XMM_to_XMM(t0reg, t1reg); // could've been avoided if Intel wasn't too prudish for a PORN instruction - SSE2_PSLLD_I8_to_XMM(t1reg, 31); // 0x80000000 + xPCMP.EQD(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); // could've been avoided if Intel wasn't too prudish for a PORN instruction + xPSLL.D(xRegisterSSE(t1reg), 31); // 0x80000000 - SSEX_MOVDQA_XMM_to_XMM(t2reg, EEREC_D); - SSE2_PSRAD_I8_to_XMM(t2reg, 31); - SSE2_PXOR_XMM_to_XMM(t1reg, t2reg); // t2reg = (Rd < 0) ? 0x7fffffff : 0x80000000 + xMOVDQA(xRegisterSSE(t2reg), xRegisterSSE(EEREC_D)); + xPSRA.D(xRegisterSSE(t2reg), 31); + xPXOR(xRegisterSSE(t1reg), xRegisterSSE(t2reg)); // t2reg = (Rd < 0) ? 0x7fffffff : 0x80000000 - SSE2_PAND_XMM_to_XMM(EEREC_D, t0reg); - SSE2_PANDN_XMM_to_XMM(t0reg, t1reg); - SSE2_POR_XMM_to_XMM(EEREC_D, t0reg); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); _freeXMMreg(t1reg); @@ -817,17 +817,17 @@ void recPSUBSB() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PSUBSB_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.SB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBSB_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.SB(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBSB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.SB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -838,17 +838,17 @@ void recPSUBSH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PSUBSW_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBSW_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.SW(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBSW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -870,38 +870,38 @@ void recPSUBSW() // if Sign(x) != Sign(y) && Sign(s) != Sign(x) && Sign(x) == 1 then negative overflow (clamp with 0x80000000) // get sign bit - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); - SSE2_PSRLD_I8_to_XMM(t0reg, 31); - SSE2_PSRLD_I8_to_XMM(t1reg, 31); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xPSRL.D(xRegisterSSE(t0reg), 31); + xPSRL.D(xRegisterSSE(t1reg), 31); // normal subtraction - if( EEREC_D == EEREC_S ) SSE2_PSUBD_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(t2reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, t2reg); + xMOVDQA(xRegisterSSE(t2reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(t2reg)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } // overflow check // t2reg = 0xffffffff if NOT overflow, else 0 - SSEX_MOVDQA_XMM_to_XMM(t2reg, EEREC_D); - SSE2_PSRLD_I8_to_XMM(t2reg, 31); - SSE2_PCMPEQD_XMM_to_XMM(t1reg, t0reg); // Sign(Rs) == Sign(Rt) - SSE2_PCMPEQD_XMM_to_XMM(t2reg, t0reg); // Sign(Rs) == Sign(Rd) - SSE2_POR_XMM_to_XMM(t2reg, t1reg); // (Sign(Rs) == Sign(Rt)) | (Sign(Rs) == Sign(Rd)) - SSE2_PCMPEQD_XMM_to_XMM(t1reg, t1reg); - SSE2_PSRLD_I8_to_XMM(t1reg, 1); // 0x7fffffff - SSE2_PADDD_XMM_to_XMM(t1reg, t0reg); // t1reg = (Rs < 0) ? 0x80000000 : 0x7fffffff + xMOVDQA(xRegisterSSE(t2reg), xRegisterSSE(EEREC_D)); + xPSRL.D(xRegisterSSE(t2reg), 31); + xPCMP.EQD(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); // Sign(Rs) == Sign(Rt) + xPCMP.EQD(xRegisterSSE(t2reg), xRegisterSSE(t0reg)); // Sign(Rs) == Sign(Rd) + xPOR(xRegisterSSE(t2reg), xRegisterSSE(t1reg)); // (Sign(Rs) == Sign(Rt)) | (Sign(Rs) == Sign(Rd)) + xPCMP.EQD(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xPSRL.D(xRegisterSSE(t1reg), 1); // 0x7fffffff + xPADD.D(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); // t1reg = (Rs < 0) ? 0x80000000 : 0x7fffffff // saturation - SSE2_PAND_XMM_to_XMM(EEREC_D, t2reg); - SSE2_PANDN_XMM_to_XMM(t2reg, t1reg); - SSE2_POR_XMM_to_XMM(EEREC_D, t2reg); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t2reg)); + xPANDN(xRegisterSSE(t2reg), xRegisterSSE(t1reg)); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t2reg)); _freeXMMreg(t0reg); _freeXMMreg(t1reg); @@ -915,11 +915,11 @@ void recPADDB() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PADDB_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDB_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.B(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.B(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.B(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -931,18 +931,18 @@ void recPADDH() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|(_Rt_!=0?XMMINFO_READT:0)|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - if( _Rt_ == 0 ) SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); - else SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + if( _Rt_ == 0 ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + else xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if( _Rt_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - if( EEREC_D == EEREC_S ) SSE2_PADDW_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } _clearNeededXMMregs(); @@ -955,18 +955,18 @@ void recPADDW() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|(_Rt_!=0?XMMINFO_READT:0)|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - if( _Rt_ == 0 ) SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); - else SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + if( _Rt_ == 0 ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + else xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if( _Rt_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - if( EEREC_D == EEREC_S ) SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } _clearNeededXMMregs(); @@ -978,17 +978,17 @@ void recPSUBB() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PSUBB_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.B(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBB_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.B(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.B(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -999,17 +999,17 @@ void recPSUBH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PSUBW_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBW_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.W(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1020,17 +1020,17 @@ void recPSUBW() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PSUBD_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1042,21 +1042,21 @@ void recPEXTLW() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLQ_I8_to_XMM(EEREC_D, 32); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.Q(xRegisterSSE(EEREC_D), 32); } else { - if( EEREC_D == EEREC_T ) SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_T ) xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } _clearNeededXMMregs(); @@ -1068,21 +1068,21 @@ void recPEXTLB() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PUNPCKLBW_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLW_I8_to_XMM(EEREC_D, 8); + xPUNPCK.LBW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.W(xRegisterSSE(EEREC_D), 8); } else { - if( EEREC_D == EEREC_T ) SSE2_PUNPCKLBW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_T ) xPUNPCK.LBW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLBW_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LBW(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLBW_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LBW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } _clearNeededXMMregs(); @@ -1094,21 +1094,21 @@ void recPEXTLH() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PUNPCKLWD_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLD_I8_to_XMM(EEREC_D, 16); + xPUNPCK.LWD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.D(xRegisterSSE(EEREC_D), 16); } else { - if( EEREC_D == EEREC_T ) SSE2_PUNPCKLWD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_T ) xPUNPCK.LWD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLWD_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LWD(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLWD_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LWD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } _clearNeededXMMregs(); @@ -1155,22 +1155,22 @@ void recPABSW() //needs clamping int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PCMPEQD_XMM_to_XMM(t0reg, t0reg); - SSE2_PSLLD_I8_to_XMM(t0reg, 31); - SSE2_PCMPEQD_XMM_to_XMM(t0reg, EEREC_T); //0xffffffff if equal to 0x80000000 + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSLL.D(xRegisterSSE(t0reg), 31); + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); //0xffffffff if equal to 0x80000000 if( x86caps.hasSupplementalStreamingSIMD3Extensions ) { - SSSE3_PABSD_XMM_to_XMM(EEREC_D, EEREC_T); //0x80000000 -> 0x80000000 + xPABS.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); //0x80000000 -> 0x80000000 } else { int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRAD_I8_to_XMM(t1reg, 31); - SSEX_PXOR_XMM_to_XMM(EEREC_D, t1reg); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, t1reg); //0x80000000 -> 0x80000000 + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRA.D(xRegisterSSE(t1reg), 31); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); //0x80000000 -> 0x80000000 _freeXMMreg(t1reg); } - SSE2_PXOR_XMM_to_XMM(EEREC_D, t0reg); //0x80000000 -> 0x7fffffff + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); //0x80000000 -> 0x7fffffff _freeXMMreg(t0reg); _clearNeededXMMregs(); } @@ -1183,22 +1183,22 @@ void recPABSH() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PCMPEQW_XMM_to_XMM(t0reg, t0reg); - SSE2_PSLLW_I8_to_XMM(t0reg, 15); - SSE2_PCMPEQW_XMM_to_XMM(t0reg, EEREC_T); //0xffff if equal to 0x8000 + xPCMP.EQW(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSLL.W(xRegisterSSE(t0reg), 15); + xPCMP.EQW(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); //0xffff if equal to 0x8000 if( x86caps.hasSupplementalStreamingSIMD3Extensions ) { - SSSE3_PABSW_XMM_to_XMM(EEREC_D, EEREC_T); //0x8000 -> 0x8000 + xPABS.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); //0x8000 -> 0x8000 } else { int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRAW_I8_to_XMM(t1reg, 15); - SSEX_PXOR_XMM_to_XMM(EEREC_D, t1reg); - SSE2_PSUBW_XMM_to_XMM(EEREC_D, t1reg); //0x8000 -> 0x8000 + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRA.W(xRegisterSSE(t1reg), 15); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xPSUB.W(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); //0x8000 -> 0x8000 _freeXMMreg(t1reg); } - SSE2_PXOR_XMM_to_XMM(EEREC_D, t0reg); //0x8000 -> 0x7fff + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); //0x8000 -> 0x7fff _freeXMMreg(t0reg); _clearNeededXMMregs(); } @@ -1210,44 +1210,44 @@ void recPMINW() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); if ( x86caps.hasStreamingSIMD4Extensions ) { - if( EEREC_S == EEREC_T ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - else if( EEREC_D == EEREC_S ) SSE4_PMINSD_XMM_to_XMM(EEREC_D, EEREC_T); - else if ( EEREC_D == EEREC_T ) SSE4_PMINSD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_S == EEREC_T ) xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + else if( EEREC_D == EEREC_S ) xPMIN.SD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if ( EEREC_D == EEREC_T ) xPMIN.SD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE4_PMINSD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMIN.SD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { int t0reg; if( EEREC_S == EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSE2_PCMPGTD_XMM_to_XMM(t0reg, EEREC_S); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xPCMP.GTD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); if( EEREC_D == EEREC_S ) { - SSEX_PAND_XMM_to_XMM(EEREC_D, t0reg); - SSEX_PANDN_XMM_to_XMM(t0reg, EEREC_T); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); } else if( EEREC_D == EEREC_T ) { int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSEX_PAND_XMM_to_XMM(EEREC_D, t0reg); - SSEX_PANDN_XMM_to_XMM(t0reg, t1reg); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); _freeXMMreg(t1reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSEX_PAND_XMM_to_XMM(EEREC_D, t0reg); - SSEX_PANDN_XMM_to_XMM(t0reg, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); + xPANDN(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); } - SSEX_POR_XMM_to_XMM(EEREC_D, t0reg); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } } @@ -1263,30 +1263,30 @@ void recPADSBH() int t0reg; if( EEREC_S == EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDW_XMM_to_XMM(EEREC_D, EEREC_D); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); // reset lower bits to 0s - SSE2_PSRLDQ_I8_to_XMM(EEREC_D, 8); - SSE2_PSLLDQ_I8_to_XMM(EEREC_D, 8); + xPSRL.DQ(xRegisterSSE(EEREC_D), 8); + xPSLL.DQ(xRegisterSSE(EEREC_D), 8); } else { t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); if( EEREC_D == EEREC_S ) { - SSE2_PADDW_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSUBW_XMM_to_XMM(EEREC_D, EEREC_T); + xPADD.W(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPSUB.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBW_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PADDW_XMM_to_XMM(t0reg, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.W(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPADD.W(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); } // t0reg - adds, EEREC_D - subs - SSE2_PSRLDQ_I8_to_XMM(t0reg, 8); - SSE_MOVLHPS_XMM_to_XMM(EEREC_D, t0reg); + xPSRL.DQ(xRegisterSSE(t0reg), 8); + xMOVLH.PS(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } @@ -1302,36 +1302,36 @@ void recPADDUW() if( _Rt_ == 0 ) { if( _Rs_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } - else SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); + else xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else if( _Rs_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PCMPEQB_XMM_to_XMM(t0reg, t0reg); - SSE2_PSLLD_I8_to_XMM(t0reg, 31); // 0x80000000 - SSEX_MOVDQA_XMM_to_XMM(t1reg, t0reg); - SSE2_PXOR_XMM_to_XMM(t0reg, EEREC_S); // invert MSB of Rs (for unsigned comparison) + xPCMP.EQB(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSLL.D(xRegisterSSE(t0reg), 31); // 0x80000000 + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); // invert MSB of Rs (for unsigned comparison) // normal 32-bit addition - if( EEREC_D == EEREC_S ) SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } // unsigned 32-bit comparison - SSE2_PXOR_XMM_to_XMM(t1reg, EEREC_D); // invert MSB of Rd (for unsigned comparison) - SSE2_PCMPGTD_XMM_to_XMM(t0reg, t1reg); + xPXOR(xRegisterSSE(t1reg), xRegisterSSE(EEREC_D)); // invert MSB of Rd (for unsigned comparison) + xPCMP.GTD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); // saturate - SSE2_POR_XMM_to_XMM(EEREC_D, t0reg); // clear word with 0xFFFFFFFF if (Rd < Rs) + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); // clear word with 0xFFFFFFFF if (Rd < Rs) _freeXMMreg(t0reg); _freeXMMreg(t1reg); @@ -1345,17 +1345,17 @@ void recPSUBUB() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PSUBUSB_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.USB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBUSB_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.USB(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBUSB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.USB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1366,17 +1366,17 @@ void recPSUBUH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PSUBUSW_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPSUB.USW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBUSW_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.USW(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBUSW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.USW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1390,37 +1390,37 @@ void recPSUBUW() int t0reg = _allocTempXMMreg(XMMT_INT, -1); int t1reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PCMPEQB_XMM_to_XMM(t0reg, t0reg); - SSE2_PSLLD_I8_to_XMM(t0reg, 31); // 0x80000000 + xPCMP.EQB(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSLL.D(xRegisterSSE(t0reg), 31); // 0x80000000 // normal 32-bit subtraction // and invert MSB of Rs and Rt (for unsigned comparison) if( EEREC_D == EEREC_S ) { - SSEX_MOVDQA_XMM_to_XMM(t1reg, t0reg); - SSE2_PXOR_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PXOR_XMM_to_XMM(t1reg, EEREC_T); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPXOR(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if( EEREC_D == EEREC_T ) { - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, t1reg); - SSE2_PXOR_XMM_to_XMM(t1reg, t0reg); - SSE2_PXOR_XMM_to_XMM(t0reg, EEREC_S); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xPXOR(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(t1reg, t0reg); - SSE2_PXOR_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PXOR_XMM_to_XMM(t1reg, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSUB.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPXOR(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); } // unsigned 32-bit comparison - SSE2_PCMPGTD_XMM_to_XMM(t0reg, t1reg); + xPCMP.GTD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); // saturate - SSE2_PAND_XMM_to_XMM(EEREC_D, t0reg); // clear word with zero if (Rs <= Rt) + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); // clear word with zero if (Rs <= Rt) _freeXMMreg(t0reg); _freeXMMreg(t1reg); @@ -1434,21 +1434,21 @@ void recPEXTUH() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PUNPCKHWD_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLD_I8_to_XMM(EEREC_D, 16); + xPUNPCK.HWD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.D(xRegisterSSE(EEREC_D), 16); } else { - if( EEREC_D == EEREC_T ) SSE2_PUNPCKHWD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_T ) xPUNPCK.HWD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKHWD_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.HWD(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKHWD_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.HWD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } _clearNeededXMMregs(); @@ -1489,21 +1489,21 @@ void recPEXTUB() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PUNPCKHBW_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLW_I8_to_XMM(EEREC_D, 8); + xPUNPCK.HBW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.W(xRegisterSSE(EEREC_D), 8); } else { - if( EEREC_D == EEREC_T ) SSE2_PUNPCKHBW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_T ) xPUNPCK.HBW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKHBW_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.HBW(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKHBW_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.HBW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } _clearNeededXMMregs(); @@ -1516,21 +1516,21 @@ void recPEXTUW() int info = eeRecompileCodeXMM( (_Rs_!=0?XMMINFO_READS:0)|XMMINFO_READT|XMMINFO_WRITED ); if( _Rs_ == 0 ) { - SSE2_PUNPCKHDQ_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRLQ_I8_to_XMM(EEREC_D, 32); + xPUNPCK.HDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSRL.Q(xRegisterSSE(EEREC_D), 32); } else { - if( EEREC_D == EEREC_T ) SSE2_PUNPCKHDQ_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_T ) xPUNPCK.HDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKHDQ_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.HDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKHDQ_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.HDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } _clearNeededXMMregs(); @@ -1542,11 +1542,11 @@ void recPMINH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PMINSW_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PMINSW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPMIN.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPMIN.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PMINSW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMIN.SW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1557,11 +1557,11 @@ void recPCEQB() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PCMPEQB_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PCMPEQB_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPCMP.EQB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPCMP.EQB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPEQB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.EQB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1572,11 +1572,11 @@ void recPCEQH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PCMPEQW_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PCMPEQW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPCMP.EQW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPCMP.EQW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPEQW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.EQW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1587,11 +1587,11 @@ void recPCEQW() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PCMPEQD_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PCMPEQD_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPCMP.EQD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPCMP.EQD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PCMPEQD_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPCMP.EQD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1603,14 +1603,14 @@ void recPADDUB() int info = eeRecompileCodeXMM( XMMINFO_READS|(_Rt_?XMMINFO_READT:0)|XMMINFO_WRITED ); if( _Rt_ ) { - if( EEREC_D == EEREC_S ) SSE2_PADDUSB_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDUSB_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.USB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.USB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDUSB_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.USB(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } - else SSE2_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); + else xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); _clearNeededXMMregs(); } @@ -1620,11 +1620,11 @@ void recPADDUH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); - if( EEREC_D == EEREC_S ) SSE2_PADDUSW_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PADDUSW_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPADD.USW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPADD.USW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PADDUSW_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPADD.USW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -1672,40 +1672,40 @@ void recPMADDW() } int info = eeRecompileCodeXMM( (((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMMINFO_READT:0)|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI|XMMINFO_READLO|XMMINFO_READHI ); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); // LO = {LO[0], HI[0], LO[2], HI[2]} + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO), 0xd8); // LO = {LO[0], HI[0], LO[2], HI[2]} if( _Rd_ ) { - if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); - else if( EEREC_D == EEREC_S ) SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_S); + if( !_Rs_ || !_Rt_ ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + else if( EEREC_D == EEREC_S ) xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { - if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_HI, EEREC_HI); + if( !_Rs_ || !_Rt_ ) xPXOR(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); - SSE4_PMULDQ_XMM_to_XMM(EEREC_HI, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); + xPMUL.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_T)); } } // add from LO/HI - if ( _Rd_ ) SSE2_PADDQ_XMM_to_XMM(EEREC_D, EEREC_LO); - else SSE2_PADDQ_XMM_to_XMM(EEREC_HI, EEREC_LO); + if ( _Rd_ ) xPADD.Q(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO)); + else xPADD.Q(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_LO)); // interleave & sign extend if ( _Rd_ ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_D, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_D, 0xdd); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_D), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_D), 0xdd); } else { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xdd); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0xdd); } - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_HI, EEREC_HI); + xPMOVSX.DQ(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPMOVSX.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); _clearNeededXMMregs(); } @@ -1717,56 +1717,56 @@ void recPSLLVW() int info = eeRecompileCodeXMM( (_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WRITED ); if( _Rs_ == 0 ) { if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_D, EEREC_D); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xPMOVSX.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_D); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); + xPSRA.D(xRegisterSSE(t0reg), 31); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } } } else if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); int t1reg = _allocTempXMMreg(XMMT_INT, -1); // shamt is 5-bit - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSLLQ_I8_to_XMM(t0reg, 27+32); - SSE2_PSRLQ_I8_to_XMM(t0reg, 27+32); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPSLL.Q(xRegisterSSE(t0reg), 27+32); + xPSRL.Q(xRegisterSSE(t0reg), 27+32); // EEREC_D[0] <- Rt[0], t1reg[0] <- Rt[2] - SSE_MOVHLPS_XMM_to_XMM(t1reg, EEREC_T); - if( EEREC_D != EEREC_T ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVHL.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + if( EEREC_D != EEREC_T ) xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); // shift (left) Rt[0] - SSE2_PSLLD_XMM_to_XMM(EEREC_D, t0reg); + xPSLL.D(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); // shift (left) Rt[2] - SSE_MOVHLPS_XMM_to_XMM(t0reg, t0reg); - SSE2_PSLLD_XMM_to_XMM(t1reg, t0reg); + xMOVHL.PS(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSLL.D(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); // merge & sign extend if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t1reg); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_D, EEREC_D); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xPMOVSX.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t1reg); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_D); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); // get the signs - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); + xPSRA.D(xRegisterSSE(t0reg), 31); // get the signs + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); } _freeXMMreg(t0reg); @@ -1783,56 +1783,56 @@ void recPSRLVW() int info = eeRecompileCodeXMM( (_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WRITED ); if( _Rs_ == 0 ) { if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_D, EEREC_D); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xPMOVSX.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_D); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); + xPSRA.D(xRegisterSSE(t0reg), 31); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } } } else if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); int t1reg = _allocTempXMMreg(XMMT_INT, -1); // shamt is 5-bit - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSLLQ_I8_to_XMM(t0reg, 27+32); - SSE2_PSRLQ_I8_to_XMM(t0reg, 27+32); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPSLL.Q(xRegisterSSE(t0reg), 27+32); + xPSRL.Q(xRegisterSSE(t0reg), 27+32); // EEREC_D[0] <- Rt[0], t1reg[0] <- Rt[2] - SSE_MOVHLPS_XMM_to_XMM(t1reg, EEREC_T); - if( EEREC_D != EEREC_T ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVHL.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + if( EEREC_D != EEREC_T ) xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); // shift (right logical) Rt[0] - SSE2_PSRLD_XMM_to_XMM(EEREC_D, t0reg); + xPSRL.D(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); // shift (right logical) Rt[2] - SSE_MOVHLPS_XMM_to_XMM(t0reg, t0reg); - SSE2_PSRLD_XMM_to_XMM(t1reg, t0reg); + xMOVHL.PS(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSRL.D(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); // merge & sign extend if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t1reg); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_D, EEREC_D); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xPMOVSX.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t1reg); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_D); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); // get the signs - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); + xPSRA.D(xRegisterSSE(t0reg), 31); // get the signs + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); } _freeXMMreg(t0reg); @@ -1850,46 +1850,46 @@ void recPMSUBW() return; } int info = eeRecompileCodeXMM( (((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMMINFO_READT:0)|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI|XMMINFO_READLO|XMMINFO_READHI ); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); // LO = {LO[0], HI[0], LO[2], HI[2]} + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO), 0xd8); // LO = {LO[0], HI[0], LO[2], HI[2]} if( _Rd_ ) { - if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); - else if( EEREC_D == EEREC_S ) SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_S); + if( !_Rs_ || !_Rt_ ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + else if( EEREC_D == EEREC_S ) xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { - if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_HI, EEREC_HI); + if( !_Rs_ || !_Rt_ ) xPXOR(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); - SSE4_PMULDQ_XMM_to_XMM(EEREC_HI, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); + xPMUL.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_T)); } } // sub from LO/HI if ( _Rd_ ) { - SSE2_PSUBQ_XMM_to_XMM(EEREC_LO, EEREC_D); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_LO); + xPSUB.Q(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_D)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO)); } else { - SSE2_PSUBQ_XMM_to_XMM(EEREC_LO, EEREC_HI); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_LO); + xPSUB.Q(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI)); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_LO)); } // interleave & sign extend if ( _Rd_ ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_D, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_D, 0xdd); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_D), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_D), 0xdd); } else { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xdd); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0xdd); } - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_HI, EEREC_HI); + xPMOVSX.DQ(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPMOVSX.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); _clearNeededXMMregs(); } @@ -1903,35 +1903,35 @@ void recPMULTW() } int info = eeRecompileCodeXMM( (((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMMINFO_READT:0)|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI ); if( !_Rs_ || !_Rt_ ) { - if( _Rd_ ) SSE2_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); - SSE2_PXOR_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE2_PXOR_XMM_to_XMM(EEREC_HI, EEREC_HI); + if( _Rd_ ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + xPXOR(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPXOR(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); } else { if( _Rd_ ) { - if( EEREC_D == EEREC_S ) SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE4_PMULDQ_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMUL.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); - SSE4_PMULDQ_XMM_to_XMM(EEREC_HI, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); + xPMUL.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_T)); } // interleave & sign extend if ( _Rd_ ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_D, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_D, 0xdd); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_D), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_D), 0xdd); } else { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xdd); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0xdd); } - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_HI, EEREC_HI); + xPMOVSX.DQ(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPMOVSX.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); } _clearNeededXMMregs(); } @@ -1958,36 +1958,36 @@ void recPHMADH() int info = eeRecompileCodeXMM( (_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITELO|XMMINFO_WRITEHI ); int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSRLD_I8_to_XMM(t0reg, 16); - SSE2_PSLLD_I8_to_XMM(t0reg, 16); - SSE2_PMADDWD_XMM_to_XMM(t0reg, EEREC_T); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPSRL.D(xRegisterSSE(t0reg), 16); + xPSLL.D(xRegisterSSE(t0reg), 16); + xPMADD.WD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); if( _Rd_ ) { if( EEREC_D == EEREC_S ) { - SSE2_PMADDWD_XMM_to_XMM(EEREC_D, EEREC_T); + xPMADD.WD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if( EEREC_D == EEREC_T ) { - SSE2_PMADDWD_XMM_to_XMM(EEREC_D, EEREC_S); + xPMADD.WD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PMADDWD_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPMADD.WD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } - SSEX_MOVDQA_XMM_to_XMM(EEREC_LO, EEREC_D); + xMOVDQA(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_D)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_LO, EEREC_T); - SSE2_PMADDWD_XMM_to_XMM(EEREC_LO, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_T)); + xPMADD.WD(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_S)); } - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_LO); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_LO)); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, t0reg, 0x88); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg), 0x88); + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO), 0xd8); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, t0reg, 0xdd); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xd8); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg), 0xdd); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0xd8); _freeXMMreg(t0reg); _clearNeededXMMregs(); @@ -2000,50 +2000,50 @@ void recPMSUBH() int t1reg = _allocTempXMMreg(XMMT_INT, -1); if( !_Rd_ ) { - SSE2_PXOR_XMM_to_XMM(t0reg, t0reg); - SSE2_PSHUFD_XMM_to_XMM(t1reg, EEREC_S, 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 - SSE2_PUNPCKLWD_XMM_to_XMM(t1reg, t0reg); //S0, 0, S1, 0, S4, 0, S5, 0 - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_T, 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 - SSE2_PUNPCKLWD_XMM_to_XMM(t0reg, t0reg); //T0, T0, T1, T1, T4, T4, T5, T5 - SSE2_PMADDWD_XMM_to_XMM(t0reg, t1reg); //S0*T0+0*T0, S1*T1+0*T1, S4*T4+0*T4, S5*T5+0*T5 + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S), 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 + xPUNPCK.LWD(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); //S0, 0, S1, 0, S4, 0, S5, 0 + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T), 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 + xPUNPCK.LWD(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); //T0, T0, T1, T1, T4, T4, T5, T5 + xPMADD.WD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); //S0*T0+0*T0, S1*T1+0*T1, S4*T4+0*T4, S5*T5+0*T5 - SSE2_PSUBD_XMM_to_XMM(EEREC_LO, t0reg); + xPSUB.D(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); - SSE2_PXOR_XMM_to_XMM(t0reg, t0reg); - SSE2_PSHUFD_XMM_to_XMM(t1reg, EEREC_S, 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 - SSE2_PUNPCKHWD_XMM_to_XMM(t1reg, t0reg); //S2, 0, S3, 0, S6, 0, S7, 0 - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_T, 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 - SSE2_PUNPCKHWD_XMM_to_XMM(t0reg, t0reg); //T2, T2, T3, T3, T6, T6, T7, T7 - SSE2_PMADDWD_XMM_to_XMM(t0reg, t1reg); //S2*T2+0*T2, S3*T3+0*T3, S6*T6+0*T6, S7*T7+0*T7 + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S), 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 + xPUNPCK.HWD(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); //S2, 0, S3, 0, S6, 0, S7, 0 + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T), 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 + xPUNPCK.HWD(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); //T2, T2, T3, T3, T6, T6, T7, T7 + xPMADD.WD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); //S2*T2+0*T2, S3*T3+0*T3, S6*T6+0*T6, S7*T7+0*T7 - SSE2_PSUBD_XMM_to_XMM(EEREC_HI, t0reg); + xPSUB.D(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg)); } else { - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_S); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S)); - SSE2_PMULLW_XMM_to_XMM(t0reg, EEREC_T); - SSE2_PMULHW_XMM_to_XMM(t1reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, t0reg); + xPMUL.LW(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xPMUL.HW(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); // 0-3 - SSE2_PUNPCKLWD_XMM_to_XMM(t0reg, t1reg); + xPUNPCK.LWD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); // 4-7 - SSE2_PUNPCKHWD_XMM_to_XMM(EEREC_D, t1reg); - SSEX_MOVDQA_XMM_to_XMM(t1reg, t0reg); + xPUNPCK.HWD(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); // 0,1,4,5, L->H - SSE2_PUNPCKLQDQ_XMM_to_XMM(t0reg, EEREC_D); + xPUNPCK.LQDQ(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); // 2,3,6,7, L->H - SSE2_PUNPCKHQDQ_XMM_to_XMM(t1reg, EEREC_D); + xPUNPCK.HQDQ(xRegisterSSE(t1reg), xRegisterSSE(EEREC_D)); - SSE2_PSUBD_XMM_to_XMM(EEREC_LO, t0reg); - SSE2_PSUBD_XMM_to_XMM(EEREC_HI, t1reg); + xPSUB.D(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); + xPSUB.D(xRegisterSSE(EEREC_HI), xRegisterSSE(t1reg)); // 0,2,4,6, L->H - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_LO, 0x88); - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_HI, 0x88); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO), 0x88); + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI), 0x88); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); } _freeXMMreg(t0reg); @@ -2060,28 +2060,28 @@ void recPHMSBH() int info = eeRecompileCodeXMM( (_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITELO|XMMINFO_WRITEHI ); int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PCMPEQD_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE2_PSRLD_I8_to_XMM(EEREC_LO, 16); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); - SSE2_PAND_XMM_to_XMM(EEREC_HI, EEREC_LO); - SSE2_PMADDWD_XMM_to_XMM(EEREC_HI, EEREC_T); - SSE2_PSLLD_I8_to_XMM(EEREC_LO, 16); - SSE2_PAND_XMM_to_XMM(EEREC_LO, EEREC_S); - SSE2_PMADDWD_XMM_to_XMM(EEREC_LO, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_LO); - SSE2_PSUBD_XMM_to_XMM(EEREC_LO, EEREC_HI); - if( _Rd_ ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_LO); + xPCMP.EQD(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPSRL.D(xRegisterSSE(EEREC_LO), 16); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); + xPAND(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_LO)); + xPMADD.WD(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_T)); + xPSLL.D(xRegisterSSE(EEREC_LO), 16); + xPAND(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_S)); + xPMADD.WD(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_LO)); + xPSUB.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI)); + if( _Rd_ ) xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO)); - SSE2_PCMPEQD_XMM_to_XMM(EEREC_HI, EEREC_HI); - SSE2_PXOR_XMM_to_XMM(t0reg, EEREC_HI); + xPCMP.EQD(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI)); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_LO); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_LO)); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, t0reg, 0x88); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg), 0x88); + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO), 0xd8); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, t0reg, 0xdd); - SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xd8); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg), 0xdd); + xSHUF.PS(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0xd8); _freeXMMreg(t0reg); _clearNeededXMMregs(); @@ -2093,8 +2093,8 @@ void recPEXEH() if (!_Rd_) return; int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_T, 0xc6); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0xc6); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0xc6); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0xc6); _clearNeededXMMregs(); } @@ -2105,8 +2105,8 @@ void recPREVH() int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_T, 0x1B); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0x1B); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x1B); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x1B); _clearNeededXMMregs(); } @@ -2118,14 +2118,14 @@ void recPINTH() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED ); if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE_MOVHLPS_XMM_to_XMM(t0reg, EEREC_S); - if( EEREC_D != EEREC_T ) SSE2_MOVQ_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLWD_XMM_to_XMM(EEREC_D, t0reg); + xMOVHL.PS(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + if( EEREC_D != EEREC_T ) xMOVQZX(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LWD(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSE_MOVLHPS_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKHWD_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVLH.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.HWD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } _clearNeededXMMregs(); } @@ -2135,7 +2135,7 @@ void recPEXEW() if (!_Rd_) return; int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0xc6); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0xc6); _clearNeededXMMregs(); } @@ -2144,7 +2144,7 @@ void recPROT3W() if (!_Rd_) return; int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0xc9); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0xc9); _clearNeededXMMregs(); } @@ -2153,31 +2153,31 @@ void recPMULTH() int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_READT|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI ); int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(EEREC_LO, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); - SSE2_PMULLW_XMM_to_XMM(EEREC_LO, EEREC_T); - SSE2_PMULHW_XMM_to_XMM(EEREC_HI, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_LO); + xPMUL.LW(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_T)); + xPMUL.HW(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_LO)); // 0-3 - SSE2_PUNPCKLWD_XMM_to_XMM(EEREC_LO, EEREC_HI); + xPUNPCK.LWD(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI)); // 4-7 - SSE2_PUNPCKHWD_XMM_to_XMM(t0reg, EEREC_HI); + xPUNPCK.HWD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI)); if( _Rd_ ) { // 0,2,4,6, L->H - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_LO, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, t0reg, 0x88); - SSE2_PUNPCKLQDQ_XMM_to_XMM(EEREC_D, EEREC_HI); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg), 0x88); + xPUNPCK.LQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_HI)); } - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_LO); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_LO)); // 0,1,4,5, L->H - SSE2_PUNPCKLQDQ_XMM_to_XMM(EEREC_LO, t0reg); + xPUNPCK.LQDQ(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); // 2,3,6,7, L->H - SSE2_PUNPCKHQDQ_XMM_to_XMM(EEREC_HI, t0reg); + xPUNPCK.HQDQ(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); _clearNeededXMMregs(); @@ -2188,7 +2188,7 @@ void recPMFHI() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_WRITED|XMMINFO_READHI ); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_HI); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_HI)); _clearNeededXMMregs(); } @@ -2198,7 +2198,7 @@ void recPMFLO() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_WRITED|XMMINFO_READLO ); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_LO); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO)); _clearNeededXMMregs(); } @@ -2209,14 +2209,14 @@ void recPAND() int info = eeRecompileCodeXMM( XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT ); if( EEREC_D == EEREC_T ) { - SSEX_PAND_XMM_to_XMM(EEREC_D, EEREC_S); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else if( EEREC_D == EEREC_S ) { - SSEX_PAND_XMM_to_XMM(EEREC_D, EEREC_T); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSEX_PAND_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPAND(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -2228,14 +2228,14 @@ void recPXOR() int info = eeRecompileCodeXMM( XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT ); if( EEREC_D == EEREC_T ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_S); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else if( EEREC_D == EEREC_S ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_T); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } _clearNeededXMMregs(); } @@ -2247,18 +2247,18 @@ void recPCPYLD() int info = eeRecompileCodeXMM( XMMINFO_WRITED|(( _Rs_== 0) ? 0:XMMINFO_READS)|XMMINFO_READT ); if( _Rs_ == 0 ) { - SSE2_MOVQ_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVQZX(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else { - if( EEREC_D == EEREC_T ) SSE2_PUNPCKLQDQ_XMM_to_XMM(EEREC_D, EEREC_S); - else if( EEREC_S == EEREC_T ) SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_S, 0x44); + if( EEREC_D == EEREC_T ) xPUNPCK.LQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + else if( EEREC_S == EEREC_T ) xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S), 0x44); else if( EEREC_D == EEREC_S ) { - SSE2_PUNPCKLQDQ_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_D, 0x4e); + xPUNPCK.LQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x4e); } else { - SSE2_MOVQ_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PUNPCKLQDQ_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVQZX(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPUNPCK.LQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } _clearNeededXMMregs(); @@ -2271,50 +2271,50 @@ void recPMADDH() int t1reg = _allocTempXMMreg(XMMT_INT, -1); if( !_Rd_ ) { - SSE2_PXOR_XMM_to_XMM(t0reg, t0reg); - SSE2_PSHUFD_XMM_to_XMM(t1reg, EEREC_S, 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 - SSE2_PUNPCKLWD_XMM_to_XMM(t1reg, t0reg); //S0, 0, S1, 0, S4, 0, S5, 0 - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_T, 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 - SSE2_PUNPCKLWD_XMM_to_XMM(t0reg, t0reg); //T0, T0, T1, T1, T4, T4, T5, T5 - SSE2_PMADDWD_XMM_to_XMM(t0reg, t1reg); //S0*T0+0*T0, S1*T1+0*T1, S4*T4+0*T4, S5*T5+0*T5 + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S), 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 + xPUNPCK.LWD(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); //S0, 0, S1, 0, S4, 0, S5, 0 + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T), 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 + xPUNPCK.LWD(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); //T0, T0, T1, T1, T4, T4, T5, T5 + xPMADD.WD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); //S0*T0+0*T0, S1*T1+0*T1, S4*T4+0*T4, S5*T5+0*T5 - SSE2_PADDD_XMM_to_XMM(EEREC_LO, t0reg); + xPADD.D(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); - SSE2_PXOR_XMM_to_XMM(t0reg, t0reg); - SSE2_PSHUFD_XMM_to_XMM(t1reg, EEREC_S, 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 - SSE2_PUNPCKHWD_XMM_to_XMM(t1reg, t0reg); //S2, 0, S3, 0, S6, 0, S7, 0 - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_T, 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 - SSE2_PUNPCKHWD_XMM_to_XMM(t0reg, t0reg); //T2, T2, T3, T3, T6, T6, T7, T7 - SSE2_PMADDWD_XMM_to_XMM(t0reg, t1reg); //S2*T2+0*T2, S3*T3+0*T3, S6*T6+0*T6, S7*T7+0*T7 + xPXOR(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S), 0xd8); //S0, S1, S4, S5, S2, S3, S6, S7 + xPUNPCK.HWD(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); //S2, 0, S3, 0, S6, 0, S7, 0 + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T), 0xd8); //T0, T1, T4, T5, T2, T3, T6, T7 + xPUNPCK.HWD(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); //T2, T2, T3, T3, T6, T6, T7, T7 + xPMADD.WD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); //S2*T2+0*T2, S3*T3+0*T3, S6*T6+0*T6, S7*T7+0*T7 - SSE2_PADDD_XMM_to_XMM(EEREC_HI, t0reg); + xPADD.D(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg)); } else { - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_S); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S)); - SSE2_PMULLW_XMM_to_XMM(t0reg, EEREC_T); - SSE2_PMULHW_XMM_to_XMM(t1reg, EEREC_T); - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, t0reg); + xPMUL.LW(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xPMUL.HW(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); // 0-3 - SSE2_PUNPCKLWD_XMM_to_XMM(t0reg, t1reg); + xPUNPCK.LWD(xRegisterSSE(t0reg), xRegisterSSE(t1reg)); // 4-7 - SSE2_PUNPCKHWD_XMM_to_XMM(EEREC_D, t1reg); - SSEX_MOVDQA_XMM_to_XMM(t1reg, t0reg); + xPUNPCK.HWD(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xMOVDQA(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); // 0,1,4,5, L->H - SSE2_PUNPCKLQDQ_XMM_to_XMM(t0reg, EEREC_D); + xPUNPCK.LQDQ(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); // 2,3,6,7, L->H - SSE2_PUNPCKHQDQ_XMM_to_XMM(t1reg, EEREC_D); + xPUNPCK.HQDQ(xRegisterSSE(t1reg), xRegisterSSE(EEREC_D)); - SSE2_PADDD_XMM_to_XMM(EEREC_LO, t0reg); - SSE2_PADDD_XMM_to_XMM(EEREC_HI, t1reg); + xPADD.D(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); + xPADD.D(xRegisterSSE(EEREC_HI), xRegisterSSE(t1reg)); // 0,2,4,6, L->H - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_LO, 0x88); - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_HI, 0x88); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO), 0x88); + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI), 0x88); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); } _freeXMMreg(t0reg); @@ -2356,56 +2356,56 @@ void recPSRAVW() int info = eeRecompileCodeXMM( (_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WRITED ); if( _Rs_ == 0 ) { if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_D, EEREC_D); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xPMOVSX.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0x88); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_D); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0x88); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); + xPSRA.D(xRegisterSSE(t0reg), 31); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } } } else if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); int t1reg = _allocTempXMMreg(XMMT_INT, -1); // shamt is 5-bit - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSLLQ_I8_to_XMM(t0reg, 27+32); - SSE2_PSRLQ_I8_to_XMM(t0reg, 27+32); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPSLL.Q(xRegisterSSE(t0reg), 27+32); + xPSRL.Q(xRegisterSSE(t0reg), 27+32); // EEREC_D[0] <- Rt[0], t1reg[0] <- Rt[2] - SSE_MOVHLPS_XMM_to_XMM(t1reg, EEREC_T); - if( EEREC_D != EEREC_T ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVHL.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_T)); + if( EEREC_D != EEREC_T ) xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); // shift (right arithmetic) Rt[0] - SSE2_PSRAD_XMM_to_XMM(EEREC_D, t0reg); + xPSRA.D(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); // shift (right arithmetic) Rt[2] - SSE_MOVHLPS_XMM_to_XMM(t0reg, t0reg); - SSE2_PSRAD_XMM_to_XMM(t1reg, t0reg); + xMOVHL.PS(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPSRA.D(xRegisterSSE(t1reg), xRegisterSSE(t0reg)); // merge & sign extend if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t1reg); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_D, EEREC_D); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xPMOVSX.DQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t1reg); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_D); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); // get the signs - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_D, t0reg); + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t1reg)); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_D)); + xPSRA.D(xRegisterSSE(t0reg), 31); // get the signs + xPUNPCK.LDQ(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); } _freeXMMreg(t0reg); @@ -2429,39 +2429,39 @@ void recPINTEH() if( _Rs_ == 0 ) { if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PAND_M128_to_XMM(EEREC_D, (uptr)s_tempPINTEH); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + xPAND(xRegisterSSE(EEREC_D), ptr[s_tempPINTEH]); } } else if( _Rt_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSLLD_I8_to_XMM(EEREC_D, 16); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSLL.D(xRegisterSSE(EEREC_D), 16); } else { if( EEREC_S == EEREC_T ) { - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_S, 0xa0); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0xa0); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S), 0xa0); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0xa0); } else if( EEREC_D == EEREC_T ) { pxAssert( EEREC_D != EEREC_S ); t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSLLD_I8_to_XMM(EEREC_D, 16); - SSE2_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSRLD_I8_to_XMM(EEREC_D, 16); - SSE2_PSLLD_I8_to_XMM(t0reg, 16); - SSE2_POR_XMM_to_XMM(EEREC_D, t0reg); + xPSLL.D(xRegisterSSE(EEREC_D), 16); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPSRL.D(xRegisterSSE(EEREC_D), 16); + xPSLL.D(xRegisterSSE(t0reg), 16); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); } else { t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); - SSE2_PSLLD_I8_to_XMM(t0reg, 16); - SSE2_PSLLD_I8_to_XMM(EEREC_D, 16); - SSE2_PSRLD_I8_to_XMM(t0reg, 16); - SSE2_POR_XMM_to_XMM(EEREC_D, t0reg); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMOVDQA(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); + xPSLL.D(xRegisterSSE(t0reg), 16); + xPSLL.D(xRegisterSSE(EEREC_D), 16); + xPSRL.D(xRegisterSSE(t0reg), 16); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); } } @@ -2474,41 +2474,41 @@ void recPMULTUW() { int info = eeRecompileCodeXMM( (((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMMINFO_READT:0)|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI ); if( !_Rs_ || !_Rt_ ) { - if( _Rd_ ) SSE2_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); - SSE2_PXOR_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE2_PXOR_XMM_to_XMM(EEREC_HI, EEREC_HI); + if( _Rd_ ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + xPXOR(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPXOR(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); } else { if( _Rd_ ) { - if( EEREC_D == EEREC_S ) SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPMUL.UDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPMUL.UDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMUL.UDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_D); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_D)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); - SSE2_PMULUDQ_XMM_to_XMM(EEREC_HI, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); + xPMUL.UDQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_T)); } // interleave & sign extend if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xdd); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_HI, EEREC_HI); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0xdd); + xPMOVSX.DQ(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPMOVSX.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_HI, 0xd8); - SSEX_MOVDQA_XMM_to_XMM(EEREC_LO, t0reg); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, t0reg); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); // get the signs + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI), 0xd8); + xMOVDQA(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg)); + xPSRA.D(xRegisterSSE(t0reg), 31); // get the signs - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_LO, t0reg); - SSE2_PUNPCKHDQ_XMM_to_XMM(EEREC_HI, t0reg); + xPUNPCK.LDQ(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); + xPUNPCK.HDQ(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } } @@ -2519,48 +2519,48 @@ void recPMULTUW() void recPMADDUW() { int info = eeRecompileCodeXMM( (((_Rs_)&&(_Rt_))?XMMINFO_READS:0)|(((_Rs_)&&(_Rt_))?XMMINFO_READT:0)|(_Rd_?XMMINFO_WRITED:0)|XMMINFO_WRITELO|XMMINFO_WRITEHI|XMMINFO_READLO|XMMINFO_READHI ); - SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); // LO = {LO[0], HI[0], LO[2], HI[2]} + xSHUF.PS(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO), 0xd8); // LO = {LO[0], HI[0], LO[2], HI[2]} if( _Rd_ ) { - if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); - else if( EEREC_D == EEREC_S ) SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_S); + if( !_Rs_ || !_Rt_ ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + else if( EEREC_D == EEREC_S ) xPMUL.UDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPMUL.UDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PMULUDQ_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPMUL.UDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { - if( !_Rs_ || !_Rt_ ) SSE2_PXOR_XMM_to_XMM(EEREC_HI, EEREC_HI); + if( !_Rs_ || !_Rt_ ) xPXOR(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); - SSE2_PMULUDQ_XMM_to_XMM(EEREC_HI, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); + xPMUL.UDQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_T)); } } // add from LO/HI if ( _Rd_ ) { - SSE2_PADDQ_XMM_to_XMM(EEREC_D, EEREC_LO); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_D); + xPADD.Q(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_LO)); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_D)); } - else SSE2_PADDQ_XMM_to_XMM(EEREC_HI, EEREC_LO); + else xPADD.Q(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_LO)); // interleave & sign extend if ( x86caps.hasStreamingSIMD4Extensions ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_LO, EEREC_HI, 0x88); - SSE2_PSHUFD_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xdd); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE4_PMOVSXDQ_XMM_to_XMM(EEREC_HI, EEREC_HI); + xPSHUF.D(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_HI), 0x88); + xPSHUF.D(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI), 0xdd); + xPMOVSX.DQ(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_LO)); + xPMOVSX.DQ(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_HI)); } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PSHUFD_XMM_to_XMM(t0reg, EEREC_HI, 0xd8); - SSEX_MOVDQA_XMM_to_XMM(EEREC_LO, t0reg); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, t0reg); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); // get the signs + xPSHUF.D(xRegisterSSE(t0reg), xRegisterSSE(EEREC_HI), 0xd8); + xMOVDQA(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg)); + xPSRA.D(xRegisterSSE(t0reg), 31); // get the signs - SSE2_PUNPCKLDQ_XMM_to_XMM(EEREC_LO, t0reg); - SSE2_PUNPCKHDQ_XMM_to_XMM(EEREC_HI, t0reg); + xPUNPCK.LDQ(xRegisterSSE(EEREC_LO), xRegisterSSE(t0reg)); + xPUNPCK.HDQ(xRegisterSSE(EEREC_HI), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } _clearNeededXMMregs(); @@ -2579,7 +2579,7 @@ void recPEXCW() if (!_Rd_) return; int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_T, 0xd8); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0xd8); _clearNeededXMMregs(); } @@ -2589,8 +2589,8 @@ void recPEXCH() if (!_Rd_) return; int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_T, 0xd8); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0xd8); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0xd8); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0xd8); _clearNeededXMMregs(); } @@ -2603,45 +2603,45 @@ void recPNOR() if( _Rs_ == 0 ) { if( _Rt_ == 0 ) { - SSE2_PCMPEQD_XMM_to_XMM( EEREC_D, EEREC_D ); + xPCMP.EQD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D )); } else { if( EEREC_D == EEREC_T ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PCMPEQD_XMM_to_XMM( t0reg, t0reg); - SSEX_PXOR_XMM_to_XMM(EEREC_D, t0reg); + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSE2_PCMPEQD_XMM_to_XMM( EEREC_D, EEREC_D ); - if( _Rt_ != 0 ) SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_T); + xPCMP.EQD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D )); + if( _Rt_ != 0 ) xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } } else if( _Rt_ == 0 ) { if( EEREC_D == EEREC_S ) { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_PCMPEQD_XMM_to_XMM( t0reg, t0reg); - SSEX_PXOR_XMM_to_XMM(EEREC_D, t0reg); + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(t0reg)); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg)); _freeXMMreg(t0reg); } else { - SSE2_PCMPEQD_XMM_to_XMM( EEREC_D, EEREC_D ); - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_S); + xPCMP.EQD(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D )); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } else { int t0reg = _allocTempXMMreg(XMMT_INT, -1); - if( EEREC_D == EEREC_S ) SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - if( EEREC_S != EEREC_T ) SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + if( EEREC_S != EEREC_T ) xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } - SSE2_PCMPEQD_XMM_to_XMM( t0reg, t0reg ); - SSEX_PXOR_XMM_to_XMM( EEREC_D, t0reg ); + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(t0reg )); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(t0reg )); _freeXMMreg(t0reg); } _clearNeededXMMregs(); @@ -2651,7 +2651,7 @@ void recPNOR() void recPMTHI() { int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_WRITEHI ); - SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_HI), xRegisterSSE(EEREC_S)); _clearNeededXMMregs(); } @@ -2659,7 +2659,7 @@ void recPMTHI() void recPMTLO() { int info = eeRecompileCodeXMM( XMMINFO_READS|XMMINFO_WRITELO ); - SSEX_MOVDQA_XMM_to_XMM(EEREC_LO, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_LO), xRegisterSSE(EEREC_S)); _clearNeededXMMregs(); } @@ -2672,28 +2672,28 @@ void recPCPYUD() if( _Rt_ == 0 ) { if( EEREC_D == EEREC_S ) { - SSE2_PUNPCKHQDQ_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_MOVQ_XMM_to_XMM(EEREC_D, EEREC_D); + xPUNPCK.HQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMOVQZX(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { - SSE_MOVHLPS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_MOVQ_XMM_to_XMM(EEREC_D, EEREC_D); + xMOVHL.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMOVQZX(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } } else { - if( EEREC_D == EEREC_S ) SSE2_PUNPCKHQDQ_XMM_to_XMM(EEREC_D, EEREC_T); + if( EEREC_D == EEREC_S ) xPUNPCK.HQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if( EEREC_D == EEREC_T ) { //TODO - SSE2_PUNPCKHQDQ_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_D, 0x4e); + xPUNPCK.HQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x4e); } else { if( EEREC_S == EEREC_T ) { - SSE2_PSHUFD_XMM_to_XMM(EEREC_D, EEREC_S, 0xee); + xPSHUF.D(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S), 0xee); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); - SSE2_PUNPCKHQDQ_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xPUNPCK.HQDQ(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } } @@ -2709,24 +2709,24 @@ void recPOR() if( _Rs_ == 0 ) { if( _Rt_ == 0 ) { - SSEX_PXOR_XMM_to_XMM(EEREC_D, EEREC_D); + xPXOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } - else SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + else xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if( _Rt_ == 0 ) { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { if( EEREC_D == EEREC_S ) { - SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_T); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if( EEREC_D == EEREC_T ) { - SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_S); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVDQA(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); if( EEREC_S != EEREC_T ) { - SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_S); + xPOR(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } } @@ -2739,8 +2739,8 @@ void recPCPYH() if ( ! _Rd_ ) return; int info = eeRecompileCodeXMM( XMMINFO_READT|XMMINFO_WRITED ); - SSE2_PSHUFLW_XMM_to_XMM(EEREC_D, EEREC_T, 0); - SSE2_PSHUFHW_XMM_to_XMM(EEREC_D, EEREC_D, 0); + xPSHUF.LW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T), 0); + xPSHUF.HW(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0); _clearNeededXMMregs(); } diff --git a/pcsx2/x86/iPsxMem.cpp b/pcsx2/x86/iPsxMem.cpp index 33c0cd7288..98608120a6 100644 --- a/pcsx2/x86/iPsxMem.cpp +++ b/pcsx2/x86/iPsxMem.cpp @@ -109,10 +109,10 @@ int psxRecMemConstRead8(u32 x86reg, u32 mem, u32 sign) return psxHw4ConstRead8(x86reg, mem&0x1fffffff, sign); case 0x1000: - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)DEV9read8); - if( sign ) MOVSX32R8toR(x86reg, EAX); - else MOVZX32R8toR(x86reg, EAX); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)DEV9read8); + if( sign ) xMOVSX(xRegister32(x86reg), al); + else xMOVZX(xRegister32(x86reg), al); return 0; default: @@ -201,10 +201,10 @@ int psxRecMemConstRead16(u32 x86reg, u32 mem, u32 sign) { case 0x40: _eeReadConstMem16(x86reg, (u32)PS2MEM_HW+0xF240, sign); - OR32ItoR(x86reg, 0x0002); + xOR(xRegister32(x86reg), 0x0002); break; case 0x60: - XOR32RtoR(x86reg, x86reg); + xXOR(xRegister32(x86reg), xRegister32(x86reg)); break; default: _eeReadConstMem16(x86reg, (u32)PS2MEM_HW+0xf200+(mem&0xf0), sign); @@ -213,17 +213,17 @@ int psxRecMemConstRead16(u32 x86reg, u32 mem, u32 sign) return 0; case 0x1f90: - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)SPU2read); - if( sign ) MOVSX32R16toR(x86reg, EAX); - else MOVZX32R16toR(x86reg, EAX); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)SPU2read); + if( sign ) xMOVSX(xRegister32(x86reg), ax); + else xMOVZX(xRegister32(x86reg), ax); return 0; case 0x1000: - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)DEV9read16); - if( sign ) MOVSX32R16toR(x86reg, EAX); - else MOVZX32R16toR(x86reg, EAX); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)DEV9read16); + if( sign ) xMOVSX(xRegister32(x86reg), ax); + else xMOVZX(xRegister32(x86reg), ax); return 0; default: @@ -311,10 +311,10 @@ int psxRecMemConstRead32(u32 x86reg, u32 mem) { case 0x40: _eeReadConstMem32(x86reg, (u32)PS2MEM_HW+0xF240); - OR32ItoR(x86reg, 0xf0000002); + xOR(xRegister32(x86reg), 0xf0000002); break; case 0x60: - XOR32RtoR(x86reg, x86reg); + xXOR(xRegister32(x86reg), xRegister32(x86reg)); break; default: _eeReadConstMem32(x86reg, (u32)PS2MEM_HW+0xf200+(mem&0xf0)); @@ -323,16 +323,16 @@ int psxRecMemConstRead32(u32 x86reg, u32 mem) return 0; case 0x1000: - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)DEV9read32); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)DEV9read32); return 1; default: if( mem == 0xfffe0130 ) - MOV32MtoR(x86reg, (uptr)&writectrl); + xMOV(xRegister32(x86reg), ptr[&writectrl]); else { - XOR32RtoR(x86reg, x86reg); - CMP32ItoM((uptr)&g_psxWriteOk, 0); + xXOR(xRegister32(x86reg), xRegister32(x86reg)); + xCMP(ptr32[&g_psxWriteOk], 0); CMOVNE32MtoR(x86reg, (u32)PSXM(mem)); } @@ -406,8 +406,8 @@ int psxRecMemConstWrite8(u32 mem, int mmreg) case 0x1000: _recPushReg(mmreg); - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)DEV9write8); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)DEV9write8); return 0; default: @@ -533,34 +533,34 @@ int psxRecMemConstWrite16(u32 mem, int mmreg) _eeMoveMMREGtoR(EAX, mmreg); assert( mmreg != EBX ); - MOV16MtoR(EBX, (u32)PS2MEM_HW+0xf240); - TEST16ItoR(EAX, 0xa0); + xMOV(bx, ptr[(void*)((u32)PS2MEM_HW+0xf240)]); + xTEST(ax, 0xa0); j8Ptr[0] = JZ8(0); - AND16ItoR(EBX, 0x0fff); - OR16ItoR(EBX, 0x2000); + xAND(bx, 0x0fff); + xOR(bx, 0x2000); x86SetJ8(j8Ptr[0]); - AND16ItoR(EAX, 0xf0); - TEST16RtoR(EAX, 0xf0); + xAND(ax, 0xf0); + xTEST(ax, xRegister16(0xf0)); j8Ptr[0] = JZ8(0); - NOT32R(EAX); - AND16RtoR(EBX, EAX); + xNOT(eax); + xAND(bx, ax); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR16RtoR(EBX, EAX); + xOR(bx, ax); x86SetJ8(j8Ptr[1]); - MOV16RtoM((u32)PS2MEM_HW+0xf240, EBX); + xMOV(ptr[(void*)((u32)PS2MEM_HW+0xf240)], bx); return 0; } case 0x60: - MOV32ItoM((u32)(PS2MEM_HW+0xf260), 0); + xMOV(ptr32[(u32*)((u32)(PS2MEM_HW+0xf260))], 0); return 0; default: assert(0); @@ -569,14 +569,14 @@ int psxRecMemConstWrite16(u32 mem, int mmreg) case 0x1f90: _recPushReg(mmreg); - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)SPU2write); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)SPU2write); return 0; case 0x1000: _recPushReg(mmreg); - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)DEV9write16); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)DEV9write16); return 0; default: @@ -735,11 +735,11 @@ int psxRecMemConstWrite32(u32 mem, int mmreg) // write to ps2 mem // delete x86reg if( IS_PSXCONSTREG(mmreg) ) { - AND32ItoM((u32)PS2MEM_HW+0xf220, ~g_psxConstRegs[(mmreg>>16)&0x1f]); + xAND(ptr32[(u32*)((u32)PS2MEM_HW+0xf220)], ~g_psxConstRegs[(mmreg>>16)&0x1f]); } else { - NOT32R(mmreg); - AND32RtoM((u32)PS2MEM_HW+0xf220, mmreg); + xNOT(xRegister32(mmreg)); + xAND(ptr[(void*)((u32)PS2MEM_HW+0xf220)], xRegister32(mmreg)); } return 0; case 0x30: @@ -753,34 +753,34 @@ int psxRecMemConstWrite32(u32 mem, int mmreg) _eeMoveMMREGtoR(EAX, mmreg); - MOV16MtoR(EBX, (u32)PS2MEM_HW+0xf240); - TEST16ItoR(EAX, 0xa0); + xMOV(bx, ptr[(void*)((u32)PS2MEM_HW+0xf240)]); + xTEST(ax, 0xa0); j8Ptr[0] = JZ8(0); - AND16ItoR(EBX, 0x0fff); - OR16ItoR(EBX, 0x2000); + xAND(bx, 0x0fff); + xOR(bx, 0x2000); x86SetJ8(j8Ptr[0]); - AND16ItoR(EAX, 0xf0); - TEST16RtoR(EAX, 0xf0); + xAND(ax, 0xf0); + xTEST(ax, xRegister16(0xf0)); j8Ptr[0] = JZ8(0); - NOT32R(EAX); - AND16RtoR(EBX, EAX); + xNOT(eax); + xAND(bx, ax); j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); - OR16RtoR(EBX, EAX); + xOR(bx, ax); x86SetJ8(j8Ptr[1]); - MOV16RtoM((u32)PS2MEM_HW+0xf240, EBX); + xMOV(ptr[(void*)((u32)PS2MEM_HW+0xf240)], bx); return 0; } case 0x60: - MOV32ItoM((u32)(PS2MEM_HW+0xf260), 0); + xMOV(ptr32[(u32*)((u32)(PS2MEM_HW+0xf260))], 0); return 0; default: assert(0); @@ -789,8 +789,8 @@ int psxRecMemConstWrite32(u32 mem, int mmreg) case 0x1000: _recPushReg(mmreg); - PUSH32I(mem&0x1fffffff); - CALLFunc((uptr)DEV9write32); + xPUSH(mem&0x1fffffff); + xCALL((void*)(uptr)DEV9write32); return 0; case 0x1ffe: @@ -805,11 +805,11 @@ int psxRecMemConstWrite32(u32 mem, int mmreg) case 0xc00: case 0xc04: case 0xcc0: case 0xcc4: case 0x0c4: - MOV32ItoM((uptr)&g_psxWriteOk, 0); + xMOV(ptr32[&g_psxWriteOk], 0); break; case 0x1e988: case 0x1edd8: - MOV32ItoM((uptr)&g_psxWriteOk, 1); + xMOV(ptr32[&g_psxWriteOk], 1); break; default: assert(0); @@ -817,25 +817,25 @@ int psxRecMemConstWrite32(u32 mem, int mmreg) } else { // not ok - CMP32ItoR(mmreg, 0x800); + xCMP(xRegister32(mmreg), 0x800); ptrs[0] = JE8(0); - CMP32ItoR(mmreg, 0x804); + xCMP(xRegister32(mmreg), 0x804); ptrs[1] = JE8(0); - CMP32ItoR(mmreg, 0xc00); + xCMP(xRegister32(mmreg), 0xc00); ptrs[2] = JE8(0); - CMP32ItoR(mmreg, 0xc04); + xCMP(xRegister32(mmreg), 0xc04); ptrs[3] = JE8(0); - CMP32ItoR(mmreg, 0xcc0); + xCMP(xRegister32(mmreg), 0xcc0); ptrs[4] = JE8(0); - CMP32ItoR(mmreg, 0xcc4); + xCMP(xRegister32(mmreg), 0xcc4); ptrs[5] = JE8(0); - CMP32ItoR(mmreg, 0x0c4); + xCMP(xRegister32(mmreg), 0x0c4); ptrs[6] = JE8(0); // ok - CMP32ItoR(mmreg, 0x1e988); + xCMP(xRegister32(mmreg), 0x1e988); ptrs[7] = JE8(0); - CMP32ItoR(mmreg, 0x1edd8); + xCMP(xRegister32(mmreg), 0x1edd8); ptrs[8] = JE8(0); x86SetJ8(ptrs[0]); @@ -845,12 +845,12 @@ int psxRecMemConstWrite32(u32 mem, int mmreg) x86SetJ8(ptrs[4]); x86SetJ8(ptrs[5]); x86SetJ8(ptrs[6]); - MOV32ItoM((uptr)&g_psxWriteOk, 0); + xMOV(ptr32[&g_psxWriteOk], 0); ptrs[0] = JMP8(0); x86SetJ8(ptrs[7]); x86SetJ8(ptrs[8]); - MOV32ItoM((uptr)&g_psxWriteOk, 1); + xMOV(ptr32[&g_psxWriteOk], 1); x86SetJ8(ptrs[0]); } @@ -858,7 +858,7 @@ int psxRecMemConstWrite32(u32 mem, int mmreg) return 0; default: - TEST8ItoM((uptr)&g_psxWriteOk, 1); + xTEST(ptr8[(u8*)((uptr)&g_psxWriteOk)], 1); j8Ptr[0] = JZ8(0); _eeWriteConstMem32((u32)PSXM(mem), mmreg); x86SetJ8(j8Ptr[0]); diff --git a/pcsx2/x86/iR3000A.cpp b/pcsx2/x86/iR3000A.cpp index d8c8f116ed..08bd93fc86 100644 --- a/pcsx2/x86/iR3000A.cpp +++ b/pcsx2/x86/iR3000A.cpp @@ -485,7 +485,7 @@ int _psxFlushUnusedConstReg() !_recIsRegWritten(g_pCurInstInfo+1, (s_nEndBlock-psxpc)/4, XMMTYPE_GPRREG, i) ) { // check if will be written in the future - MOV32ItoM((uptr)&psxRegs.GPR.r[i], g_psxConstRegs[i]); + xMOV(ptr32[&psxRegs.GPR.r[i]], g_psxConstRegs[i]); g_psxFlushedConstReg |= 1<> 16 == 0x2400) { - MOV32ItoM( (uptr)&psxRegs.code, psxRegs.code ); - MOV32ItoM( (uptr)&psxRegs.pc, psxpc ); + xMOV(ptr32[&psxRegs.code], psxRegs.code ); + xMOV(ptr32[&psxRegs.pc], psxpc ); _psxFlushCall(FLUSH_NODESTROY); const char *libname = irxImportLibname(psxpc); @@ -986,15 +986,15 @@ void psxSetBranchReg(u32 reg) if( x86regs[ESI].inuse ) { pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); - MOV32RtoM((uptr)&psxRegs.pc, ESI); + xMOV(ptr[&psxRegs.pc], esi); x86regs[ESI].inuse = 0; #ifdef PCSX2_DEBUG xOR( esi, esi ); #endif } else { - MOV32MtoR(EAX, (uptr)&g_recWriteback); - MOV32RtoM((uptr)&psxRegs.pc, EAX); + xMOV(eax, ptr[&g_recWriteback]); + xMOV(ptr[&psxRegs.pc], eax); #ifdef PCSX2_DEBUG xOR( eax, eax ); @@ -1020,7 +1020,7 @@ void psxSetBranchImm( u32 imm ) pxAssert( imm ); // end the current block - MOV32ItoM( (uptr)&psxRegs.pc, imm ); + xMOV(ptr32[&psxRegs.pc], imm ); _psxFlushCall(FLUSH_EVERYTHING); iPsxBranchTest(imm, imm <= psxpc); @@ -1105,19 +1105,19 @@ static void checkcodefn() void rpsxSYSCALL() { - MOV32ItoM( (uptr)&psxRegs.code, psxRegs.code ); - MOV32ItoM((uptr)&psxRegs.pc, psxpc - 4); + xMOV(ptr32[&psxRegs.code], psxRegs.code ); + xMOV(ptr32[&psxRegs.pc], psxpc - 4); _psxFlushCall(FLUSH_NODESTROY); xMOV( ecx, 0x20 ); // exception code xMOV( edx, psxbranch==1 ); // branch delay slot? xCALL( psxException ); - CMP32ItoM((uptr)&psxRegs.pc, psxpc-4); + xCMP(ptr32[&psxRegs.pc], psxpc-4); j8Ptr[0] = JE8(0); - ADD32ItoM((uptr)&psxRegs.cycle, psxScaleBlockCycles() ); - SUB32ItoM((uptr)&iopCycleEE, psxScaleBlockCycles()*8 ); + xADD(ptr32[&psxRegs.cycle], psxScaleBlockCycles() ); + xSUB(ptr32[&iopCycleEE], psxScaleBlockCycles()*8 ); JMP32((uptr)iopDispatcherReg - ( (uptr)x86Ptr + 5 )); // jump target for skipping blockCycle updates @@ -1128,18 +1128,18 @@ void rpsxSYSCALL() void rpsxBREAK() { - MOV32ItoM( (uptr)&psxRegs.code, psxRegs.code ); - MOV32ItoM((uptr)&psxRegs.pc, psxpc - 4); + xMOV(ptr32[&psxRegs.code], psxRegs.code ); + xMOV(ptr32[&psxRegs.pc], psxpc - 4); _psxFlushCall(FLUSH_NODESTROY); xMOV( ecx, 0x24 ); // exception code xMOV( edx, psxbranch==1 ); // branch delay slot? xCALL( psxException ); - CMP32ItoM((uptr)&psxRegs.pc, psxpc-4); + xCMP(ptr32[&psxRegs.pc], psxpc-4); j8Ptr[0] = JE8(0); - ADD32ItoM((uptr)&psxRegs.cycle, psxScaleBlockCycles() ); - SUB32ItoM((uptr)&iopCycleEE, psxScaleBlockCycles()*8 ); + xADD(ptr32[&psxRegs.cycle], psxScaleBlockCycles() ); + xSUB(ptr32[&iopCycleEE], psxScaleBlockCycles()*8 ); JMP32((uptr)iopDispatcherReg - ( (uptr)x86Ptr + 5 )); x86SetJ8(j8Ptr[0]); @@ -1154,7 +1154,7 @@ void psxRecompileNextInstruction(int delayslot) //BASEBLOCK* pblock = PSX_GETBLOCK(psxpc); if( IsDebugBuild ) - MOV32ItoR(EAX, psxpc); + xMOV(eax, psxpc); psxRegs.code = iopMemRead32( psxpc ); s_psxBlockCycles++; @@ -1393,14 +1393,14 @@ StartRecomp: if( psxbranch ) pxAssert( !willbranch3 ); else { - ADD32ItoM((uptr)&psxRegs.cycle, psxScaleBlockCycles() ); - SUB32ItoM((uptr)&iopCycleEE, psxScaleBlockCycles()*8 ); + xADD(ptr32[&psxRegs.cycle], psxScaleBlockCycles() ); + xSUB(ptr32[&iopCycleEE], psxScaleBlockCycles()*8 ); } if (willbranch3 || !psxbranch) { pxAssert( psxpc == s_nEndBlock ); _psxFlushCall(FLUSH_EVERYTHING); - MOV32ItoM((uptr)&psxRegs.pc, psxpc); + xMOV(ptr32[&psxRegs.pc], psxpc); recBlocks.Link(HWADDR(s_nEndBlock), xJcc32() ); psxbranch = 3; } diff --git a/pcsx2/x86/iR3000Atables.cpp b/pcsx2/x86/iR3000Atables.cpp index b6123253a6..5c74bf6f3b 100644 --- a/pcsx2/x86/iR3000Atables.cpp +++ b/pcsx2/x86/iR3000Atables.cpp @@ -30,9 +30,9 @@ extern u32 g_psxMaxRecMem; // R3000A instruction implementation #define REC_FUNC(f) \ static void rpsx##f() { \ - MOV32ItoM((uptr)&psxRegs.code, (u32)psxRegs.code); \ + xMOV(ptr32[&psxRegs.code], (u32)psxRegs.code); \ _psxFlushCall(FLUSH_EVERYTHING); \ - CALLFunc((uptr)psx##f); \ + xCALL((void*)(uptr)psx##f); \ PSX_DEL_CONST(_Rt_); \ /* branch = 2; */\ } @@ -53,15 +53,15 @@ void rpsxADDconst(int dreg, int sreg, u32 off, int info) { if (sreg) { if (sreg == dreg) { - ADD32ItoM((uptr)&psxRegs.GPR.r[dreg], off); + xADD(ptr32[&psxRegs.GPR.r[dreg]], off); } else { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[sreg]); - if (off) ADD32ItoR(EAX, off); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[sreg]]); + if (off) xADD(eax, off); + xMOV(ptr[&psxRegs.GPR.r[dreg]], eax); } } else { - MOV32ItoM((uptr)&psxRegs.GPR.r[dreg], off); + xMOV(ptr32[&psxRegs.GPR.r[dreg]], off); } } @@ -84,10 +84,10 @@ void rpsxSLTI_const() void rpsxSLTconst(int info, int dreg, int sreg, int imm) { - XOR32RtoR(EAX, EAX); - CMP32ItoM((uptr)&psxRegs.GPR.r[sreg], imm); - SETL8R(EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], EAX); + xXOR(eax, eax); + xCMP(ptr32[&psxRegs.GPR.r[sreg]], imm); + xSETL(al); + xMOV(ptr[&psxRegs.GPR.r[dreg]], eax); } void rpsxSLTI_(int info) { rpsxSLTconst(info, _Rt_, _Rs_, _Imm_); } @@ -102,10 +102,10 @@ void rpsxSLTIU_const() void rpsxSLTUconst(int info, int dreg, int sreg, int imm) { - XOR32RtoR(EAX, EAX); - CMP32ItoM((uptr)&psxRegs.GPR.r[sreg], imm); - SETB8R(EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], EAX); + xXOR(eax, eax); + xCMP(ptr32[&psxRegs.GPR.r[sreg]], imm); + xSETB(al); + xMOV(ptr[&psxRegs.GPR.r[dreg]], eax); } void rpsxSLTIU_(int info) { rpsxSLTUconst(info, _Rt_, _Rs_, (s32)_Imm_); } @@ -122,14 +122,14 @@ void rpsxANDconst(int info, int dreg, int sreg, u32 imm) { if (imm) { if (sreg == dreg) { - AND32ItoM((uptr)&psxRegs.GPR.r[dreg], imm); + xAND(ptr32[&psxRegs.GPR.r[dreg]], imm); } else { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[sreg]); - AND32ItoR(EAX, imm); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[sreg]]); + xAND(eax, imm); + xMOV(ptr[&psxRegs.GPR.r[dreg]], eax); } } else { - MOV32ItoM((uptr)&psxRegs.GPR.r[dreg], 0); + xMOV(ptr32[&psxRegs.GPR.r[dreg]], 0); } } @@ -147,18 +147,18 @@ void rpsxORconst(int info, int dreg, int sreg, u32 imm) { if (imm) { if (sreg == dreg) { - OR32ItoM((uptr)&psxRegs.GPR.r[dreg], imm); + xOR(ptr32[&psxRegs.GPR.r[dreg]], imm); } else { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[sreg]); - OR32ItoR (EAX, imm); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[sreg]]); + xOR(eax, imm); + xMOV(ptr[&psxRegs.GPR.r[dreg]], eax); } } else { if( dreg != sreg ) { - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[sreg]); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], ECX); + xMOV(ecx, ptr[&psxRegs.GPR.r[sreg]]); + xMOV(ptr[&psxRegs.GPR.r[dreg]], ecx); } } } @@ -176,29 +176,29 @@ void rpsxXORconst(int info, int dreg, int sreg, u32 imm) { if( imm == 0xffffffff ) { if( dreg == sreg ) { - NOT32M((uptr)&psxRegs.GPR.r[dreg]); + xNOT(ptr32[&psxRegs.GPR.r[dreg]]); } else { - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[sreg]); - NOT32R(ECX); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], ECX); + xMOV(ecx, ptr[&psxRegs.GPR.r[sreg]]); + xNOT(ecx); + xMOV(ptr[&psxRegs.GPR.r[dreg]], ecx); } } else if (imm) { if (sreg == dreg) { - XOR32ItoM((uptr)&psxRegs.GPR.r[dreg], imm); + xXOR(ptr32[&psxRegs.GPR.r[dreg]], imm); } else { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[sreg]); - XOR32ItoR(EAX, imm); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[sreg]]); + xXOR(eax, imm); + xMOV(ptr[&psxRegs.GPR.r[dreg]], eax); } } else { if( dreg != sreg ) { - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[sreg]); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], ECX); + xMOV(ecx, ptr[&psxRegs.GPR.r[sreg]]); + xMOV(ptr[&psxRegs.GPR.r[dreg]], ecx); } } } @@ -231,16 +231,16 @@ void rpsxADDU_constt(int info) void rpsxADDU_(int info) { if (_Rs_ && _Rt_) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - ADD32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + xADD(eax, ptr[&psxRegs.GPR.r[_Rt_]]); } else if (_Rs_) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); } else if (_Rt_) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rt_]]); } else { - XOR32RtoR(EAX, EAX); + xXOR(eax, eax); } - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } PSXRECOMPILE_CONSTCODE0(ADDU); @@ -255,9 +255,9 @@ void rpsxSUBU_const() void rpsxSUBU_consts(int info) { - MOV32ItoR(EAX, g_psxConstRegs[_Rs_]); - SUB32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, g_psxConstRegs[_Rs_]); + xSUB(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } void rpsxSUBU_constt(int info) { rpsxADDconst(_Rd_, _Rs_, -(int)g_psxConstRegs[_Rt_], info); } @@ -268,13 +268,13 @@ void rpsxSUBU_(int info) if (!_Rd_) return; if( _Rd_ == _Rs_ ) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - SUB32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xSUB(ptr[&psxRegs.GPR.r[_Rd_]], eax); } else { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - SUB32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + xSUB(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } } @@ -286,17 +286,17 @@ void rpsxLogicalOp(int info, int op) { if( _Rd_ == _Rs_ || _Rd_ == _Rt_ ) { int vreg = _Rd_ == _Rs_ ? _Rt_ : _Rs_; - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[vreg]); + xMOV(ecx, ptr[&psxRegs.GPR.r[vreg]]); LogicalOp32RtoM((uptr)&psxRegs.GPR.r[_Rd_], ECX, op); if( op == 3 ) - NOT32M((uptr)&psxRegs.GPR.r[_Rd_]); + xNOT(ptr32[&psxRegs.GPR.r[_Rd_]]); } else { - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); LogicalOp32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_], op); if( op == 3 ) - NOT32R(ECX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], ECX); + xNOT(ecx); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], ecx); } } @@ -344,24 +344,24 @@ void rpsxNORconst(int info, int dreg, int sreg, u32 imm) { if( imm ) { if( dreg == sreg ) { - OR32ItoM((uptr)&psxRegs.GPR.r[dreg], imm); - NOT32M((uptr)&psxRegs.GPR.r[dreg]); + xOR(ptr32[&psxRegs.GPR.r[dreg]], imm); + xNOT(ptr32[&psxRegs.GPR.r[dreg]]); } else { - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[sreg]); - OR32ItoR(ECX, imm); - NOT32R(ECX); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], ECX); + xMOV(ecx, ptr[&psxRegs.GPR.r[sreg]]); + xOR(ecx, imm); + xNOT(ecx); + xMOV(ptr[&psxRegs.GPR.r[dreg]], ecx); } } else { if( dreg == sreg ) { - NOT32M((uptr)&psxRegs.GPR.r[dreg]); + xNOT(ptr32[&psxRegs.GPR.r[dreg]]); } else { - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[sreg]); - NOT32R(ECX); - MOV32RtoM((uptr)&psxRegs.GPR.r[dreg], ECX); + xMOV(ecx, ptr[&psxRegs.GPR.r[sreg]]); + xNOT(ecx); + xMOV(ptr[&psxRegs.GPR.r[dreg]], ecx); } } } @@ -380,20 +380,20 @@ void rpsxSLT_const() void rpsxSLT_consts(int info) { - XOR32RtoR(EAX, EAX); - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rt_], g_psxConstRegs[_Rs_]); - SETG8R(EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xXOR(eax, eax); + xCMP(ptr32[&psxRegs.GPR.r[_Rt_]], g_psxConstRegs[_Rs_]); + xSETG(al); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } void rpsxSLT_constt(int info) { rpsxSLTconst(info, _Rd_, _Rs_, g_psxConstRegs[_Rt_]); } void rpsxSLT_(int info) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - SETL8R (EAX); - AND32ItoR(EAX, 0xff); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + xCMP(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xSETL(al); + xAND(eax, 0xff); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } PSXRECOMPILE_CONSTCODE0(SLT); @@ -406,10 +406,10 @@ void rpsxSLTU_const() void rpsxSLTU_consts(int info) { - XOR32RtoR(EAX, EAX); - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rt_], g_psxConstRegs[_Rs_]); - SETA8R(EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xXOR(eax, eax); + xCMP(ptr32[&psxRegs.GPR.r[_Rt_]], g_psxConstRegs[_Rs_]); + xSETA(al); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } void rpsxSLTU_constt(int info) { rpsxSLTUconst(info, _Rd_, _Rs_, g_psxConstRegs[_Rt_]); } @@ -418,11 +418,11 @@ void rpsxSLTU_(int info) // Rd = Rs < Rt (unsigned) if (!_Rd_) return; - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - SBB32RtoR(EAX, EAX); - NEG32R (EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + xCMP(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xSBB(eax, eax); + xNEG(eax); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } PSXRECOMPILE_CONSTCODE0(SLTU); @@ -432,28 +432,28 @@ void rpsxMULT_const() { u64 res = (s64)((s64)*(int*)&g_psxConstRegs[_Rs_] * (s64)*(int*)&g_psxConstRegs[_Rt_]); - MOV32ItoM((uptr)&psxRegs.GPR.n.hi, (u32)((res >> 32) & 0xffffffff)); - MOV32ItoM((uptr)&psxRegs.GPR.n.lo, (u32)(res & 0xffffffff)); + xMOV(ptr32[&psxRegs.GPR.n.hi], (u32)((res >> 32) & 0xffffffff)); + xMOV(ptr32[&psxRegs.GPR.n.lo], (u32)(res & 0xffffffff)); } void rpsxMULTsuperconst(int info, int sreg, int imm, int sign) { // Lo/Hi = Rs * Rt (signed) - MOV32ItoR(EAX, imm); - if( sign ) IMUL32M ((uptr)&psxRegs.GPR.r[sreg]); - else MUL32M ((uptr)&psxRegs.GPR.r[sreg]); - MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX); + xMOV(eax, imm); + if( sign ) xMUL(ptr32[&psxRegs.GPR.r[sreg]]); + else xUMUL(ptr32[&psxRegs.GPR.r[sreg]]); + xMOV(ptr[&psxRegs.GPR.n.lo], eax); + xMOV(ptr[&psxRegs.GPR.n.hi], edx); } void rpsxMULTsuper(int info, int sign) { // Lo/Hi = Rs * Rt (signed) - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - if( sign ) IMUL32M ((uptr)&psxRegs.GPR.r[_Rt_]); - else MUL32M ((uptr)&psxRegs.GPR.r[_Rt_]); - MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + if( sign ) xMUL(ptr32[&psxRegs.GPR.r[_Rt_]]); + else xUMUL(ptr32[&psxRegs.GPR.r[_Rt_]]); + xMOV(ptr[&psxRegs.GPR.n.lo], eax); + xMOV(ptr[&psxRegs.GPR.n.hi], edx); } void rpsxMULT_consts(int info) { rpsxMULTsuperconst(info, _Rt_, g_psxConstRegs[_Rs_], 1); } @@ -467,8 +467,8 @@ void rpsxMULTU_const() { u64 res = (u64)((u64)g_psxConstRegs[_Rs_] * (u64)g_psxConstRegs[_Rt_]); - MOV32ItoM((uptr)&psxRegs.GPR.n.hi, (u32)((res >> 32) & 0xffffffff)); - MOV32ItoM((uptr)&psxRegs.GPR.n.lo, (u32)(res & 0xffffffff)); + xMOV(ptr32[&psxRegs.GPR.n.hi], (u32)((res >> 32) & 0xffffffff)); + xMOV(ptr32[&psxRegs.GPR.n.lo], (u32)(res & 0xffffffff)); } void rpsxMULTU_consts(int info) { rpsxMULTsuperconst(info, _Rt_, g_psxConstRegs[_Rs_], 0); } @@ -485,8 +485,8 @@ void rpsxDIV_const() if (g_psxConstRegs[_Rt_] != 0) { lo = *(int*)&g_psxConstRegs[_Rs_] / *(int*)&g_psxConstRegs[_Rt_]; hi = *(int*)&g_psxConstRegs[_Rs_] % *(int*)&g_psxConstRegs[_Rt_]; - MOV32ItoM((uptr)&psxRegs.GPR.n.hi, hi); - MOV32ItoM((uptr)&psxRegs.GPR.n.lo, lo); + xMOV(ptr32[&psxRegs.GPR.n.hi], hi); + xMOV(ptr32[&psxRegs.GPR.n.lo], lo); } } @@ -496,30 +496,30 @@ void rpsxDIVsuperconsts(int info, int sign) if( imm ) { // Lo/Hi = Rs / Rt (signed) - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]); - CMP32ItoR(ECX, 0); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rt_]]); + xCMP(ecx, 0); j8Ptr[0] = JE8(0); - MOV32ItoR(EAX, imm); + xMOV(eax, imm); if( sign ) { - CDQ(); - IDIV32R (ECX); + xCDQ(); + xDIV(ecx); } else { - XOR32RtoR( EDX, EDX ); - DIV32R(ECX); + xXOR(edx, edx); + xUDIV(ecx); } - MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX); + xMOV(ptr[&psxRegs.GPR.n.lo], eax); + xMOV(ptr[&psxRegs.GPR.n.hi], edx); x86SetJ8(j8Ptr[0]); } else { - XOR32RtoR(EAX, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX); + xXOR(eax, eax); + xMOV(ptr[&psxRegs.GPR.n.hi], eax); + xMOV(ptr[&psxRegs.GPR.n.lo], eax); } } @@ -528,44 +528,44 @@ void rpsxDIVsuperconstt(int info, int sign) u32 imm = g_psxConstRegs[_Rt_]; if( imm ) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - MOV32ItoR(ECX, imm); - //CDQ(); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + xMOV(ecx, imm); + //xCDQ(); if( sign ) { - CDQ(); - IDIV32R (ECX); + xCDQ(); + xDIV(ecx); } else { - XOR32RtoR( EDX, EDX ); - DIV32R(ECX); + xXOR(edx, edx); + xUDIV(ecx); } - MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX); + xMOV(ptr[&psxRegs.GPR.n.lo], eax); + xMOV(ptr[&psxRegs.GPR.n.hi], edx); } } void rpsxDIVsuper(int info, int sign) { // Lo/Hi = Rs / Rt (signed) - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]); - CMP32ItoR(ECX, 0); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rt_]]); + xCMP(ecx, 0); j8Ptr[0] = JE8(0); - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); if( sign ) { - CDQ(); - IDIV32R (ECX); + xCDQ(); + xDIV(ecx); } else { - XOR32RtoR( EDX, EDX ); - DIV32R(ECX); + xXOR(edx, edx); + xUDIV(ecx); } - MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX); + xMOV(ptr[&psxRegs.GPR.n.lo], eax); + xMOV(ptr[&psxRegs.GPR.n.hi], edx); x86SetJ8(j8Ptr[0]); } @@ -583,8 +583,8 @@ void rpsxDIVU_const() if (g_psxConstRegs[_Rt_] != 0) { lo = g_psxConstRegs[_Rs_] / g_psxConstRegs[_Rt_]; hi = g_psxConstRegs[_Rs_] % g_psxConstRegs[_Rt_]; - MOV32ItoM((uptr)&psxRegs.GPR.n.hi, hi); - MOV32ItoM((uptr)&psxRegs.GPR.n.lo, lo); + xMOV(ptr32[&psxRegs.GPR.n.hi], hi); + xMOV(ptr32[&psxRegs.GPR.n.lo], lo); } } @@ -608,12 +608,12 @@ static void rpsxLB() _psxOnWriteReg(_Rt_); _psxDeleteReg(_Rt_, 0); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); xCALL( iopMemRead8 ); // returns value in EAX if (_Rt_) { - MOVSX32R8toR(EAX, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX); + xMOVSX(eax, al); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], eax); } PSX_DEL_CONST(_Rt_); } @@ -624,12 +624,12 @@ static void rpsxLBU() _psxOnWriteReg(_Rt_); _psxDeleteReg(_Rt_, 0); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); xCALL( iopMemRead8 ); // returns value in EAX if (_Rt_) { - MOVZX32R8toR(EAX, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX); + xMOVZX(eax, al); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], eax); } PSX_DEL_CONST(_Rt_); } @@ -640,12 +640,12 @@ static void rpsxLH() _psxOnWriteReg(_Rt_); _psxDeleteReg(_Rt_, 0); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); xCALL( iopMemRead16 ); // returns value in EAX if (_Rt_) { - MOVSX32R16toR(EAX, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX); + xMOVSX(eax, ax); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], eax); } PSX_DEL_CONST(_Rt_); } @@ -656,12 +656,12 @@ static void rpsxLHU() _psxOnWriteReg(_Rt_); _psxDeleteReg(_Rt_, 0); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); xCALL( iopMemRead16 ); // returns value in EAX if (_Rt_) { - MOVZX32R16toR(EAX, EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX); + xMOVZX(eax, ax); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], eax); } PSX_DEL_CONST(_Rt_); } @@ -673,25 +673,25 @@ static void rpsxLW() _psxDeleteReg(_Rt_, 0); _psxFlushCall(FLUSH_EVERYTHING); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); - TEST32ItoR(ECX, 0x10000000); + xTEST(ecx, 0x10000000); j8Ptr[0] = JZ8(0); xCALL( iopMemRead32 ); // returns value in EAX if (_Rt_) { - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], eax); } j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); // read from psM directly - AND32ItoR(ECX, 0x1fffff); - ADD32ItoR(ECX, (uptr)iopMem->Main); + xAND(ecx, 0x1fffff); + xADD(ecx, (uptr)iopMem->Main); - MOV32RmtoR( ECX, ECX ); - MOV32RtoM( (uptr)&psxRegs.GPR.r[_Rt_], ECX); + xMOV(ecx, ptr[xAddressReg(ECX )]); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], ecx); x86SetJ8(j8Ptr[1]); PSX_DEL_CONST(_Rt_); @@ -702,8 +702,8 @@ static void rpsxSB() _psxDeleteReg(_Rs_, 1); _psxDeleteReg(_Rt_, 1); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); xMOV( edx, ptr[&psxRegs.GPR.r[_Rt_]] ); xCALL( iopMemWrite8 ); } @@ -713,8 +713,8 @@ static void rpsxSH() _psxDeleteReg(_Rs_, 1); _psxDeleteReg(_Rt_, 1); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); xMOV( edx, ptr[&psxRegs.GPR.r[_Rt_]] ); xCALL( iopMemWrite16 ); } @@ -724,8 +724,8 @@ static void rpsxSW() _psxDeleteReg(_Rs_, 1); _psxDeleteReg(_Rt_, 1); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - if (_Imm_) ADD32ItoR(ECX, _Imm_); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + if (_Imm_) xADD(ecx, _Imm_); xMOV( edx, ptr[&psxRegs.GPR.r[_Rt_]] ); xCALL( iopMemWrite32 ); } @@ -743,25 +743,25 @@ void rpsxShiftConst(int info, int rdreg, int rtreg, int imm, int shifttype) if (imm) { if( rdreg == rtreg ) { switch(shifttype) { - case 0: SHL32ItoM((uptr)&psxRegs.GPR.r[rdreg], imm); break; - case 1: SHR32ItoM((uptr)&psxRegs.GPR.r[rdreg], imm); break; - case 2: SAR32ItoM((uptr)&psxRegs.GPR.r[rdreg], imm); break; + case 0: xSHL(ptr32[&psxRegs.GPR.r[rdreg]], imm); break; + case 1: xSHR(ptr32[&psxRegs.GPR.r[rdreg]], imm); break; + case 2: xSAR(ptr32[&psxRegs.GPR.r[rdreg]], imm); break; } } else { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[rtreg]); + xMOV(eax, ptr[&psxRegs.GPR.r[rtreg]]); switch(shifttype) { - case 0: SHL32ItoR(EAX, imm); break; - case 1: SHR32ItoR(EAX, imm); break; - case 2: SAR32ItoR(EAX, imm); break; + case 0: xSHL(eax, imm); break; + case 1: xSHR(eax, imm); break; + case 2: xSAR(eax, imm); break; } - MOV32RtoM((uptr)&psxRegs.GPR.r[rdreg], EAX); + xMOV(ptr[&psxRegs.GPR.r[rdreg]], eax); } } else { if( rdreg != rtreg ) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[rtreg]); - MOV32RtoM((uptr)&psxRegs.GPR.r[rdreg], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[rtreg]]); + xMOV(ptr[&psxRegs.GPR.r[rdreg]], eax); } } } @@ -800,24 +800,24 @@ void rpsxShiftVconsts(int info, int shifttype) void rpsxShiftVconstt(int info, int shifttype) { - MOV32ItoR(EAX, g_psxConstRegs[_Rt_]); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); + xMOV(eax, g_psxConstRegs[_Rt_]); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); switch(shifttype) { - case 0: SHL32CLtoR(EAX); break; - case 1: SHR32CLtoR(EAX); break; - case 2: SAR32CLtoR(EAX); break; + case 0: xSHL(eax, cl); break; + case 1: xSHR(eax, cl); break; + case 2: xSAR(eax, cl); break; } - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } void rpsxSLLV_consts(int info) { rpsxShiftVconsts(info, 0); } void rpsxSLLV_constt(int info) { rpsxShiftVconstt(info, 0); } void rpsxSLLV_(int info) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - SHL32CLtoR(EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + xSHL(eax, cl); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } PSXRECOMPILE_CONSTCODE0(SLLV); @@ -832,10 +832,10 @@ void rpsxSRLV_consts(int info) { rpsxShiftVconsts(info, 1); } void rpsxSRLV_constt(int info) { rpsxShiftVconstt(info, 1); } void rpsxSRLV_(int info) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - SHR32CLtoR(EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + xSHR(eax, cl); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } PSXRECOMPILE_CONSTCODE0(SRLV); @@ -850,10 +850,10 @@ void rpsxSRAV_consts(int info) { rpsxShiftVconsts(info, 2); } void rpsxSRAV_constt(int info) { rpsxShiftVconstt(info, 2); } void rpsxSRAV_(int info) { - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]); - SAR32CLtoR(EAX); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xMOV(ecx, ptr[&psxRegs.GPR.r[_Rs_]]); + xSAR(eax, cl); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } PSXRECOMPILE_CONSTCODE0(SRAV); @@ -867,19 +867,19 @@ void rpsxMFHI() _psxOnWriteReg(_Rd_); _psxDeleteReg(_Rd_, 0); - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.n.hi); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.n.hi]); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } void rpsxMTHI() { if( PSX_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&psxRegs.GPR.n.hi, g_psxConstRegs[_Rs_]); + xMOV(ptr32[&psxRegs.GPR.n.hi], g_psxConstRegs[_Rs_]); } else { _psxDeleteReg(_Rs_, 1); - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + xMOV(ptr[&psxRegs.GPR.n.hi], eax); } } @@ -889,19 +889,19 @@ void rpsxMFLO() _psxOnWriteReg(_Rd_); _psxDeleteReg(_Rd_, 0); - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.n.lo); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.n.lo]); + xMOV(ptr[&psxRegs.GPR.r[_Rd_]], eax); } void rpsxMTLO() { if( PSX_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&psxRegs.GPR.n.hi, g_psxConstRegs[_Rs_]); + xMOV(ptr32[&psxRegs.GPR.n.hi], g_psxConstRegs[_Rs_]); } else { _psxDeleteReg(_Rs_, 1); - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]); - MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rs_]]); + xMOV(ptr[&psxRegs.GPR.n.lo], eax); } } @@ -946,7 +946,7 @@ void rpsxJALR() if( x86regs[ESI].inuse ) { pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); - MOV32RtoM((uptr)&psxRegs.pc, ESI); + xMOV(ptr[&psxRegs.pc], esi); x86regs[ESI].inuse = 0; #ifdef PCSX2_DEBUG xOR( esi, esi ); @@ -954,8 +954,8 @@ void rpsxJALR() } else { - MOV32MtoR(EAX, (uptr)&g_recWriteback); - MOV32RtoM((uptr)&psxRegs.pc, EAX); + xMOV(eax, ptr[&g_recWriteback]); + xMOV(ptr[&psxRegs.pc], eax); #ifdef PCSX2_DEBUG xOR( eax, eax ); #endif @@ -975,16 +975,16 @@ static u32* s_pbranchjmp; void rpsxSetBranchEQ(int info, int process) { if( process & PROCESS_CONSTS ) { - CMP32ItoM( (uptr)&psxRegs.GPR.r[ _Rt_ ], g_psxConstRegs[_Rs_] ); + xCMP(ptr32[&psxRegs.GPR.r[ _Rt_ ]], g_psxConstRegs[_Rs_] ); s_pbranchjmp = JNE32( 0 ); } else if( process & PROCESS_CONSTT ) { - CMP32ItoM( (uptr)&psxRegs.GPR.r[ _Rs_ ], g_psxConstRegs[_Rt_] ); + xCMP(ptr32[&psxRegs.GPR.r[ _Rs_ ]], g_psxConstRegs[_Rt_] ); s_pbranchjmp = JNE32( 0 ); } else { - MOV32MtoR( EAX, (uptr)&psxRegs.GPR.r[ _Rs_ ] ); - CMP32MtoR( EAX, (uptr)&psxRegs.GPR.r[ _Rt_ ] ); + xMOV(eax, ptr[&psxRegs.GPR.r[ _Rs_ ] ]); + xCMP(eax, ptr[&psxRegs.GPR.r[ _Rt_ ] ]); s_pbranchjmp = JNE32( 0 ); } } @@ -1101,7 +1101,7 @@ void rpsxBLTZ() return; } - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0); + xCMP(ptr32[&psxRegs.GPR.r[_Rs_]], 0); u32* pjmp = JL32(0); psxSaveBranchState(); @@ -1135,7 +1135,7 @@ void rpsxBGEZ() return; } - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0); + xCMP(ptr32[&psxRegs.GPR.r[_Rs_]], 0); u32* pjmp = JGE32(0); psxSaveBranchState(); @@ -1175,7 +1175,7 @@ void rpsxBLTZAL() return; } - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0); + xCMP(ptr32[&psxRegs.GPR.r[_Rs_]], 0); u32* pjmp = JL32(0); psxSaveBranchState(); @@ -1215,7 +1215,7 @@ void rpsxBGEZAL() return; } - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0); + xCMP(ptr32[&psxRegs.GPR.r[_Rs_]], 0); u32* pjmp = JGE32(0); psxSaveBranchState(); @@ -1253,7 +1253,7 @@ void rpsxBLEZ() _psxDeleteReg(_Rs_, 1); _clearNeededX86regs(); - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0); + xCMP(ptr32[&psxRegs.GPR.r[_Rs_]], 0); u32* pjmp = JLE32(0); psxSaveBranchState(); @@ -1288,7 +1288,7 @@ void rpsxBGTZ() _psxDeleteReg(_Rs_, 1); _clearNeededX86regs(); - CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0); + xCMP(ptr32[&psxRegs.GPR.r[_Rs_]], 0); u32* pjmp = JG32(0); psxSaveBranchState(); @@ -1309,8 +1309,8 @@ void rpsxMFC0() if (!_Rt_) return; _psxOnWriteReg(_Rt_); - MOV32MtoR(EAX, (uptr)&psxRegs.CP0.r[_Rd_]); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX); + xMOV(eax, ptr[&psxRegs.CP0.r[_Rd_]]); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], eax); } void rpsxCFC0() @@ -1319,20 +1319,20 @@ void rpsxCFC0() if (!_Rt_) return; _psxOnWriteReg(_Rt_); - MOV32MtoR(EAX, (uptr)&psxRegs.CP0.r[_Rd_]); - MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX); + xMOV(eax, ptr[&psxRegs.CP0.r[_Rd_]]); + xMOV(ptr[&psxRegs.GPR.r[_Rt_]], eax); } void rpsxMTC0() { // Cop0->Rd = Rt if( PSX_IS_CONST1(_Rt_) ) { - MOV32ItoM((uptr)&psxRegs.CP0.r[_Rd_], g_psxConstRegs[_Rt_]); + xMOV(ptr32[&psxRegs.CP0.r[_Rd_]], g_psxConstRegs[_Rt_]); } else { _psxDeleteReg(_Rt_, 1); - MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]); - MOV32RtoM((uptr)&psxRegs.CP0.r[_Rd_], EAX); + xMOV(eax, ptr[&psxRegs.GPR.r[_Rt_]]); + xMOV(ptr[&psxRegs.CP0.r[_Rd_]], eax); } } @@ -1344,18 +1344,18 @@ void rpsxCTC0() void rpsxRFE() { - MOV32MtoR(EAX, (uptr)&psxRegs.CP0.n.Status); - MOV32RtoR(ECX, EAX); - AND32ItoR(EAX, 0xfffffff0); - AND32ItoR(ECX, 0x3c); - SHR32ItoR(ECX, 2); - OR32RtoR (EAX, ECX); - MOV32RtoM((uptr)&psxRegs.CP0.n.Status, EAX); + xMOV(eax, ptr[&psxRegs.CP0.n.Status]); + xMOV(ecx, eax); + xAND(eax, 0xfffffff0); + xAND(ecx, 0x3c); + xSHR(ecx, 2); + xOR(eax, ecx); + xMOV(ptr[&psxRegs.CP0.n.Status], eax); // Test the IOP's INTC status, so that any pending ints get raised. _psxFlushCall(0); - CALLFunc( (uptr)&iopTestIntc ); + xCALL((void*)(uptr)&iopTestIntc ); } // R3000A tables diff --git a/pcsx2/x86/iR5900Misc.cpp b/pcsx2/x86/iR5900Misc.cpp index e59bd8b5cb..79e735df0a 100644 --- a/pcsx2/x86/iR5900Misc.cpp +++ b/pcsx2/x86/iR5900Misc.cpp @@ -68,15 +68,15 @@ namespace OpcodeImpl { //////////////////////////////////////////////////// //static void recCACHE() { -// MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); -// MOV32ItoM( (uptr)&cpuRegs.pc, pc ); +// xMOV(ptr32[&cpuRegs.code], cpuRegs.code ); +// xMOV(ptr32[&cpuRegs.pc], pc ); // iFlushCall(FLUSH_EVERYTHING); -// CALLFunc( (uptr)CACHE ); +// xCALL((void*)(uptr)CACHE ); // //branch = 2; // -// CMP32ItoM((int)&cpuRegs.pc, pc); +// xCMP(ptr32[(u32*)((int)&cpuRegs.pc)], pc); // j8Ptr[0] = JE8(0); -// RET(); +// xRET(); // x86SetJ8(j8Ptr[0]); //} @@ -96,17 +96,17 @@ void recMFSA() mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, MODE_WRITE); if( mmreg >= 0 ) { - SSE_MOVLPS_M64_to_XMM(mmreg, (uptr)&cpuRegs.sa); + xMOVL.PS(xRegisterSSE(mmreg), ptr[&cpuRegs.sa]); } else if( (mmreg = _checkMMXreg(MMX_GPR+_Rd_, MODE_WRITE)) >= 0 ) { - MOVDMtoMMX(mmreg, (uptr)&cpuRegs.sa); + xMOVDZX(xRegisterMMX(mmreg), ptr[&cpuRegs.sa]); SetMMXstate(); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.sa); + xMOV(eax, ptr[&cpuRegs.sa]); _deleteEEreg(_Rd_, 0); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], EAX); - MOV32ItoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], 0); + xMOV(ptr[&cpuRegs.GPR.r[_Rd_].UL[0]], eax); + xMOV(ptr32[&cpuRegs.GPR.r[_Rd_].UL[1]], 0); } } @@ -114,50 +114,50 @@ void recMFSA() void recMTSA() { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, g_cpuConstRegs[_Rs_].UL[0] & 0xf ); + xMOV(ptr32[&cpuRegs.sa], g_cpuConstRegs[_Rs_].UL[0] & 0xf ); } else { int mmreg; if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) { - SSE_MOVSS_XMM_to_M32((uptr)&cpuRegs.sa, mmreg); + xMOVSS(ptr[&cpuRegs.sa], xRegisterSSE(mmreg)); } else if( (mmreg = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) { - MOVDMMXtoM((uptr)&cpuRegs.sa, mmreg); + xMOVD(ptr[&cpuRegs.sa], xRegisterMMX(mmreg)); SetMMXstate(); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - MOV32RtoM((uptr)&cpuRegs.sa, EAX); + xMOV(eax, ptr[&cpuRegs.GPR.r[_Rs_].UL[0]]); + xMOV(ptr[&cpuRegs.sa], eax); } - AND32ItoM((uptr)&cpuRegs.sa, 0xf); + xAND(ptr32[&cpuRegs.sa], 0xf); } } void recMTSAB() { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0xF) ^ (_Imm_ & 0xF)) ); + xMOV(ptr32[&cpuRegs.sa], ((g_cpuConstRegs[_Rs_].UL[0] & 0xF) ^ (_Imm_ & 0xF)) ); } else { _eeMoveGPRtoR(EAX, _Rs_); - AND32ItoR(EAX, 0xF); - XOR32ItoR(EAX, _Imm_&0xf); - MOV32RtoM((uptr)&cpuRegs.sa, EAX); + xAND(eax, 0xF); + xXOR(eax, _Imm_&0xf); + xMOV(ptr[&cpuRegs.sa], eax); } } void recMTSAH() { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0x7) ^ (_Imm_ & 0x7)) << 1); + xMOV(ptr32[&cpuRegs.sa], ((g_cpuConstRegs[_Rs_].UL[0] & 0x7) ^ (_Imm_ & 0x7)) << 1); } else { _eeMoveGPRtoR(EAX, _Rs_); - AND32ItoR(EAX, 0x7); - XOR32ItoR(EAX, _Imm_&0x7); - SHL32ItoR(EAX, 1); - MOV32RtoM((uptr)&cpuRegs.sa, EAX); + xAND(eax, 0x7); + xXOR(eax, _Imm_&0x7); + xSHL(eax, 1); + xMOV(ptr[&cpuRegs.sa], eax); } } @@ -200,10 +200,10 @@ void recMTSAH() // Suikoden 3 uses it a lot void recCACHE() //Interpreter only! { - //MOV32ItoM( (uptr)&cpuRegs.code, (u32)cpuRegs.code ); - //MOV32ItoM( (uptr)&cpuRegs.pc, (u32)pc ); + //xMOV(ptr32[&cpuRegs.code], (u32)cpuRegs.code ); + //xMOV(ptr32[&cpuRegs.pc], (u32)pc ); //iFlushCall(FLUSH_EVERYTHING); - //CALLFunc( (uptr)R5900::Interpreter::OpcodeImpl::CACHE ); + //xCALL((void*)(uptr)R5900::Interpreter::OpcodeImpl::CACHE ); //branch = 2; } diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp index ef022eefc5..3651bbb387 100644 --- a/pcsx2/x86/ix86-32/iCore-32.cpp +++ b/pcsx2/x86/ix86-32/iCore-32.cpp @@ -169,8 +169,8 @@ void _flushCachedRegs() void _flushConstReg(int reg) { if( GPR_IS_CONST1( reg ) && !(g_cpuFlushedConstReg&(1< 0) { - XOR32RtoR(EAX, EAX); + xXOR(eax, eax); eaxval = 0; } if (eaxval == 0) { - NOT32R(EAX); + xNOT(eax); eaxval = -1; } - MOV32RtoM((uptr)&cpuRegs.GPR.r[i].SL[j], EAX); + xMOV(ptr[&cpuRegs.GPR.r[i].SL[j]], eax); done[j + 2] |= 1<= 0 ) - MOV32RtoR(x86reg, readfromreg); + xMOV(xRegister32(x86reg), xRegister32(readfromreg)); else { if( type == X86TYPE_GPR ) { if( reg == 0 ) { - XOR32RtoR(x86reg, x86reg); + xXOR(xRegister32(x86reg), xRegister32(x86reg)); } else { _flushConstReg(reg); @@ -349,11 +349,11 @@ int _allocX86reg(int x86reg, int type, int reg, int mode) else { if( X86_ISVI(type) && reg < 16 ) { if( reg == 0 ) - XOR32RtoR(x86reg, x86reg); + xXOR(xRegister32(x86reg), xRegister32(x86reg)); else - MOVZX32M16toR(x86reg, _x86GetAddr(type, reg)); + xMOVZX(xRegister32(x86reg), ptr16[(u16*)(_x86GetAddr(type, reg))]); } - else MOV32MtoR(x86reg, _x86GetAddr(type, reg)); + else xMOV(xRegister32(x86reg), ptr[(void*)(_x86GetAddr(type, reg))]); } } } @@ -370,9 +370,9 @@ int _checkX86reg(int type, int reg, int mode) if( !(x86regs[i].mode & MODE_READ) && (mode&MODE_READ) ) { if( X86_ISVI(type) ) - MOVZX32M16toR(i, _x86GetAddr(type, reg)); + xMOVZX(xRegister32(i), ptr16[(u16*)(_x86GetAddr(type, reg))]); else - MOV32MtoR(i, _x86GetAddr(type, reg)); + xMOV(xRegister32(i), ptr[(void*)(_x86GetAddr(type, reg))]); } x86regs[i].mode |= mode; @@ -424,9 +424,9 @@ void _deleteX86reg(int type, int reg, int flush) if( x86regs[i].mode & MODE_WRITE) { if( X86_ISVI(type) && x86regs[i].reg < 16 ) - MOV16RtoM(_x86GetAddr(type, x86regs[i].reg), i); + xMOV(ptr[(void*)(_x86GetAddr(type, x86regs[i].reg))], xRegister16(i)); else - MOV32RtoM(_x86GetAddr(type, x86regs[i].reg), i); + xMOV(ptr[(void*)(_x86GetAddr(type, x86regs[i].reg))], xRegister32(i)); // get rid of MODE_WRITE since don't want to flush again x86regs[i].mode &= ~MODE_WRITE; @@ -450,10 +450,10 @@ void _freeX86reg(int x86reg) x86regs[x86reg].mode &= ~MODE_WRITE; if( X86_ISVI(x86regs[x86reg].type) && x86regs[x86reg].reg < 16 ) { - MOV16RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg); + xMOV(ptr[(void*)(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg))], xRegister16(x86reg)); } else - MOV32RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg); + xMOV(ptr[(void*)(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg))], xRegister32(x86reg)); } x86regs[x86reg].inuse = 0; @@ -573,14 +573,14 @@ int _allocMMXreg(int mmxreg, int reg, int mode) SetMMXstate(); if( reg == MMX_GPR ) { // moving in 0s - PXORRtoR(i, i); + xPXOR(xRegisterMMX(i), xRegisterMMX(i)); } else { if( MMX_ISGPR(reg) ) _flushConstReg(reg-MMX_GPR); if( (mode & MODE_READHALF) || (MMX_IS32BITS(reg)&&(mode&MODE_READ)) ) - MOVDMtoMMX(i, (uptr)_MMXGetAddr(reg)); + xMOVDZX(xRegisterMMX(i), ptr[(_MMXGetAddr(reg))]); else - MOVQMtoR(i, (uptr)_MMXGetAddr(reg)); + xMOVQ(xRegisterMMX(i), ptr[(_MMXGetAddr(reg))]); } mmxregs[i].mode |= MODE_READ; @@ -604,14 +604,14 @@ int _allocMMXreg(int mmxreg, int reg, int mode) SetMMXstate(); if( reg == MMX_GPR ) { // moving in 0s - PXORRtoR(mmxreg, mmxreg); + xPXOR(xRegisterMMX(mmxreg), xRegisterMMX(mmxreg)); } else { int xmmreg; if( MMX_ISGPR(reg) && (xmmreg = _checkXMMreg(XMMTYPE_GPRREG, reg-MMX_GPR, 0)) >= 0 ) { - SSE_MOVHPS_XMM_to_M64((uptr)_MMXGetAddr(reg)+8, xmmreg); + xMOVH.PS(ptr[(void*)((uptr)_MMXGetAddr(reg)+8)], xRegisterSSE(xmmreg)); if( mode & MODE_READ ) - SSE2_MOVDQ2Q_XMM_to_MM(mmxreg, xmmreg); + xMOVQ(xRegisterMMX(mmxreg), xRegisterSSE(xmmreg)); if( xmmregs[xmmreg].mode & MODE_WRITE ) mmxregs[mmxreg].mode |= MODE_WRITE; @@ -625,10 +625,10 @@ int _allocMMXreg(int mmxreg, int reg, int mode) } if( (mode & MODE_READHALF) || (MMX_IS32BITS(reg)&&(mode&MODE_READ)) ) { - MOVDMtoMMX(mmxreg, (uptr)_MMXGetAddr(reg)); + xMOVDZX(xRegisterMMX(mmxreg), ptr[(_MMXGetAddr(reg))]); } else if( mode & MODE_READ ) { - MOVQMtoR(mmxreg, (uptr)_MMXGetAddr(reg)); + xMOVQ(xRegisterMMX(mmxreg), ptr[(_MMXGetAddr(reg))]); } } } @@ -646,14 +646,14 @@ int _checkMMXreg(int reg, int mode) if( reg == MMX_GPR ) { // moving in 0s - PXORRtoR(i, i); + xPXOR(xRegisterMMX(i), xRegisterMMX(i)); } else { if (MMX_ISGPR(reg) && (mode&(MODE_READHALF|MODE_READ))) _flushConstReg(reg-MMX_GPR); if( (mode & MODE_READHALF) || (MMX_IS32BITS(reg)&&(mode&MODE_READ)) ) - MOVDMtoMMX(i, (uptr)_MMXGetAddr(reg)); + xMOVDZX(xRegisterMMX(i), ptr[(_MMXGetAddr(reg))]); else - MOVQMtoR(i, (uptr)_MMXGetAddr(reg)); + xMOVQ(xRegisterMMX(i), ptr[(_MMXGetAddr(reg))]); } SetMMXstate(); } @@ -711,9 +711,9 @@ void _deleteMMXreg(int reg, int flush) pxAssert( mmxregs[i].reg != MMX_GPR ); if( MMX_IS32BITS(reg) ) - MOVDMMXtoM((uptr)_MMXGetAddr(mmxregs[i].reg), i); + xMOVD(ptr[(_MMXGetAddr(mmxregs[i].reg))], xRegisterMMX(i)); else - MOVQRtoM((uptr)_MMXGetAddr(mmxregs[i].reg), i); + xMOVQ(ptr[(_MMXGetAddr(mmxregs[i].reg))], xRegisterMMX(i)); SetMMXstate(); // get rid of MODE_WRITE since don't want to flush again @@ -783,9 +783,9 @@ void _freeMMXreg(u32 mmxreg) pxAssert( mmxregs[mmxreg].reg != MMX_GPR ); if( MMX_IS32BITS(mmxregs[mmxreg].reg) ) - MOVDMMXtoM((uptr)_MMXGetAddr(mmxregs[mmxreg].reg), mmxreg); + xMOVD(ptr[(_MMXGetAddr(mmxregs[mmxreg].reg))], xRegisterMMX(mmxreg)); else - MOVQRtoM((uptr)_MMXGetAddr(mmxregs[mmxreg].reg), mmxreg); + xMOVQ(ptr[(_MMXGetAddr(mmxregs[mmxreg].reg))], xRegisterMMX(mmxreg)); SetMMXstate(); } @@ -812,7 +812,7 @@ void _moveMMXreg(int mmxreg) // move mmxregs[i] = mmxregs[mmxreg]; mmxregs[mmxreg].inuse = 0; - MOVQRtoR(i, mmxreg); + xMOVQ(xRegisterMMX(i), xRegisterMMX(mmxreg)); } // write all active regs @@ -830,9 +830,9 @@ void _flushMMXregs() pxAssert( mmxregs[i].reg != MMX_GPR ); if( MMX_IS32BITS(mmxregs[i].reg) ) - MOVDMMXtoM((uptr)_MMXGetAddr(mmxregs[i].reg), i); + xMOVD(ptr[(_MMXGetAddr(mmxregs[i].reg))], xRegisterMMX(i)); else - MOVQRtoM((uptr)_MMXGetAddr(mmxregs[i].reg), i); + xMOVQ(ptr[(_MMXGetAddr(mmxregs[i].reg))], xRegisterMMX(i)); SetMMXstate(); mmxregs[i].mode &= ~MODE_WRITE; @@ -859,27 +859,27 @@ void SetFPUstate() { _freeMMXreg(7); if (x86FpuState == MMX_STATE) { - EMMS(); + xEMMS(); x86FpuState = FPU_STATE; } } void _signExtendSFtoM(u32 mem) { - LAHF(); - SAR16ItoR(EAX, 15); - CWDE(); - MOV32RtoM(mem, EAX ); + xLAHF(); + xSAR(ax, 15); + xCWDE(); + xMOV(ptr[(void*)(mem)], eax); } int _signExtendMtoMMX(x86MMXRegType to, u32 mem) { int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVDMtoMMX(t0reg, mem); - MOVQRtoR(to, t0reg); - PSRADItoR(t0reg, 31); - PUNPCKLDQRtoR(to, t0reg); + xMOVDZX(xRegisterMMX(t0reg), ptr[(void*)(mem)]); + xMOVQ(xRegisterMMX(to), xRegisterMMX(t0reg)); + xPSRA.D(xRegisterMMX(t0reg), 31); + xPUNPCK.LDQ(xRegisterMMX(to), xRegisterMMX(t0reg)); _freeMMXreg(t0reg); return to; @@ -892,7 +892,7 @@ int _signExtendGPRMMXtoMMX(x86MMXRegType to, u32 gprreg, x86MMXRegType from, u32 if( to == from ) return _signExtendGPRtoMMX(to, gprreg, 0); if( !(g_pCurInstInfo->regs[gprfromreg]&EEINST_LASTUSE) ) { if( EEINST_ISLIVE64(gprfromreg) ) { - MOVQRtoR(to, from); + xMOVQ(xRegisterMMX(to), xRegisterMMX(from)); return _signExtendGPRtoMMX(to, gprreg, 0); } } @@ -900,10 +900,10 @@ int _signExtendGPRMMXtoMMX(x86MMXRegType to, u32 gprreg, x86MMXRegType from, u32 // from is free for use SetMMXstate(); - MOVQRtoR(to, from); - MOVDMMXtoM((uptr)&cpuRegs.GPR.r[gprreg].UL[0], from); - PSRADItoR(from, 31); - MOVDMMXtoM((uptr)&cpuRegs.GPR.r[gprreg].UL[1], from); + xMOVQ(xRegisterMMX(to), xRegisterMMX(from)); + xMOVD(ptr[&cpuRegs.GPR.r[gprreg].UL[0]], xRegisterMMX(from)); + xPSRA.D(xRegisterMMX(from), 31); + xMOVD(ptr[&cpuRegs.GPR.r[gprreg].UL[1]], xRegisterMMX(from)); mmxregs[to].inuse = 0; return -1; @@ -915,10 +915,10 @@ int _signExtendGPRtoMMX(x86MMXRegType to, u32 gprreg, int shift) SetMMXstate(); - if( shift > 0 ) PSRADItoR(to, shift); - MOVDMMXtoM((uptr)&cpuRegs.GPR.r[gprreg].UL[0], to); - PSRADItoR(to, 31); - MOVDMMXtoM((uptr)&cpuRegs.GPR.r[gprreg].UL[1], to); + if( shift > 0 ) xPSRA.D(xRegisterMMX(to), shift); + xMOVD(ptr[&cpuRegs.GPR.r[gprreg].UL[0]], xRegisterMMX(to)); + xPSRA.D(xRegisterMMX(to), 31); + xMOVD(ptr[&cpuRegs.GPR.r[gprreg].UL[1]], xRegisterMMX(to)); mmxregs[to].inuse = 0; return -1; @@ -934,12 +934,12 @@ static const __aligned16 u32 s_ones[2] = {0xffffffff, 0xffffffff}; void LogicalOpRtoR(x86MMXRegType to, x86MMXRegType from, int op) { switch(op) { - case 0: PANDRtoR(to, from); break; - case 1: PORRtoR(to, from); break; - case 2: PXORRtoR(to, from); break; + case 0: xPAND(xRegisterMMX(to), xRegisterMMX(from)); break; + case 1: xPOR(xRegisterMMX(to), xRegisterMMX(from)); break; + case 2: xPXOR(xRegisterMMX(to), xRegisterMMX(from)); break; case 3: - PORRtoR(to, from); - PXORMtoR(to, (uptr)&s_ones[0]); + xPOR(xRegisterMMX(to), xRegisterMMX(from)); + xPXOR(xRegisterMMX(to), ptr[&s_ones[0]]); break; } } @@ -947,12 +947,12 @@ void LogicalOpRtoR(x86MMXRegType to, x86MMXRegType from, int op) void LogicalOpMtoR(x86MMXRegType to, uptr from, int op) { switch(op) { - case 0: PANDMtoR(to, from); break; - case 1: PORMtoR(to, from); break; - case 2: PXORMtoR(to, from); break; + case 0: xPAND(xRegisterMMX(to), ptr[(void*)(from)]); break; + case 1: xPOR(xRegisterMMX(to), ptr[(void*)(from)]); break; + case 2: xPXOR(xRegisterMMX(to), ptr[(void*)(from)]); break; case 3: - PORRtoR(to, from); - PXORMtoR(to, (uptr)&s_ones[0]); + xPOR(xRegisterMMX(to), xRegisterMMX(from)); + xPXOR(xRegisterMMX(to), ptr[&s_ones[0]]); break; } } @@ -960,39 +960,39 @@ void LogicalOpMtoR(x86MMXRegType to, uptr from, int op) void LogicalOp32RtoM(uptr to, x86IntRegType from, int op) { switch(op) { - case 0: AND32RtoM(to, from); break; - case 1: OR32RtoM(to, from); break; - case 2: XOR32RtoM(to, from); break; - case 3: OR32RtoM(to, from); break; + case 0: xAND(ptr[(void*)(to)], xRegister32(from)); break; + case 1: xOR(ptr[(void*)(to)], xRegister32(from)); break; + case 2: xXOR(ptr[(void*)(to)], xRegister32(from)); break; + case 3: xOR(ptr[(void*)(to)], xRegister32(from)); break; } } void LogicalOp32MtoR(x86IntRegType to, uptr from, int op) { switch(op) { - case 0: AND32MtoR(to, from); break; - case 1: OR32MtoR(to, from); break; - case 2: XOR32MtoR(to, from); break; - case 3: OR32MtoR(to, from); break; + case 0: xAND(xRegister32(to), ptr[(void*)(from)]); break; + case 1: xOR(xRegister32(to), ptr[(void*)(from)]); break; + case 2: xXOR(xRegister32(to), ptr[(void*)(from)]); break; + case 3: xOR(xRegister32(to), ptr[(void*)(from)]); break; } } void LogicalOp32ItoR(x86IntRegType to, u32 from, int op) { switch(op) { - case 0: AND32ItoR(to, from); break; - case 1: OR32ItoR(to, from); break; - case 2: XOR32ItoR(to, from); break; - case 3: OR32ItoR(to, from); break; + case 0: xAND(xRegister32(to), from); break; + case 1: xOR(xRegister32(to), from); break; + case 2: xXOR(xRegister32(to), from); break; + case 3: xOR(xRegister32(to), from); break; } } void LogicalOp32ItoM(uptr to, u32 from, int op) { switch(op) { - case 0: AND32ItoM(to, from); break; - case 1: OR32ItoM(to, from); break; - case 2: XOR32ItoM(to, from); break; - case 3: OR32ItoM(to, from); break; + case 0: xAND(ptr32[(u32*)(to)], from); break; + case 1: xOR(ptr32[(u32*)(to)], from); break; + case 2: xXOR(ptr32[(u32*)(to)], from); break; + case 3: xOR(ptr32[(u32*)(to)], from); break; } } diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp index 55d2eaec26..13e2634dc7 100644 --- a/pcsx2/x86/ix86-32/iR5900-32.cpp +++ b/pcsx2/x86/ix86-32/iR5900-32.cpp @@ -155,21 +155,21 @@ u32* _eeGetConstReg(int reg) void _eeMoveGPRtoR(x86IntRegType to, int fromgpr) { if( fromgpr == 0 ) - XOR32RtoR( to, to ); // zero register should use xor, thanks --air + xXOR(xRegister32(to), xRegister32(to )); // zero register should use xor, thanks --air else if( GPR_IS_CONST1(fromgpr) ) - MOV32ItoR( to, g_cpuConstRegs[fromgpr].UL[0] ); + xMOV(xRegister32(to), g_cpuConstRegs[fromgpr].UL[0] ); else { int mmreg; if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 && (xmmregs[mmreg].mode&MODE_WRITE)) { - SSE2_MOVD_XMM_to_R(to, mmreg); + xMOVD(xRegister32(to), xRegisterSSE(mmreg)); } else if( (mmreg = _checkMMXreg(MMX_GPR+fromgpr, MODE_READ)) >= 0 && (mmxregs[mmreg].mode&MODE_WRITE) ) { - MOVD32MMXtoR(to, mmreg); + xMOVD(xRegister32(to), xRegisterMMX(mmreg)); SetMMXstate(); } else { - MOV32MtoR(to, (uptr)&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ); + xMOV(xRegister32(to), ptr[&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ]); } } } @@ -177,20 +177,20 @@ void _eeMoveGPRtoR(x86IntRegType to, int fromgpr) void _eeMoveGPRtoM(u32 to, int fromgpr) { if( GPR_IS_CONST1(fromgpr) ) - MOV32ItoM( to, g_cpuConstRegs[fromgpr].UL[0] ); + xMOV(ptr32[(u32*)(to)], g_cpuConstRegs[fromgpr].UL[0] ); else { int mmreg; if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) { - SSEX_MOVD_XMM_to_M32(to, mmreg); + xMOVSS(ptr[(void*)(to)], xRegisterSSE(mmreg)); } else if( (mmreg = _checkMMXreg(MMX_GPR+fromgpr, MODE_READ)) >= 0 ) { - MOVDMMXtoM(to, mmreg); + xMOVD(ptr[(void*)(to)], xRegisterMMX(mmreg)); SetMMXstate(); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ); - MOV32RtoM(to, EAX ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ]); + xMOV(ptr[(void*)(to)], eax); } } } @@ -198,20 +198,20 @@ void _eeMoveGPRtoM(u32 to, int fromgpr) void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr) { if( GPR_IS_CONST1(fromgpr) ) - MOV32ItoRm( to, g_cpuConstRegs[fromgpr].UL[0] ); + xMOV(ptr32[xAddressReg(to)], g_cpuConstRegs[fromgpr].UL[0] ); else { int mmreg; if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) { - SSEX_MOVD_XMM_to_Rm(to, mmreg); + xMOVSS(ptr[xAddressReg(to)], xRegisterSSE(mmreg)); } else if( (mmreg = _checkMMXreg(MMX_GPR+fromgpr, MODE_READ)) >= 0 ) { - MOVD32MMXtoRm(to, mmreg); + xMOVD(ptr[xAddressReg(to)], xRegisterMMX(mmreg)); SetMMXstate(); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ); - MOV32RtoRm( to, EAX ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ]); + xMOV(ptr[xAddressReg(to)], eax); } } } @@ -270,8 +270,8 @@ int _flushUnusedConstReg() !_recIsRegWritten(g_pCurInstInfo+1, (s_nEndBlock-pc)/4, XMMTYPE_GPRREG, i) ) { // check if will be written in the future - MOV32ItoM((uptr)&cpuRegs.GPR.r[i].UL[0], g_cpuConstRegs[i].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[i].UL[1], g_cpuConstRegs[i].UL[1]); + xMOV(ptr32[&cpuRegs.GPR.r[i].UL[0]], g_cpuConstRegs[i].UL[0]); + xMOV(ptr32[&cpuRegs.GPR.r[i].UL[1]], g_cpuConstRegs[i].UL[1]); g_cpuFlushedConstReg |= 1<= 0 ) { -// SSE_MOVSS_XMM_to_M32((u32)&cpuRegs.pc, mmreg); +// xMOVSS(ptr[&cpuRegs.pc], xRegisterSSE(mmreg)); // } // else if( (mmreg = _checkMMXreg(MMX_GPR+reg, MODE_READ)) >= 0 ) { -// MOVDMMXtoM((u32)&cpuRegs.pc, mmreg); +// xMOVD(ptr[&cpuRegs.pc], xRegisterMMX(mmreg)); // SetMMXstate(); // } // else { -// MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ reg ].UL[ 0 ] ); -// MOV32RtoM((u32)&cpuRegs.pc, EAX); +// xMOV(eax, ptr[(void*)((int)&cpuRegs.GPR.r[ reg ].UL[ 0 ] )]); +// xMOV(ptr[&cpuRegs.pc], eax); // } // } _allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); @@ -976,18 +976,18 @@ void SetBranchReg( u32 reg ) if( x86regs[ESI].inuse ) { pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); - MOV32RtoM((uptr)&cpuRegs.pc, ESI); + xMOV(ptr[&cpuRegs.pc], esi); x86regs[ESI].inuse = 0; } else { - MOV32MtoR(EAX, (uptr)&g_recWriteback); - MOV32RtoM((uptr)&cpuRegs.pc, EAX); + xMOV(eax, ptr[&g_recWriteback]); + xMOV(ptr[&cpuRegs.pc], eax); } } -// CMP32ItoM((u32)&cpuRegs.pc, 0); +// xCMP(ptr32[&cpuRegs.pc], 0); // j8Ptr[5] = JNE8(0); -// CALLFunc((uptr)tempfn); +// xCALL((void*)(uptr)tempfn); // x86SetJ8( j8Ptr[5] ); iFlushCall(FLUSH_EVERYTHING); @@ -1073,7 +1073,7 @@ void iFlushCall(int flushtype) _flushConstRegs(); if (x86FpuState==MMX_STATE) { - EMMS(); + xEMMS(); x86FpuState=FPU_STATE; } } @@ -1372,7 +1372,7 @@ void recompileNextInstruction(int delayslot) pxAssert(s_pCode); if( IsDebugBuild ) - MOV32ItoR(EAX, pc); // acts as a tag for delimiting recompiled instructions when viewing x86 disasm. + xMOV(eax, pc); // acts as a tag for delimiting recompiled instructions when viewing x86 disasm. cpuRegs.code = *(int *)s_pCode; @@ -1796,7 +1796,7 @@ static void __fastcall recRecompile( const u32 startpc ) // Game will unmap some virtual addresses. If a constant address were hardcoded in the block, we would be in a bad situation. AtomicExchange( eeRecNeedsReset, true ); // 0x3563b8 is the start address of the function that invalidate entry in TLB cache - MOV32MtoR(ECX, (uptr)&cpuRegs.GPR.n.a0.UL[ 0 ] ); + xMOV(ecx, ptr[&cpuRegs.GPR.n.a0.UL[ 0 ] ]); xCALL(GoemonUnloadTlb); } } diff --git a/pcsx2/x86/ix86-32/iR5900AritImm.cpp b/pcsx2/x86/ix86-32/iR5900AritImm.cpp index 1ee74adb5a..7d9384d7b0 100644 --- a/pcsx2/x86/ix86-32/iR5900AritImm.cpp +++ b/pcsx2/x86/ix86-32/iR5900AritImm.cpp @@ -61,17 +61,17 @@ void recADDI_(int info) if ( _Rt_ == _Rs_ ) { // must perform the ADD unconditionally, to maintain flags status: - ADD32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], _Imm_); + xADD(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], _Imm_); _signExtendSFtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); - if ( _Imm_ != 0 ) ADD32ItoR( EAX, _Imm_ ); + if ( _Imm_ != 0 ) xADD(eax, _Imm_ ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX ); + xCDQ( ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], edx); } } @@ -94,23 +94,23 @@ void recDADDI_(int info) pxAssert( !(info&PROCESS_EE_XMM) ); if( _Rt_ == _Rs_ ) { - ADD32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], _Imm_); - ADC32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], _Imm_<0?0xffffffff:0); + xADD(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], _Imm_); + xADC(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], _Imm_<0?0xffffffff:0); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); - MOV32MtoR( EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ]); if ( _Imm_ != 0 ) { - ADD32ItoR( EAX, _Imm_ ); - ADC32ItoR( EDX, _Imm_ < 0?0xffffffff:0); + xADD(eax, _Imm_ ); + xADC(edx, _Imm_ < 0?0xffffffff:0); } - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], edx); } } @@ -133,23 +133,23 @@ extern u32 s_sltone; void recSLTIU_(int info) { - MOV32ItoR(EAX, 1); + xMOV(eax, 1); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], _Imm_ >= 0 ? 0 : 0xffffffff); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], _Imm_ >= 0 ? 0 : 0xffffffff); j8Ptr[0] = JB8( 0 ); j8Ptr[2] = JA8( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], (s32)_Imm_ ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], (s32)_Imm_ ); j8Ptr[1] = JB8(0); x86SetJ8(j8Ptr[2]); - XOR32RtoR(EAX, EAX); + xXOR(eax, eax); x86SetJ8(j8Ptr[0]); x86SetJ8(j8Ptr[1]); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], 0 ); } EERECOMPILE_CODEX(eeRecompileCode1, SLTIU); @@ -163,23 +163,23 @@ void recSLTI_const() void recSLTI_(int info) { // test silent hill if modding - MOV32ItoR(EAX, 1); + xMOV(eax, 1); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], _Imm_ >= 0 ? 0 : 0xffffffff); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], _Imm_ >= 0 ? 0 : 0xffffffff); j8Ptr[0] = JL8( 0 ); j8Ptr[2] = JG8( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], (s32)_Imm_ ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], (s32)_Imm_ ); j8Ptr[1] = JB8(0); x86SetJ8(j8Ptr[2]); - XOR32RtoR(EAX, EAX); + xXOR(eax, eax); x86SetJ8(j8Ptr[0]); x86SetJ8(j8Ptr[1]); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], 0 ); } EERECOMPILE_CODEX(eeRecompileCode1, SLTI); @@ -198,31 +198,31 @@ void recLogicalOpI(int info, int op) LogicalOp32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], _ImmU_, op); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); if( op != 0 ) - MOV32MtoR( EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ]); LogicalOp32ItoR( EAX, _ImmU_, op); if( op != 0 ) - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], edx); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax); } if( op == 0 ) { - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], 0 ); } } else { if( op == 0 ) { - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], 0 ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], 0 ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], 0 ); } else { if( _Rt_ != _Rs_ ) { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - MOV32MtoR(EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ]); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], edx); } } } diff --git a/pcsx2/x86/ix86-32/iR5900Branch.cpp b/pcsx2/x86/ix86-32/iR5900Branch.cpp index 29334275b2..9795fc5aa8 100644 --- a/pcsx2/x86/ix86-32/iR5900Branch.cpp +++ b/pcsx2/x86/ix86-32/iR5900Branch.cpp @@ -67,11 +67,11 @@ void recSetBranchEQ(int info, int bne, int process) } else { t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_MOVQ_XMM_to_XMM(t0reg, EEREC_T); + xMOVQZX(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); } _flushConstReg(_Rs_); - SSE2_PCMPEQD_M128_to_XMM(t0reg, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); + xPCMP.EQD(xRegisterSSE(t0reg), ptr[&cpuRegs.GPR.r[_Rs_].UL[0]]); if( t0reg != EEREC_T ) _freeXMMreg(t0reg); @@ -84,11 +84,11 @@ void recSetBranchEQ(int info, int bne, int process) } else { t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_MOVQ_XMM_to_XMM(t0reg, EEREC_S); + xMOVQZX(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); } _flushConstReg(_Rt_); - SSE2_PCMPEQD_M128_to_XMM(t0reg, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); + xPCMP.EQD(xRegisterSSE(t0reg), ptr[&cpuRegs.GPR.r[_Rt_].UL[0]]); if( t0reg != EEREC_S ) _freeXMMreg(t0reg); } @@ -98,29 +98,29 @@ void recSetBranchEQ(int info, int bne, int process) _deleteGPRtoXMMreg(_Rs_, 1); xmmregs[EEREC_S].inuse = 0; t0reg = EEREC_S; - SSE2_PCMPEQD_XMM_to_XMM(t0reg, EEREC_T); + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); } else if( (g_pCurInstInfo->regs[_Rt_] & EEINST_LASTUSE) || !EEINST_ISLIVEXMM(_Rt_) ) { _deleteGPRtoXMMreg(_Rt_, 1); xmmregs[EEREC_T].inuse = 0; t0reg = EEREC_T; - SSE2_PCMPEQD_XMM_to_XMM(t0reg, EEREC_S); + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); } else { t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSE2_MOVQ_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PCMPEQD_XMM_to_XMM(t0reg, EEREC_T); + xMOVQZX(xRegisterSSE(t0reg), xRegisterSSE(EEREC_S)); + xPCMP.EQD(xRegisterSSE(t0reg), xRegisterSSE(EEREC_T)); } if( t0reg != EEREC_S && t0reg != EEREC_T ) _freeXMMreg(t0reg); } - SSE_MOVMSKPS_XMM_to_R32(EAX, t0reg); + xMOVMSKPS(eax, xRegisterSSE(t0reg)); _eeFlushAllUnused(); - AND8ItoR(EAX, 3); - CMP8ItoR( EAX, 0x3 ); + xAND(al, 3); + xCMP(al, 0x3 ); if( bne ) j32Ptr[ 1 ] = JE32( 0 ); else j32Ptr[ 0 ] = j32Ptr[ 1 ] = JNE32( 0 ); @@ -131,26 +131,26 @@ void recSetBranchEQ(int info, int bne, int process) if( bne ) { if( process & PROCESS_CONSTS ) { - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], g_cpuConstRegs[_Rs_].UL[0] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], g_cpuConstRegs[_Rs_].UL[0] ); j8Ptr[ 0 ] = JNE8( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], g_cpuConstRegs[_Rs_].UL[1] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], g_cpuConstRegs[_Rs_].UL[1] ); j32Ptr[ 1 ] = JE32( 0 ); } else if( process & PROCESS_CONSTT ) { - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], g_cpuConstRegs[_Rt_].UL[0] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], g_cpuConstRegs[_Rt_].UL[0] ); j8Ptr[ 0 ] = JNE8( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], g_cpuConstRegs[_Rt_].UL[1] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], g_cpuConstRegs[_Rt_].UL[1] ); j32Ptr[ 1 ] = JE32( 0 ); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - CMP32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xCMP(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); j8Ptr[ 0 ] = JNE8( 0 ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); - CMP32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ]); + xCMP(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); j32Ptr[ 1 ] = JE32( 0 ); } @@ -159,26 +159,26 @@ void recSetBranchEQ(int info, int bne, int process) else { // beq if( process & PROCESS_CONSTS ) { - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], g_cpuConstRegs[_Rs_].UL[0] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], g_cpuConstRegs[_Rs_].UL[0] ); j32Ptr[ 0 ] = JNE32( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], g_cpuConstRegs[_Rs_].UL[1] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], g_cpuConstRegs[_Rs_].UL[1] ); j32Ptr[ 1 ] = JNE32( 0 ); } else if( process & PROCESS_CONSTT ) { - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], g_cpuConstRegs[_Rt_].UL[0] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], g_cpuConstRegs[_Rt_].UL[0] ); j32Ptr[ 0 ] = JNE32( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], g_cpuConstRegs[_Rt_].UL[1] ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], g_cpuConstRegs[_Rt_].UL[1] ); j32Ptr[ 1 ] = JNE32( 0 ); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - CMP32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xCMP(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); j32Ptr[ 0 ] = JNE32( 0 ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); - CMP32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ]); + xCMP(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); j32Ptr[ 1 ] = JNE32( 0 ); } } @@ -193,11 +193,11 @@ void recSetBranchL(int ltz) int regs = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ); if( regs >= 0 ) { - SSE_MOVMSKPS_XMM_to_R32(EAX, regs); + xMOVMSKPS(eax, xRegisterSSE(regs)); _eeFlushAllUnused(); - TEST8ItoR( EAX, 2 ); + xTEST(al, 2 ); if( ltz ) j32Ptr[ 0 ] = JZ32( 0 ); else j32Ptr[ 0 ] = JNZ32( 0 ); @@ -205,7 +205,7 @@ void recSetBranchL(int ltz) return; } - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], 0 ); if( ltz ) j32Ptr[ 0 ] = JGE32( 0 ); else j32Ptr[ 0 ] = JL32( 0 ); @@ -393,10 +393,10 @@ EERECOMPILE_CODE0(BNEL, XMMINFO_READS|XMMINFO_READT); //{ // Console.WriteLn("BLTZAL"); // _eeFlushAllUnused(); -// MOV32ItoM( (int)&cpuRegs.code, cpuRegs.code ); -// MOV32ItoM( (int)&cpuRegs.pc, pc ); +// xMOV(ptr32[(u32*)((int)&cpuRegs.code)], cpuRegs.code ); +// xMOV(ptr32[(u32*)((int)&cpuRegs.pc)], pc ); // iFlushCall(FLUSH_EVERYTHING); -// CALLFunc( (int)BLTZAL ); +// xCALL((void*)(int)BLTZAL ); // branch = 2; //} @@ -409,8 +409,8 @@ void recBLTZAL() _eeFlushAllUnused(); _deleteEEreg(31, 0); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[0], pc+4); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[1], 0); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[0]], pc+4); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[1]], 0); if( GPR_IS_CONST1(_Rs_) ) { if( !(g_cpuConstRegs[_Rs_].SD[0] < 0) ) @@ -448,8 +448,8 @@ void recBGEZAL() _eeFlushAllUnused(); _deleteEEreg(31, 0); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[0], pc+4); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[1], 0); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[0]], pc+4); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[1]], 0); if( GPR_IS_CONST1(_Rs_) ) { if( !(g_cpuConstRegs[_Rs_].SD[0] >= 0) ) @@ -487,8 +487,8 @@ void recBLTZALL() _eeFlushAllUnused(); _deleteEEreg(31, 0); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[0], pc+4); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[1], 0); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[0]], pc+4); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[1]], 0); if( GPR_IS_CONST1(_Rs_) ) { if( !(g_cpuConstRegs[_Rs_].SD[0] < 0) ) @@ -521,8 +521,8 @@ void recBGEZALL() _eeFlushAllUnused(); _deleteEEreg(31, 0); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[0], pc+4); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[1], 0); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[0]], pc+4); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[1]], 0); if( GPR_IS_CONST1(_Rs_) ) { if( !(g_cpuConstRegs[_Rs_].SD[0] >= 0) ) @@ -565,11 +565,11 @@ void recBLEZ() _flushEEreg(_Rs_); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], 0 ); j8Ptr[ 0 ] = JL8( 0 ); j32Ptr[ 1 ] = JG32( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], 0 ); j32Ptr[ 2 ] = JNZ32( 0 ); x86SetJ8( j8Ptr[ 0 ] ); @@ -611,11 +611,11 @@ void recBGTZ() _flushEEreg(_Rs_); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], 0 ); j8Ptr[ 0 ] = JG8( 0 ); j32Ptr[ 1 ] = JL32( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], 0 ); j32Ptr[ 2 ] = JZ32( 0 ); x86SetJ8( j8Ptr[ 0 ] ); @@ -793,11 +793,11 @@ void recBLEZL() _flushEEreg(_Rs_); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], 0 ); j32Ptr[ 0 ] = JL32( 0 ); j32Ptr[ 1 ] = JG32( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], 0 ); j32Ptr[ 2 ] = JNZ32( 0 ); x86SetJ32( j32Ptr[ 0 ] ); @@ -837,11 +837,11 @@ void recBGTZL() _flushEEreg(_Rs_); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], 0 ); j32Ptr[ 0 ] = JG32( 0 ); j32Ptr[ 1 ] = JL32( 0 ); - CMP32ItoM( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], 0 ); + xCMP(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], 0 ); j32Ptr[ 2 ] = JZ32( 0 ); x86SetJ32( j32Ptr[ 0 ] ); diff --git a/pcsx2/x86/ix86-32/iR5900Jump.cpp b/pcsx2/x86/ix86-32/iR5900Jump.cpp index 29bbe5751c..a7a49495f6 100644 --- a/pcsx2/x86/ix86-32/iR5900Jump.cpp +++ b/pcsx2/x86/ix86-32/iR5900Jump.cpp @@ -69,8 +69,8 @@ void recJAL() } else { - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[0], pc + 4); - MOV32ItoM((uptr)&cpuRegs.GPR.r[31].UL[1], 0); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[0]], pc + 4); + xMOV(ptr32[&cpuRegs.GPR.r[31].UL[1]], 0); } recompileNextInstruction(1); @@ -106,20 +106,20 @@ void recJALR() // uncomment when there are NO instructions that need to call interpreter // int mmreg; // if( GPR_IS_CONST1(_Rs_) ) -// MOV32ItoM( (u32)&cpuRegs.pc, g_cpuConstRegs[_Rs_].UL[0] ); +// xMOV(ptr32[&cpuRegs.pc], g_cpuConstRegs[_Rs_].UL[0] ); // else { // int mmreg; // // if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) { -// SSE_MOVSS_XMM_to_M32((u32)&cpuRegs.pc, mmreg); +// xMOVSS(ptr[&cpuRegs.pc], xRegisterSSE(mmreg)); // } // else if( (mmreg = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) { -// MOVDMMXtoM((u32)&cpuRegs.pc, mmreg); +// xMOVD(ptr[&cpuRegs.pc], xRegisterMMX(mmreg)); // SetMMXstate(); // } // else { -// MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); -// MOV32RtoM((u32)&cpuRegs.pc, EAX); +// xMOV(eax, ptr[(void*)((int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] )]); +// xMOV(ptr[&cpuRegs.pc], eax); // } // } @@ -135,8 +135,8 @@ void recJALR() } else { - MOV32ItoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], newpc); - MOV32ItoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], 0); + xMOV(ptr32[&cpuRegs.GPR.r[_Rd_].UL[0]], newpc); + xMOV(ptr32[&cpuRegs.GPR.r[_Rd_].UL[1]], 0); } } @@ -146,12 +146,12 @@ void recJALR() if( x86regs[ESI].inuse ) { pxAssert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); - MOV32RtoM((uptr)&cpuRegs.pc, ESI); + xMOV(ptr[&cpuRegs.pc], esi); x86regs[ESI].inuse = 0; } else { - MOV32MtoR(EAX, (uptr)&g_recWriteback); - MOV32RtoM((uptr)&cpuRegs.pc, EAX); + xMOV(eax, ptr[&g_recWriteback]); + xMOV(ptr[&cpuRegs.pc], eax); } SetBranchReg(0xffffffff); diff --git a/pcsx2/x86/ix86-32/iR5900LoadStore.cpp b/pcsx2/x86/ix86-32/iR5900LoadStore.cpp index e602e4b17b..aca1342b37 100644 --- a/pcsx2/x86/ix86-32/iR5900LoadStore.cpp +++ b/pcsx2/x86/ix86-32/iR5900LoadStore.cpp @@ -83,10 +83,10 @@ void _eeOnLoadWrite(u32 reg) if( regt >= 0 ) { if( xmmregs[regt].mode & MODE_WRITE ) { if( reg != _Rs_ ) { - SSE2_PUNPCKHQDQ_XMM_to_XMM(regt, regt); - SSE2_MOVQ_XMM_to_M64((uptr)&cpuRegs.GPR.r[reg].UL[2], regt); + xPUNPCK.HQDQ(xRegisterSSE(regt), xRegisterSSE(regt)); + xMOVQ(ptr[&cpuRegs.GPR.r[reg].UL[2]], xRegisterSSE(regt)); } - else SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[reg].UL[2], regt); + else xMOVH.PS(ptr[&cpuRegs.GPR.r[reg].UL[2]], xRegisterSSE(regt)); } xmmregs[regt].inuse = 0; } @@ -165,7 +165,7 @@ void recLoad32( u32 bits, bool sign ) // Load ECX with the source memory address that we're reading from. _eeMoveGPRtoR(ECX, _Rs_); if (_Imm_ != 0) - ADD32ItoR( ECX, _Imm_ ); + xADD(ecx, _Imm_ ); _eeOnLoadWrite(_Rt_); _deleteEEreg(_Rt_, 0); diff --git a/pcsx2/x86/ix86-32/iR5900Move.cpp b/pcsx2/x86/ix86-32/iR5900Move.cpp index 4404d56498..dee824e594 100644 --- a/pcsx2/x86/ix86-32/iR5900Move.cpp +++ b/pcsx2/x86/ix86-32/iR5900Move.cpp @@ -66,7 +66,7 @@ void recLUI() if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_WRITE)) >= 0 ) { if( xmmregs[mmreg].mode & MODE_WRITE ) { - SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[_Rt_].UL[2], mmreg); + xMOVH.PS(ptr[&cpuRegs.GPR.r[_Rt_].UL[2]], xRegisterSSE(mmreg)); } xmmregs[mmreg].inuse = 0; } @@ -80,10 +80,10 @@ void recLUI() } else { - MOV32ItoR(EAX, (s32)(cpuRegs.code << 16)); - CDQ(); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[0], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rt_].UL[1], EDX); + xMOV(eax, (s32)(cpuRegs.code << 16)); + xCDQ(); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[0]], eax); + xMOV(ptr[&cpuRegs.GPR.r[_Rt_].UL[1]], edx); } } @@ -107,21 +107,21 @@ void recMFHILO(int hi) xmmregs[regd].inuse = 0; - SSE2_MOVQ_XMM_to_M64((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], reghi); + xMOVQ(ptr[&cpuRegs.GPR.r[_Rd_].UL[0]], xRegisterSSE(reghi)); if( xmmregs[regd].mode & MODE_WRITE ) { - SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[_Rd_].UL[2], regd); + xMOVH.PS(ptr[&cpuRegs.GPR.r[_Rd_].UL[2]], xRegisterSSE(regd)); } } else { regd = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rd_, MODE_WRITE); if( regd >= 0 ) { - SSE2_MOVDQ2Q_XMM_to_MM(regd, reghi); + xMOVQ(xRegisterMMX(regd), xRegisterSSE(reghi)); } else { _deleteEEreg(_Rd_, 0); - SSE2_MOVQ_XMM_to_M64((uptr)&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ], reghi); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterSSE(reghi)); } } } @@ -133,14 +133,14 @@ void recMFHILO(int hi) if( regd >= 0 ) { if( EEINST_ISLIVE2(_Rd_) ) { if( xmmregs[regd].mode & MODE_WRITE ) { - SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 2 ], regd); + xMOVH.PS(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 2 ]], xRegisterSSE(regd)); } xmmregs[regd].inuse = 0; - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ], reghi); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterMMX(reghi)); } else { SetMMXstate(); - SSE2_MOVQ2DQ_MM_to_XMM(regd, reghi); + xMOVQ(xRegisterSSE(regd), xRegisterMMX(reghi)); xmmregs[regd].mode |= MODE_WRITE; } } @@ -149,32 +149,32 @@ void recMFHILO(int hi) SetMMXstate(); if( regd >= 0 ) { - MOVQRtoR(regd, reghi); + xMOVQ(xRegisterMMX(regd), xRegisterMMX(reghi)); } else { _deleteEEreg(_Rd_, 0); - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ], reghi); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterMMX(reghi)); } } } else { if( regd >= 0 ) { - if( EEINST_ISLIVE2(_Rd_) ) SSE_MOVLPS_M64_to_XMM(regd, hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ]); - else SSE2_MOVQ_M64_to_XMM(regd, hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ]); + if( EEINST_ISLIVE2(_Rd_) ) xMOVL.PS(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]); + else xMOVQZX(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]); } else { regd = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rd_, MODE_WRITE); if( regd >= 0 ) { SetMMXstate(); - MOVQMtoR(regd, hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ]); + xMOVQ(xRegisterMMX(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]); } else { _deleteEEreg(_Rd_, 0); - MOV32MtoR( EAX, hi ? (uptr)&cpuRegs.HI.UL[ 0 ] : (uptr)&cpuRegs.LO.UL[ 0 ]); - MOV32MtoR( EDX, hi ? (uptr)&cpuRegs.HI.UL[ 1 ] : (uptr)&cpuRegs.LO.UL[ 1 ]); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(eax, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 0 ] : (uptr)&cpuRegs.LO.UL[ 0 ])]); + xMOV(edx, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 1 ] : (uptr)&cpuRegs.LO.UL[ 1 ])]); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } } } @@ -197,8 +197,8 @@ void recMTHILO(int hi) pxAssert( reghi != regs ); _deleteGPRtoXMMreg(_Rs_, 0); - SSE2_PUNPCKHQDQ_XMM_to_XMM(reghi, reghi); - SSE2_PUNPCKLQDQ_XMM_to_XMM(regs, reghi); + xPUNPCK.HQDQ(xRegisterSSE(reghi), xRegisterSSE(reghi)); + xPUNPCK.LQDQ(xRegisterSSE(regs), xRegisterSSE(reghi)); // swap regs xmmregs[regs] = xmmregs[reghi]; @@ -213,20 +213,20 @@ void recMTHILO(int hi) if( EEINST_ISLIVE2(xmmhilo) ) { if( xmmregs[reghi].mode & MODE_WRITE ) { - SSE_MOVHPS_XMM_to_M64(addrhilo+8, reghi); + xMOVH.PS(ptr[(void*)(addrhilo+8)], xRegisterSSE(reghi)); } xmmregs[reghi].inuse = 0; - MOVQRtoM(addrhilo, regs); + xMOVQ(ptr[(void*)(addrhilo)], xRegisterMMX(regs)); } else { SetMMXstate(); - SSE2_MOVQ2DQ_MM_to_XMM(reghi, regs); + xMOVQ(xRegisterSSE(reghi), xRegisterMMX(regs)); xmmregs[reghi].mode |= MODE_WRITE; } } else { _flushConstReg(_Rs_); - SSE_MOVLPS_M64_to_XMM(reghi, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]); + xMOVL.PS(xRegisterSSE(reghi), ptr[&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]]); xmmregs[reghi].mode |= MODE_WRITE; } } @@ -237,44 +237,44 @@ void recMTHILO(int hi) if( reghi >= 0 ) { if( regs >= 0 ) { //SetMMXstate(); - SSE2_MOVDQ2Q_XMM_to_MM(reghi, regs); + xMOVQ(xRegisterMMX(reghi), xRegisterSSE(regs)); } else { regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_WRITE); if( regs >= 0 ) { SetMMXstate(); - MOVQRtoR(reghi, regs); + xMOVQ(xRegisterMMX(reghi), xRegisterMMX(regs)); } else { _flushConstReg(_Rs_); - MOVQMtoR(reghi, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]); + xMOVQ(xRegisterMMX(reghi), ptr[&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]]); } } } else { if( regs >= 0 ) { - SSE2_MOVQ_XMM_to_M64(addrhilo, regs); + xMOVQ(ptr[(void*)(addrhilo)], xRegisterSSE(regs)); } else { regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_WRITE); if( regs >= 0 ) { SetMMXstate(); - MOVQRtoM(addrhilo, regs); + xMOVQ(ptr[(void*)(addrhilo)], xRegisterMMX(regs)); } else { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM(addrhilo, g_cpuConstRegs[_Rs_].UL[0] ); - MOV32ItoM(addrhilo+4, g_cpuConstRegs[_Rs_].UL[1] ); + xMOV(ptr32[(u32*)(addrhilo)], g_cpuConstRegs[_Rs_].UL[0] ); + xMOV(ptr32[(u32*)(addrhilo+4)], g_cpuConstRegs[_Rs_].UL[1] ); } else { _eeMoveGPRtoR(ECX, _Rs_); _flushEEreg(_Rs_); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOV32MtoR( EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); - MOV32RtoM( addrhilo, EAX ); - MOV32RtoM( addrhilo+4, EDX ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]); + xMOV(ptr[(void*)(addrhilo)], eax); + xMOV(ptr[(void*)(addrhilo+4)], edx); } } } @@ -318,22 +318,22 @@ void recMFHILO1(int hi) if( reghi >= 0 ) { if( regd >= 0 ) { - SSE_MOVHLPS_XMM_to_XMM(regd, reghi); + xMOVHL.PS(xRegisterSSE(regd), xRegisterSSE(reghi)); xmmregs[regd].mode |= MODE_WRITE; } else { _deleteEEreg(_Rd_, 0); - SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ], reghi); + xMOVH.PS(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterSSE(reghi)); } } else { if( regd >= 0 ) { if( EEINST_ISLIVE2(_Rd_) ) { - SSE2_PUNPCKHQDQ_M128_to_XMM(regd, hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ]); - SSE2_PSHUFD_XMM_to_XMM(regd, regd, 0x4e); + xPUNPCK.HQDQ(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]); + xPSHUF.D(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); } else { - SSE2_MOVQ_M64_to_XMM(regd, hi ? (uptr)&cpuRegs.HI.UD[ 1 ] : (uptr)&cpuRegs.LO.UD[ 1 ]); + xMOVQZX(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 1 ] : (uptr)&cpuRegs.LO.UD[ 1 ])]); } xmmregs[regd].mode |= MODE_WRITE; @@ -343,14 +343,14 @@ void recMFHILO1(int hi) if( regd >= 0 ) { SetMMXstate(); - MOVQMtoR(regd, hi ? (uptr)&cpuRegs.HI.UD[ 1 ] : (uptr)&cpuRegs.LO.UD[ 1 ]); + xMOVQ(xRegisterMMX(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 1 ] : (uptr)&cpuRegs.LO.UD[ 1 ])]); } else { _deleteEEreg(_Rd_, 0); - MOV32MtoR( EAX, hi ? (uptr)&cpuRegs.HI.UL[ 2 ] : (uptr)&cpuRegs.LO.UL[ 2 ]); - MOV32MtoR( EDX, hi ? (uptr)&cpuRegs.HI.UL[ 3 ] : (uptr)&cpuRegs.LO.UL[ 3 ]); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(eax, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 2 ] : (uptr)&cpuRegs.LO.UL[ 2 ])]); + xMOV(edx, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 3 ] : (uptr)&cpuRegs.LO.UL[ 3 ])]); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } } } @@ -369,35 +369,35 @@ void recMTHILO1(int hi) if( reghi >= 0 ) { if( regs >= 0 ) { - SSE2_PUNPCKLQDQ_XMM_to_XMM(reghi, regs); + xPUNPCK.LQDQ(xRegisterSSE(reghi), xRegisterSSE(regs)); } else { _flushEEreg(_Rs_); - SSE2_PUNPCKLQDQ_M128_to_XMM(reghi, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]); + xPUNPCK.LQDQ(xRegisterSSE(reghi), ptr[&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]]); } } else { if( regs >= 0 ) { - SSE2_MOVQ_XMM_to_M64(addrhilo+8, regs); + xMOVQ(ptr[(void*)(addrhilo+8)], xRegisterSSE(regs)); } else { regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_WRITE); if( regs >= 0 ) { SetMMXstate(); - MOVQRtoM(addrhilo+8, regs); + xMOVQ(ptr[(void*)(addrhilo+8)], xRegisterMMX(regs)); } else { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM(addrhilo+8, g_cpuConstRegs[_Rs_].UL[0] ); - MOV32ItoM(addrhilo+12, g_cpuConstRegs[_Rs_].UL[1] ); + xMOV(ptr32[(u32*)(addrhilo+8)], g_cpuConstRegs[_Rs_].UL[0] ); + xMOV(ptr32[(u32*)(addrhilo+12)], g_cpuConstRegs[_Rs_].UL[1] ); } else { _flushEEreg(_Rs_); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOV32MtoR( EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); - MOV32RtoM( addrhilo+8, EAX ); - MOV32RtoM( addrhilo+12, EDX ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]); + xMOV(ptr[(void*)(addrhilo+8)], eax); + xMOV(ptr[(void*)(addrhilo+12)], edx); } } } @@ -434,12 +434,12 @@ void recMOVZtemp_const() void recMOVZtemp_consts(int info) { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - OR32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); + xOR(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); j8Ptr[ 0 ] = JNZ8( 0 ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], g_cpuConstRegs[_Rs_].UL[0] ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], g_cpuConstRegs[_Rs_].UL[1] ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], g_cpuConstRegs[_Rs_].UL[0] ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], g_cpuConstRegs[_Rs_].UL[1] ); x86SetJ8( j8Ptr[ 0 ] ); } @@ -449,15 +449,15 @@ void recMOVZtemp_constt(int info) // Fixme: MMX problem if(0/* _hasFreeXMMreg() */) { int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQMtoR(t0reg, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg); + xMOVQ(xRegisterMMX(t0reg), ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], xRegisterMMX(t0reg)); _freeMMXreg(t0reg); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOV32MtoR(EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } } @@ -469,20 +469,20 @@ void recMOVZtemp_(int info) if(0/* _hasFreeXMMreg() */) t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - OR32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); + xOR(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); j8Ptr[ 0 ] = JNZ8( 0 ); if( t0reg >= 0 ) { - MOVQMtoR(t0reg, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg); + xMOVQ(xRegisterMMX(t0reg), ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], xRegisterMMX(t0reg)); _freeMMXreg(t0reg); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOV32MtoR(EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } x86SetJ8( j8Ptr[ 0 ] ); @@ -513,12 +513,12 @@ void recMOVNtemp_const() void recMOVNtemp_consts(int info) { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - OR32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); + xOR(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); j8Ptr[ 0 ] = JZ8( 0 ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], g_cpuConstRegs[_Rs_].UL[0] ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], g_cpuConstRegs[_Rs_].UL[1] ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], g_cpuConstRegs[_Rs_].UL[0] ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], g_cpuConstRegs[_Rs_].UL[1] ); x86SetJ8( j8Ptr[ 0 ] ); } @@ -528,15 +528,15 @@ void recMOVNtemp_constt(int info) // Fixme: MMX problem if(0/* _hasFreeXMMreg() */) { int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQMtoR(t0reg, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg); + xMOVQ(xRegisterMMX(t0reg), ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], xRegisterMMX(t0reg)); _freeMMXreg(t0reg); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOV32MtoR(EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } } @@ -548,20 +548,20 @@ void recMOVNtemp_(int info) if(0/* _hasFreeXMMreg() */) t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - OR32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); + xOR(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); j8Ptr[ 0 ] = JZ8( 0 ); if( t0reg >= 0 ) { - MOVQMtoR(t0reg, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg); + xMOVQ(xRegisterMMX(t0reg), ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], xRegisterMMX(t0reg)); _freeMMXreg(t0reg); } else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - MOV32MtoR(EDX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]); + xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } x86SetJ8( j8Ptr[ 0 ] ); diff --git a/pcsx2/x86/ix86-32/iR5900MultDiv.cpp b/pcsx2/x86/ix86-32/iR5900MultDiv.cpp index 4e76ec5d4d..a92d1cd497 100644 --- a/pcsx2/x86/ix86-32/iR5900MultDiv.cpp +++ b/pcsx2/x86/ix86-32/iR5900MultDiv.cpp @@ -61,7 +61,7 @@ void recWritebackHILO(int info, int writed, int upper) u8 testlive = upper?EEINST_LIVE2:EEINST_LIVE0; if( g_pCurInstInfo->regs[XMMGPR_HI] & testlive ) - MOV32RtoR( ECX, EDX ); + xMOV(ecx, edx); if( g_pCurInstInfo->regs[XMMGPR_LO] & testlive ) { @@ -69,17 +69,17 @@ void recWritebackHILO(int info, int writed, int upper) if( (reglo = _checkXMMreg(XMMTYPE_GPRREG, XMMGPR_LO, MODE_READ)) >= 0 ) { if( xmmregs[reglo].mode & MODE_WRITE ) { - if( upper ) SSE2_MOVQ_XMM_to_M64(loaddr-8, reglo); - else SSE_MOVHPS_XMM_to_M64(loaddr+8, reglo); + if( upper ) xMOVQ(ptr[(void*)(loaddr-8)], xRegisterSSE(reglo)); + else xMOVH.PS(ptr[(void*)(loaddr+8)], xRegisterSSE(reglo)); } xmmregs[reglo].inuse = 0; reglo = -1; } - CDQ(); - MOV32RtoM( loaddr, EAX ); - MOV32RtoM( loaddr+4, EDX ); + xCDQ(); + xMOV(ptr[(void*)(loaddr)], eax); + xMOV(ptr[(void*)(loaddr+4)], edx); savedlo = 1; } @@ -92,7 +92,7 @@ void recWritebackHILO(int info, int writed, int upper) if( savedlo ) { regd = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, MODE_WRITE|MODE_READ); if( regd >= 0 ) { - SSE_MOVLPS_M64_to_XMM(regd, loaddr); + xMOVL.PS(xRegisterSSE(regd), ptr[(void*)(loaddr)]); } } } @@ -100,9 +100,9 @@ void recWritebackHILO(int info, int writed, int upper) if( regd < 0 ) { _deleteEEreg(_Rd_, 0); - if( !savedlo ) CDQ(); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + if( !savedlo ) xCDQ(); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } } @@ -111,17 +111,17 @@ void recWritebackHILO(int info, int writed, int upper) if( (reghi = _checkXMMreg(XMMTYPE_GPRREG, XMMGPR_HI, MODE_READ)) >= 0 ) { if( xmmregs[reghi].mode & MODE_WRITE ) { - if( upper ) SSE2_MOVQ_XMM_to_M64(hiaddr-8, reghi); - else SSE_MOVHPS_XMM_to_M64(hiaddr+8, reghi); + if( upper ) xMOVQ(ptr[(void*)(hiaddr-8)], xRegisterSSE(reghi)); + else xMOVH.PS(ptr[(void*)(hiaddr+8)], xRegisterSSE(reghi)); } xmmregs[reghi].inuse = 0; reghi = -1; } - MOV32RtoM(hiaddr, ECX ); - SAR32ItoR(ECX, 31); - MOV32RtoM(hiaddr+4, ECX ); + xMOV(ptr[(void*)(hiaddr)], ecx); + xSAR(ecx, 31); + xMOV(ptr[(void*)(hiaddr+4)], ecx); } } @@ -135,8 +135,8 @@ void recWritebackHILOMMX(int info, int regsource, int writed, int upper) SetMMXstate(); t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, regsource); - PSRADItoR(t0reg, 31); // shift in 0s + xMOVQ(xRegisterMMX(t0reg), xRegisterMMX(regsource)); + xPSRA.D(xRegisterMMX(t0reg), 31); // shift in 0s if( (g_pCurInstInfo->regs[XMMGPR_LO] & testlive) || (writed && _Rd_) ) { if( (g_pCurInstInfo->regs[XMMGPR_HI] & testlive) ) @@ -147,26 +147,26 @@ void recWritebackHILOMMX(int info, int regsource, int writed, int upper) } t1reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t1reg, regsource); + xMOVQ(xRegisterMMX(t1reg), xRegisterMMX(regsource)); } - PUNPCKLDQRtoR(regsource, t0reg); + xPUNPCK.LDQ(xRegisterMMX(regsource), xRegisterMMX(t0reg)); } if( g_pCurInstInfo->regs[XMMGPR_LO] & testlive ) { int reglo; if( !upper && (reglo = _allocCheckGPRtoMMX(g_pCurInstInfo, XMMGPR_LO, MODE_WRITE)) >= 0 ) { - MOVQRtoR(reglo, regsource); + xMOVQ(xRegisterMMX(reglo), xRegisterMMX(regsource)); } else { reglo = _checkXMMreg(XMMTYPE_GPRREG, XMMGPR_LO, MODE_READ); - MOVQRtoM(loaddr, regsource); + xMOVQ(ptr[(void*)(loaddr)], xRegisterMMX(regsource)); if( reglo >= 0 ) { if( xmmregs[reglo].mode & MODE_WRITE ) { - if( upper ) SSE2_MOVQ_XMM_to_M64(loaddr-8, reglo); - else SSE_MOVHPS_XMM_to_M64(loaddr+8, reglo); + if( upper ) xMOVQ(ptr[(void*)(loaddr-8)], xRegisterSSE(reglo)); + else xMOVH.PS(ptr[(void*)(loaddr+8)], xRegisterSSE(reglo)); } xmmregs[reglo].inuse = 0; reglo = -1; @@ -179,7 +179,7 @@ void recWritebackHILOMMX(int info, int regsource, int writed, int upper) regd = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rd_, MODE_WRITE); if( regd >= 0 ) { - if( regd != regsource ) MOVQRtoR(regd, regsource); + if( regd != regsource ) xMOVQ(xRegisterMMX(regd), xRegisterMMX(regsource)); } else { regd = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, MODE_READ); @@ -187,21 +187,21 @@ void recWritebackHILOMMX(int info, int regsource, int writed, int upper) if( regd >= 0 ) { if( g_pCurInstInfo->regs[XMMGPR_LO] & testlive ) { // lo written - SSE_MOVLPS_M64_to_XMM(regd, loaddr); + xMOVL.PS(xRegisterSSE(regd), ptr[(void*)(loaddr)]); xmmregs[regd].mode |= MODE_WRITE; } else { - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], regsource); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], xRegisterMMX(regsource)); if( xmmregs[regd].mode & MODE_WRITE ) { - SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[_Rd_].UL[2], regd); + xMOVH.PS(ptr[&cpuRegs.GPR.r[_Rd_].UL[2]], xRegisterSSE(regd)); } xmmregs[regd].inuse = 0; } } else { - MOVQRtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], regsource); + xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], xRegisterMMX(regsource)); } } } @@ -211,24 +211,24 @@ void recWritebackHILOMMX(int info, int regsource, int writed, int upper) int mmreg = -1, reghi; if( t1reg >= 0 ) { - PUNPCKHDQRtoR(t1reg, t0reg); + xPUNPCK.HDQ(xRegisterMMX(t1reg), xRegisterMMX(t0reg)); mmreg = t1reg; } else { // can't modify regsource - PUNPCKHDQRtoR(t0reg, regsource); + xPUNPCK.HDQ(xRegisterMMX(t0reg), xRegisterMMX(regsource)); mmreg = t0reg; - PSHUFWRtoR(t0reg, t0reg, 0x4e); + xPSHUF.W(xRegisterMMX(t0reg), xRegisterMMX(t0reg), 0x4e); } if( upper ) { reghi = _checkXMMreg(XMMTYPE_GPRREG, XMMGPR_HI, MODE_READ); if( reghi >= 0 ) { - if( xmmregs[reghi].mode & MODE_WRITE ) SSE2_MOVQ_XMM_to_M64(hiaddr-8, reghi); + if( xmmregs[reghi].mode & MODE_WRITE ) xMOVQ(ptr[(void*)(hiaddr-8)], xRegisterSSE(reghi)); xmmregs[reghi].inuse = 0; } - MOVQRtoM(hiaddr, mmreg); + xMOVQ(ptr[(void*)(hiaddr)], xRegisterMMX(mmreg)); } else { _deleteGPRtoXMMreg(XMMGPR_HI, 2); @@ -261,12 +261,12 @@ void recWritebackConstHILO(u64 res, int writed, int upper) if( reglo >= 0 ) { u32* mem_ptr = recGetImm64(res & 0x80000000 ? -1 : 0, (u32)res); - if( upper ) SSE_MOVHPS_M64_to_XMM(reglo, (uptr)mem_ptr); - else SSE_MOVLPS_M64_to_XMM(reglo, (uptr)mem_ptr); + if( upper ) xMOVH.PS(xRegisterSSE(reglo), ptr[mem_ptr]); + else xMOVL.PS(xRegisterSSE(reglo), ptr[mem_ptr]); } else { - MOV32ItoM(loaddr, res & 0xffffffff); - MOV32ItoM(loaddr+4, (res&0x80000000)?0xffffffff:0); + xMOV(ptr32[(u32*)(loaddr)], res & 0xffffffff); + xMOV(ptr32[(u32*)(loaddr+4)], (res&0x80000000)?0xffffffff:0); } } } @@ -281,13 +281,13 @@ void recWritebackConstHILO(u64 res, int writed, int upper) if( reghi >= 0 ) { u32* mem_ptr = recGetImm64((res >> 63) ? -1 : 0, res >> 32); - if( upper ) SSE_MOVHPS_M64_to_XMM(reghi, (uptr)mem_ptr); - else SSE_MOVLPS_M64_to_XMM(reghi, (uptr)mem_ptr); + if( upper ) xMOVH.PS(xRegisterSSE(reghi), ptr[mem_ptr]); + else xMOVL.PS(xRegisterSSE(reghi), ptr[mem_ptr]); } else { _deleteEEreg(XMMGPR_HI, 0); - MOV32ItoM(hiaddr, res >> 32); - MOV32ItoM(hiaddr+4, (res>>63)?0xffffffff:0); + xMOV(ptr32[(u32*)(hiaddr)], res >> 32); + xMOV(ptr32[(u32*)(hiaddr+4)], (res>>63)?0xffffffff:0); } } } @@ -308,16 +308,16 @@ void recMULTUsuper(int info, int upper, int process); void recMULTsuper(int info, int upper, int process) { if( process & PROCESS_CONSTS ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rs_].UL[0] ); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } else if( process & PROCESS_CONSTT) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } recWritebackHILO(info, 1, upper); @@ -397,16 +397,16 @@ void recMULTU_const() void recMULTUsuper(int info, int upper, int process) { if( process & PROCESS_CONSTS ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rs_].UL[0] ); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } else if( process & PROCESS_CONSTT) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } recWritebackHILO(info, 1, upper); @@ -511,52 +511,52 @@ void recDIV_const() void recDIVsuper(int info, int sign, int upper, int process) { if( process & PROCESS_CONSTT ) - MOV32ItoR( ECX, g_cpuConstRegs[_Rt_].UL[0] ); + xMOV(ecx, g_cpuConstRegs[_Rt_].UL[0] ); else - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(ecx, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); if( process & PROCESS_CONSTS ) - MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); + xMOV(eax, g_cpuConstRegs[_Rs_].UL[0] ); else - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); u8 *end1; if (sign) //test for overflow (x86 will just throw an exception) { - CMP32ItoR( EAX, 0x80000000 ); + xCMP(eax, 0x80000000 ); u8 *cont1 = JNE8(0); - CMP32ItoR( ECX, 0xffffffff ); + xCMP(ecx, 0xffffffff ); u8 *cont2 = JNE8(0); //overflow case: - XOR32RtoR( EDX, EDX ); //EAX remains 0x80000000 + xXOR(edx, edx); //EAX remains 0x80000000 end1 = JMP8(0); x86SetJ8(cont1); x86SetJ8(cont2); } - CMP32ItoR( ECX, 0 ); + xCMP(ecx, 0 ); u8 *cont3 = JNE8(0); //divide by zero - MOV32RtoR( EDX, EAX ); + xMOV(edx, eax); if (sign) //set EAX to (EAX < 0)?1:-1 { - SAR32ItoR( EAX, 31 ); //(EAX < 0)?-1:0 - SHL32ItoR( EAX, 1 ); //(EAX < 0)?-2:0 - NOT32R( EAX ); //(EAX < 0)?1:-1 + xSAR(eax, 31 ); //(EAX < 0)?-1:0 + xSHL(eax, 1 ); //(EAX < 0)?-2:0 + xNOT(eax); //(EAX < 0)?1:-1 } else - MOV32ItoR( EAX, 0xffffffff ); + xMOV(eax, 0xffffffff ); u8 *end2 = JMP8(0); x86SetJ8(cont3); if( sign ) { - CDQ(); - IDIV32R( ECX ); + xCDQ(); + xDIV(ecx); } else { - XOR32RtoR( EDX, EDX ); - DIV32R( ECX ); + xXOR(edx, edx); + xUDIV(ecx); } if (sign) x86SetJ8( end1 ); @@ -674,25 +674,25 @@ void recMADD() _deleteEEreg(XMMGPR_HI, 1); // dadd - MOV32MtoR( EAX, (uptr)&cpuRegs.LO.UL[ 0 ] ); - MOV32MtoR( ECX, (uptr)&cpuRegs.HI.UL[ 0 ] ); - ADD32ItoR( EAX, (u32)result&0xffffffff ); - ADC32ItoR( ECX, (u32)(result>>32) ); - CDQ(); + xMOV(eax, ptr[&cpuRegs.LO.UL[ 0 ] ]); + xMOV(ecx, ptr[&cpuRegs.HI.UL[ 0 ] ]); + xADD(eax, (u32)result&0xffffffff ); + xADC(ecx, (u32)(result>>32) ); + xCDQ(); if( _Rd_) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[0], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[1], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[0]], eax); + xMOV(ptr[&cpuRegs.LO.UL[1]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[0], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[1], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[0]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[1]], edx); return; } @@ -704,36 +704,36 @@ void recMADD() _deleteMMXreg(MMX_GPR+_Rt_, 1); if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rs_].UL[0] ); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } else if ( GPR_IS_CONST1(_Rt_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } - MOV32RtoR( ECX, EDX ); - ADD32MtoR( EAX, (uptr)&cpuRegs.LO.UL[0] ); - ADC32MtoR( ECX, (uptr)&cpuRegs.HI.UL[0] ); - CDQ(); + xMOV(ecx, edx); + xADD(eax, ptr[&cpuRegs.LO.UL[0] ]); + xADC(ecx, ptr[&cpuRegs.HI.UL[0] ]); + xCDQ(); if( _Rd_ ) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[0], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[1], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[0]], eax); + xMOV(ptr[&cpuRegs.LO.UL[1]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[0], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[1], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[0]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[1]], edx); } //static PCSX2_ALIGNED16(u32 s_MaddMask[]) = { 0x80000000, 0, 0x80000000, 0 }; @@ -746,25 +746,25 @@ void recMADDU() _deleteEEreg(XMMGPR_HI, 1); // dadd - MOV32MtoR( EAX, (uptr)&cpuRegs.LO.UL[ 0 ] ); - MOV32MtoR( ECX, (uptr)&cpuRegs.HI.UL[ 0 ] ); - ADD32ItoR( EAX, (u32)result&0xffffffff ); - ADC32ItoR( ECX, (u32)(result>>32) ); - CDQ(); + xMOV(eax, ptr[&cpuRegs.LO.UL[ 0 ] ]); + xMOV(ecx, ptr[&cpuRegs.HI.UL[ 0 ] ]); + xADD(eax, (u32)result&0xffffffff ); + xADC(ecx, (u32)(result>>32) ); + xCDQ(); if( _Rd_) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[0], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[1], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[0]], eax); + xMOV(ptr[&cpuRegs.LO.UL[1]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[0], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[1], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[0]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[1]], edx); return; } @@ -776,36 +776,36 @@ void recMADDU() _deleteMMXreg(MMX_GPR+_Rt_, 1); if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rs_].UL[0] ); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } else if ( GPR_IS_CONST1(_Rt_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } - MOV32RtoR( ECX, EDX ); - ADD32MtoR( EAX, (uptr)&cpuRegs.LO.UL[0] ); - ADC32MtoR( ECX, (uptr)&cpuRegs.HI.UL[0] ); - CDQ(); + xMOV(ecx, edx); + xADD(eax, ptr[&cpuRegs.LO.UL[0] ]); + xADC(ecx, ptr[&cpuRegs.HI.UL[0] ]); + xCDQ(); if( _Rd_ ) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[0], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[1], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[0]], eax); + xMOV(ptr[&cpuRegs.LO.UL[1]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[0], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[1], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[0]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[1]], edx); } void recMADD1() @@ -816,25 +816,25 @@ void recMADD1() _deleteEEreg(XMMGPR_HI, 1); // dadd - MOV32MtoR( EAX, (uptr)&cpuRegs.LO.UL[ 2 ] ); - MOV32MtoR( ECX, (uptr)&cpuRegs.HI.UL[ 2 ] ); - ADD32ItoR( EAX, (u32)result&0xffffffff ); - ADC32ItoR( ECX, (u32)(result>>32) ); - CDQ(); + xMOV(eax, ptr[&cpuRegs.LO.UL[ 2 ] ]); + xMOV(ecx, ptr[&cpuRegs.HI.UL[ 2 ] ]); + xADD(eax, (u32)result&0xffffffff ); + xADC(ecx, (u32)(result>>32) ); + xCDQ(); if( _Rd_) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[2], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[3], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[2]], eax); + xMOV(ptr[&cpuRegs.LO.UL[3]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[2], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[3], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[2]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[3]], edx); return; } @@ -846,36 +846,36 @@ void recMADD1() _deleteMMXreg(MMX_GPR+_Rt_, 1); if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rs_].UL[0] ); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } else if ( GPR_IS_CONST1(_Rt_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } - MOV32RtoR( ECX, EDX ); - ADD32MtoR( EAX, (uptr)&cpuRegs.LO.UL[2] ); - ADC32MtoR( ECX, (uptr)&cpuRegs.HI.UL[2] ); - CDQ(); + xMOV(ecx, edx); + xADD(eax, ptr[&cpuRegs.LO.UL[2] ]); + xADC(ecx, ptr[&cpuRegs.HI.UL[2] ]); + xCDQ(); if( _Rd_ ) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[2], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[3], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[2]], eax); + xMOV(ptr[&cpuRegs.LO.UL[3]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[2], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[3], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[2]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[3]], edx); } //static PCSX2_ALIGNED16(u32 s_MaddMask[]) = { 0x80000000, 0, 0x80000000, 0 }; @@ -888,25 +888,25 @@ void recMADDU1() _deleteEEreg(XMMGPR_HI, 1); // dadd - MOV32MtoR( EAX, (uptr)&cpuRegs.LO.UL[ 2 ] ); - MOV32MtoR( ECX, (uptr)&cpuRegs.HI.UL[ 2 ] ); - ADD32ItoR( EAX, (u32)result&0xffffffff ); - ADC32ItoR( ECX, (u32)(result>>32) ); - CDQ(); + xMOV(eax, ptr[&cpuRegs.LO.UL[ 2 ] ]); + xMOV(ecx, ptr[&cpuRegs.HI.UL[ 2 ] ]); + xADD(eax, (u32)result&0xffffffff ); + xADC(ecx, (u32)(result>>32) ); + xCDQ(); if( _Rd_) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[2], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[3], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[2]], eax); + xMOV(ptr[&cpuRegs.LO.UL[3]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[2], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[3], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[2]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[3]], edx); return; } @@ -918,36 +918,36 @@ void recMADDU1() _deleteMMXreg(MMX_GPR+_Rt_, 1); if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rs_].UL[0] ); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } else if ( GPR_IS_CONST1(_Rt_) ) { - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); } else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xUMUL(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); } - MOV32RtoR( ECX, EDX ); - ADD32MtoR( EAX, (uptr)&cpuRegs.LO.UL[2] ); - ADC32MtoR( ECX, (uptr)&cpuRegs.HI.UL[2] ); - CDQ(); + xMOV(ecx, edx); + xADD(eax, ptr[&cpuRegs.LO.UL[2] ]); + xADC(ecx, ptr[&cpuRegs.HI.UL[2] ]); + xCDQ(); if( _Rd_ ) { _eeOnWriteReg(_Rd_, 1); _deleteEEreg(_Rd_, 0); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } - MOV32RtoM( (uptr)&cpuRegs.LO.UL[2], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[3], EDX ); + xMOV(ptr[&cpuRegs.LO.UL[2]], eax); + xMOV(ptr[&cpuRegs.LO.UL[3]], edx); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[2], ECX ); - MOV32RtoR(EAX, ECX); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[3], EDX ); + xMOV(ptr[&cpuRegs.HI.UL[2]], ecx); + xMOV(eax, ecx); + xCDQ(); + xMOV(ptr[&cpuRegs.HI.UL[3]], edx); } diff --git a/pcsx2/x86/ix86-32/iR5900Shift.cpp b/pcsx2/x86/ix86-32/iR5900Shift.cpp index f3ff460812..21ed7c778f 100644 --- a/pcsx2/x86/ix86-32/iR5900Shift.cpp +++ b/pcsx2/x86/ix86-32/iR5900Shift.cpp @@ -64,15 +64,15 @@ void recSLLs_(int info, int sa) { pxAssert( !(info & PROCESS_EE_XMM) ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); if ( sa != 0 ) { - SHL32ItoR( EAX, sa ); + xSHL(eax, sa ); } - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xCDQ( ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } void recSLL_(int info) @@ -92,12 +92,12 @@ void recSRLs_(int info, int sa) { pxAssert( !(info & PROCESS_EE_XMM) ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( sa != 0 ) SHR32ItoR( EAX, sa); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); + if ( sa != 0 ) xSHR(eax, sa); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xCDQ( ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } void recSRL_(int info) @@ -117,12 +117,12 @@ void recSRAs_(int info, int sa) { pxAssert( !(info & PROCESS_EE_XMM) ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( sa != 0 ) SAR32ItoR( EAX, sa); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); + if ( sa != 0 ) xSAR(eax, sa); - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xCDQ(); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } void recSRA_(int info) @@ -149,8 +149,8 @@ void recDSLLs_(int info, int sa) rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); SetMMXstate(); - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - PSLLQItoR(rdreg, sa); + if( rtreg != rdreg ) xMOVQ(xRegisterMMX(rdreg), xRegisterMMX(rtreg)); + xPSLL.Q(xRegisterMMX(rdreg), sa); } void recDSLL_(int info) @@ -177,8 +177,8 @@ void recDSRLs_(int info, int sa) rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); SetMMXstate(); - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - PSRLQItoR(rdreg, sa); + if( rtreg != rdreg ) xMOVQ(xRegisterMMX(rdreg), xRegisterMMX(rtreg)); + xPSRL.Q(xRegisterMMX(rdreg), sa); } void recDSRL_(int info) @@ -205,19 +205,19 @@ void recDSRAs_(int info, int sa) rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); SetMMXstate(); - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); + if( rtreg != rdreg ) xMOVQ(xRegisterMMX(rdreg), xRegisterMMX(rtreg)); if ( sa != 0 ) { t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, rtreg); + xMOVQ(xRegisterMMX(t0reg), xRegisterMMX(rtreg)); // it is a signed shift - PSRADItoR(t0reg, sa); - PSRLQItoR(rdreg, sa); + xPSRA.D(xRegisterMMX(t0reg), sa); + xPSRL.Q(xRegisterMMX(rdreg), sa); - PUNPCKHDQRtoR(t0reg, t0reg); // shift to lower + xPUNPCK.HDQ(xRegisterMMX(t0reg), xRegisterMMX(t0reg)); // shift to lower // take lower dword of rdreg and lower dword of t0reg - PUNPCKLDQRtoR(rdreg, t0reg); + xPUNPCK.LDQ(xRegisterMMX(rdreg), xRegisterMMX(t0reg)); _freeMMXreg(t0reg); } @@ -240,13 +240,13 @@ void recDSLL32s_(int info, int sa) { pxAssert( !(info & PROCESS_EE_XMM) ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); if ( sa != 0 ) { - SHL32ItoR( EAX, sa ); + xSHL(eax, sa ); } - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], 0 ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EAX ); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], 0 ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], eax); } @@ -267,11 +267,11 @@ void recDSRL32s_(int info, int sa) { pxAssert( !(info & PROCESS_EE_XMM) ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - if ( sa != 0 ) SHR32ItoR( EAX, sa ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); + if ( sa != 0 ) xSHR(eax, sa ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], 0 ); } void recDSRL32_(int info) @@ -291,12 +291,12 @@ void recDSRA32s_(int info, int sa) { pxAssert( !(info & PROCESS_EE_XMM) ); - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - CDQ( ); - if ( sa != 0 ) SAR32ItoR( EAX, sa ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ]); + xCDQ( ); + if ( sa != 0 ) xSAR(eax, sa ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } @@ -325,12 +325,12 @@ int recSetShiftV(int info, int* rsreg, int* rtreg, int* rdreg, int* rstemp, int SetMMXstate(); *rstemp = _allocMMXreg(-1, MMX_TEMP, 0); - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - AND32ItoR(EAX, shift64?0x3f:0x1f); - MOVD32RtoMMX(*rstemp, EAX); + xMOV(eax, ptr[&cpuRegs.GPR.r[_Rs_].UL[0]]); + xAND(eax, shift64?0x3f:0x1f); + xMOVDZX(xRegisterMMX(*rstemp), eax); *rsreg = *rstemp; - if( *rtreg != *rdreg ) MOVQRtoR(*rdreg, *rtreg); + if( *rtreg != *rdreg ) xMOVQ(xRegisterMMX(*rdreg), xRegisterMMX(*rtreg)); return 1; } @@ -341,9 +341,9 @@ void recSetConstShiftV(int info, int* rsreg, int* rdreg, int* rstemp, int shift6 SetMMXstate(); *rstemp = _allocMMXreg(-1, MMX_TEMP, 0); - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - AND32ItoR(EAX, shift64?0x3f:0x1f); - MOVD32RtoMMX(*rstemp, EAX); + xMOV(eax, ptr[&cpuRegs.GPR.r[_Rs_].UL[0]]); + xAND(eax, shift64?0x3f:0x1f); + xMOVDZX(xRegisterMMX(*rstemp), eax); *rsreg = *rstemp; _flushConstReg(_Rt_); @@ -362,27 +362,27 @@ void recSLLV_consts(int info) void recSLLV_constt(int info) { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(ecx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - AND32ItoR( ECX, 0x1f ); - SHL32CLtoR( EAX ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xAND(ecx, 0x1f ); + xSHL(eax, cl); eeSignExtendTo(_Rd_); } void recSLLV_(int info) { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); if ( _Rs_ != 0 ) { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x1f ); - SHL32CLtoR( EAX ); + xMOV(ecx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xAND(ecx, 0x1f ); + xSHL(eax, cl); } - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xCDQ(); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } EERECOMPILE_CODE0(SLLV, XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED); @@ -400,27 +400,27 @@ void recSRLV_consts(int info) void recSRLV_constt(int info) { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(ecx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - AND32ItoR( ECX, 0x1f ); - SHR32CLtoR( EAX ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xAND(ecx, 0x1f ); + xSHR(eax, cl); eeSignExtendTo(_Rd_); } void recSRLV_(int info) { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); if ( _Rs_ != 0 ) { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x1f ); - SHR32CLtoR( EAX ); + xMOV(ecx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xAND(ecx, 0x1f ); + xSHR(eax, cl); } - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xCDQ( ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } EERECOMPILE_CODE0(SRLV, XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED); @@ -438,27 +438,27 @@ void recSRAV_consts(int info) void recSRAV_constt(int info) { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + xMOV(ecx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); - MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - AND32ItoR( ECX, 0x1f ); - SAR32CLtoR( EAX ); + xMOV(eax, g_cpuConstRegs[_Rt_].UL[0] ); + xAND(ecx, 0x1f ); + xSAR(eax, cl); eeSignExtendTo(_Rd_); } void recSRAV_(int info) { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]); if ( _Rs_ != 0 ) { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x1f ); - SAR32CLtoR( EAX ); + xMOV(ecx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ]); + xAND(ecx, 0x1f ); + xSAR(eax, cl); } - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + xCDQ( ); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax); + xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx); } EERECOMPILE_CODE0(SRAV, XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED); @@ -481,8 +481,8 @@ void recDSLLV_constt(int info) int rsreg, rdreg, rstemp = -1; recSetConstShiftV(info, &rsreg, &rdreg, &rstemp, 1); - MOVQMtoR(rdreg, (uptr)&cpuRegs.GPR.r[_Rt_]); - PSLLQRtoR(rdreg, rsreg); + xMOVQ(xRegisterMMX(rdreg), ptr[&cpuRegs.GPR.r[_Rt_]]); + xPSLL.Q(xRegisterMMX(rdreg), xRegisterMMX(rsreg)); if( rstemp != -1 ) _freeMMXreg(rstemp); } @@ -491,7 +491,7 @@ void recDSLLV_(int info) int rsreg, rtreg, rdreg, rstemp = -1; recSetShiftV(info, &rsreg, &rtreg, &rdreg, &rstemp, 1); - PSLLQRtoR(rdreg, rsreg); + xPSLL.Q(xRegisterMMX(rdreg), xRegisterMMX(rsreg)); if( rstemp != -1 ) _freeMMXreg(rstemp); } @@ -515,8 +515,8 @@ void recDSRLV_constt(int info) int rsreg, rdreg, rstemp = -1; recSetConstShiftV(info, &rsreg, &rdreg, &rstemp, 1); - MOVQMtoR(rdreg, (uptr)&cpuRegs.GPR.r[_Rt_]); - PSRLQRtoR(rdreg, rsreg); + xMOVQ(xRegisterMMX(rdreg), ptr[&cpuRegs.GPR.r[_Rt_]]); + xPSRL.Q(xRegisterMMX(rdreg), xRegisterMMX(rsreg)); if( rstemp != -1 ) _freeMMXreg(rstemp); } @@ -525,7 +525,7 @@ void recDSRLV_(int info) int rsreg, rtreg, rdreg, rstemp = -1; recSetShiftV(info, &rsreg, &rtreg, &rdreg, &rstemp, 1); - PSRLQRtoR(rdreg, rsreg); + xPSRL.Q(xRegisterMMX(rdreg), xRegisterMMX(rsreg)); if( rstemp != -1 ) _freeMMXreg(rstemp); } @@ -552,24 +552,24 @@ void recDSRAV_constt(int info) recSetConstShiftV(info, &rsreg, &rdreg, &rstemp, 1); - MOVQMtoR(rdreg, (uptr)&cpuRegs.GPR.r[_Rt_]); - PXORRtoR(t0reg, t0reg); + xMOVQ(xRegisterMMX(rdreg), ptr[&cpuRegs.GPR.r[_Rt_]]); + xPXOR(xRegisterMMX(t0reg), xRegisterMMX(t0reg)); // calc high bit - MOVQRtoR(t1reg, rdreg); - PCMPGTDRtoR(t0reg, rdreg); - PUNPCKHDQRtoR(t0reg, t0reg); // shift to lower + xMOVQ(xRegisterMMX(t1reg), xRegisterMMX(rdreg)); + xPCMP.GTD(xRegisterMMX(t0reg), xRegisterMMX(rdreg)); + xPUNPCK.HDQ(xRegisterMMX(t0reg), xRegisterMMX(t0reg)); // shift to lower // shift highest bit, 64 - eax - MOV32ItoR(EAX, 64); - MOVD32RtoMMX(t1reg, EAX); - PSUBDRtoR(t1reg, rsreg); + xMOV(eax, 64); + xMOVDZX(xRegisterMMX(t1reg), eax); + xPSUB.D(xRegisterMMX(t1reg), xRegisterMMX(rsreg)); // right logical shift - PSRLQRtoR(rdreg, rsreg); - PSLLQRtoR(t0reg, t1reg); // highest bits + xPSRL.Q(xRegisterMMX(rdreg), xRegisterMMX(rsreg)); + xPSLL.Q(xRegisterMMX(t0reg), xRegisterMMX(t1reg)); // highest bits - PORRtoR(rdreg, t0reg); + xPOR(xRegisterMMX(rdreg), xRegisterMMX(t0reg)); _freeMMXreg(t0reg); _freeMMXreg(t1reg); @@ -583,23 +583,23 @@ void recDSRAV_(int info) t1reg = _allocMMXreg(-1, MMX_TEMP, 0); recSetShiftV(info, &rsreg, &rtreg, &rdreg, &rstemp, 1); - PXORRtoR(t0reg, t0reg); + xPXOR(xRegisterMMX(t0reg), xRegisterMMX(t0reg)); // calc high bit - MOVQRtoR(t1reg, rdreg); - PCMPGTDRtoR(t0reg, rdreg); - PUNPCKHDQRtoR(t0reg, t0reg); // shift to lower + xMOVQ(xRegisterMMX(t1reg), xRegisterMMX(rdreg)); + xPCMP.GTD(xRegisterMMX(t0reg), xRegisterMMX(rdreg)); + xPUNPCK.HDQ(xRegisterMMX(t0reg), xRegisterMMX(t0reg)); // shift to lower // shift highest bit, 64 - eax - MOV32ItoR(EAX, 64); - MOVD32RtoMMX(t1reg, EAX); - PSUBDRtoR(t1reg, rsreg); + xMOV(eax, 64); + xMOVDZX(xRegisterMMX(t1reg), eax); + xPSUB.D(xRegisterMMX(t1reg), xRegisterMMX(rsreg)); // right logical shift - PSRLQRtoR(rdreg, rsreg); - PSLLQRtoR(t0reg, t1reg); // highest bits + xPSRL.Q(xRegisterMMX(rdreg), xRegisterMMX(rsreg)); + xPSLL.Q(xRegisterMMX(t0reg), xRegisterMMX(t1reg)); // highest bits - PORRtoR(rdreg, t0reg); + xPOR(xRegisterMMX(rdreg), xRegisterMMX(t0reg)); _freeMMXreg(t0reg); _freeMMXreg(t1reg); diff --git a/pcsx2/x86/ix86-32/iR5900Templates.cpp b/pcsx2/x86/ix86-32/iR5900Templates.cpp index 6e90bfd238..33f2f9196a 100644 --- a/pcsx2/x86/ix86-32/iR5900Templates.cpp +++ b/pcsx2/x86/ix86-32/iR5900Templates.cpp @@ -527,15 +527,15 @@ int eeRecompileCodeXMM(int xmminfo) // flush consts if( xmminfo & XMMINFO_READT ) { if( GPR_IS_CONST1( _Rt_ ) && !(g_cpuFlushedConstReg&(1<<_Rt_)) ) { - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], g_cpuConstRegs[_Rt_].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], g_cpuConstRegs[_Rt_].UL[1]); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], g_cpuConstRegs[_Rt_].UL[0]); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], g_cpuConstRegs[_Rt_].UL[1]); g_cpuFlushedConstReg |= (1<<_Rt_); } } if( xmminfo & XMMINFO_READS) { if( GPR_IS_CONST1( _Rs_ ) && !(g_cpuFlushedConstReg&(1<<_Rs_)) ) { - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], g_cpuConstRegs[_Rs_].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], g_cpuConstRegs[_Rs_].UL[1]); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]], g_cpuConstRegs[_Rs_].UL[0]); + xMOV(ptr32[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]], g_cpuConstRegs[_Rs_].UL[1]); g_cpuFlushedConstReg |= (1<<_Rs_); } } diff --git a/pcsx2/x86/ix86-32/recVTLB.cpp b/pcsx2/x86/ix86-32/recVTLB.cpp index df13f4e69e..b37eccfe5c 100644 --- a/pcsx2/x86/ix86-32/recVTLB.cpp +++ b/pcsx2/x86/ix86-32/recVTLB.cpp @@ -72,7 +72,7 @@ static void iMOV128_SSE( const xIndirectVoid& destRm, const xIndirectVoid& srcRm // if neither MMX nor SSE is available to the task. // // Optimizations: This method uses MMX is the cpu is in MMX mode, or SSE if it's in FPU -// mode (saving on potential EMMS uses). +// mode (saving on potential xEMMS uses). // static void iMOV64_Smart( const xIndirectVoid& destRm, const xIndirectVoid& srcRm ) { diff --git a/pcsx2/x86/sVU_Debug.h b/pcsx2/x86/sVU_Debug.h index 7bef68ca65..f91480f210 100644 --- a/pcsx2/x86/sVU_Debug.h +++ b/pcsx2/x86/sVU_Debug.h @@ -19,8 +19,8 @@ _freeXMMregs(/*&VU*/); \ _freeMMXregs(); \ SetFPUstate();) \ - MOV32ItoM((uptr)&VU.code, (u32)VU.code); \ - CALLFunc((uptr)VU##MI_##f); \ + xMOV(ptr32[&VU.code], (u32)VU.code); \ + xCALL((void*)(uptr)VU##MI_##f); \ } #define REC_VUOPs(VU, f) { \ @@ -28,12 +28,12 @@ _freeMMXregs(); \ SetFPUstate();) \ if (VU==&VU1) { \ - MOV32ItoM((uptr)&VU1.code, (u32)VU1.code); \ - CALLFunc((uptr)VU1MI_##f); \ + xMOV(ptr32[&VU1.code], (u32)VU1.code); \ + xCALL((void*)(uptr)VU1MI_##f); \ } \ else { \ - MOV32ItoM((uptr)&VU0.code, (u32)VU0.code); \ - CALLFunc((uptr)VU0MI_##f); \ + xMOV(ptr32[&VU0.code], (u32)VU0.code); \ + xCALL((void*)(uptr)VU0MI_##f); \ } \ } @@ -41,16 +41,16 @@ _freeXMMregs(/*&VU*/); \ _freeMMXregs(); \ SetFPUstate(); \ - MOV32ItoM((uptr)&VU.code, (u32)VU.code); \ - CALLFunc((uptr)VU##MI_##f); \ + xMOV(ptr32[&VU.code], (u32)VU.code); \ + xCALL((void*)(uptr)VU##MI_##f); \ } #define REC_VUBRANCH(VU, f) { \ _freeXMMregs(/*&VU*/); \ _freeMMXregs(); \ SetFPUstate(); \ - MOV32ItoM((uptr)&VU.code, (u32)VU.code); \ - MOV32ItoM((uptr)&VU.VI[REG_TPC].UL, (u32)pc); \ - CALLFunc((uptr)VU##MI_##f); \ + xMOV(ptr32[&VU.code], (u32)VU.code); \ + xMOV(ptr32[&VU.VI[REG_TPC].UL], (u32)pc); \ + xCALL((void*)(uptr)VU##MI_##f); \ branch = 1; \ } diff --git a/pcsx2/x86/sVU_Lower.cpp b/pcsx2/x86/sVU_Lower.cpp index 9ed269a2c4..98527aebf2 100644 --- a/pcsx2/x86/sVU_Lower.cpp +++ b/pcsx2/x86/sVU_Lower.cpp @@ -93,37 +93,37 @@ void recVUMI_DIV(VURegs *VU, int info) u32 *ajmp32, *bjmp32; //Console.WriteLn("recVUMI_DIV()"); - AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags + xAND(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0xFCF); // Clear D/I flags // FT can be zero here! so we need to check if its zero and set the correct flag. - SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); // Clear EEREC_TEMP - SSE_CMPEQPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); // Set all F's if each vector is zero + xXOR.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); // Clear EEREC_TEMP + xCMPEQ.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); // Set all F's if each vector is zero - SSE_MOVMSKPS_XMM_to_R32( EAX, EEREC_TEMP); // Move the sign bits of the previous calculation + xMOVMSKPS(eax, xRegisterSSE(EEREC_TEMP)); // Move the sign bits of the previous calculation - AND32ItoR( EAX, (1<<_Ftf_) ); // Grab "Is Zero" bits from the previous calculation + xAND(eax, (1<<_Ftf_) ); // Grab "Is Zero" bits from the previous calculation ajmp32 = JZ32(0); // Skip if none are - SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); // Clear EEREC_TEMP - SSE_CMPEQPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); // Set all F's if each vector is zero - SSE_MOVMSKPS_XMM_to_R32(EAX, EEREC_TEMP); // Move the sign bits of the previous calculation + xXOR.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); // Clear EEREC_TEMP + xCMPEQ.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); // Set all F's if each vector is zero + xMOVMSKPS(eax, xRegisterSSE(EEREC_TEMP)); // Move the sign bits of the previous calculation - AND32ItoR( EAX, (1<<_Fsf_) ); // Grab "Is Zero" bits from the previous calculation + xAND(eax, (1<<_Fsf_) ); // Grab "Is Zero" bits from the previous calculation pjmp = JZ8(0); - OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410 ); // Set invalid flag (0/0) + xOR(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0x410 ); // Set invalid flag (0/0) pjmp1 = JMP8(0); x86SetJ8(pjmp); - OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820 ); // Zero divide (only when not 0/0) + xOR(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0x820 ); // Zero divide (only when not 0/0) x86SetJ8(pjmp1); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); _vuFlipRegSS_xyzw(EEREC_T, _Ftf_); - SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xXOR.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); _vuFlipRegSS_xyzw(EEREC_T, _Ftf_); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ORPS_M128_to_XMM(EEREC_TEMP, (uptr)&g_maxvals[0]); // If division by zero, then EEREC_TEMP = +/- fmax + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&g_maxvals[0]]); // If division by zero, then EEREC_TEMP = +/- fmax bjmp32 = JMP32(0); @@ -137,14 +137,14 @@ void recVUMI_DIV(VURegs *VU, int info) _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); _vuFlipRegSS_xyzw(EEREC_T, _Ftf_); - SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xDIV.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); _vuFlipRegSS_xyzw(EEREC_T, _Ftf_); vuFloat_useEAX(info, EEREC_TEMP, 0x8); x86SetJ32(bjmp32); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_Q, 0))], xRegisterSSE(EEREC_TEMP)); } //------------------------------------------------------------------ @@ -158,19 +158,19 @@ void recVUMI_SQRT( VURegs *VU, int info ) //Console.WriteLn("recVUMI_SQRT()"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, _Ftf_); - AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags + xAND(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0xFCF); // Clear D/I flags /* Check for negative sqrt */ - SSE_MOVMSKPS_XMM_to_R32(EAX, EEREC_TEMP); - AND32ItoR(EAX, 1); //Check sign + xMOVMSKPS(eax, xRegisterSSE(EEREC_TEMP)); + xAND(eax, 1); //Check sign pjmp = JZ8(0); //Skip if none are - OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); // Invalid Flag - Negative number sqrt + xOR(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0x410); // Invalid Flag - Negative number sqrt x86SetJ8(pjmp); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)const_clip); // Do a cardinal sqrt - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)g_maxvals); // Clamp infinities (only need to do positive clamp since EEREC_TEMP is positive) - SSE_SQRTSS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[const_clip]); // Do a cardinal sqrt + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_TEMP), ptr[g_maxvals]); // Clamp infinities (only need to do positive clamp since EEREC_TEMP is positive) + xSQRT.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_Q, 0))], xRegisterSSE(EEREC_TEMP)); } //------------------------------------------------------------------ @@ -187,67 +187,67 @@ void recVUMI_RSQRT(VURegs *VU, int info) //Console.WriteLn("recVUMI_RSQRT()"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, _Ftf_); - AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags + xAND(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0xFCF); // Clear D/I flags /* Check for negative divide */ - SSE_MOVMSKPS_XMM_to_R32(EAX, EEREC_TEMP); - AND32ItoR(EAX, 1); //Check sign + xMOVMSKPS(eax, xRegisterSSE(EEREC_TEMP)); + xAND(eax, 1); //Check sign ajmp8 = JZ8(0); //Skip if none are - OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); // Invalid Flag - Negative number sqrt + xOR(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0x410); // Invalid Flag - Negative number sqrt x86SetJ8(ajmp8); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)const_clip); // Do a cardinal sqrt - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)g_maxvals); // Clamp Infinities to Fmax - SSE_SQRTSS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[const_clip]); // Do a cardinal sqrt + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_TEMP), ptr[g_maxvals]); // Clamp Infinities to Fmax + xSQRT.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); t1reg = _vuGetTempXMMreg(info); if( t1reg < 0 ) { for (t1reg = 0; ( (t1reg == EEREC_TEMP) || (t1reg == EEREC_S) ); t1reg++) ; // Makes t1reg not be EEREC_TEMP or EEREC_S. - SSE_MOVAPS_XMM_to_M128( (uptr)&RSQRT_TEMP_XMM[0], t1reg ); // backup data in t1reg to a temp address + xMOVAPS(ptr[&RSQRT_TEMP_XMM[0]], xRegisterSSE(t1reg )); // backup data in t1reg to a temp address t1boolean = 1; } else t1boolean = 0; // Ft can still be zero here! so we need to check if its zero and set the correct flag. - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg - SSE_CMPEQSS_XMM_to_XMM(t1reg, EEREC_TEMP); // Set all F's if each vector is zero + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); // Clear t1reg + xCMPEQ.SS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); // Set all F's if each vector is zero - SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation + xMOVMSKPS(eax, xRegisterSSE(t1reg)); // Move the sign bits of the previous calculation - AND32ItoR( EAX, 0x01 ); // Grab "Is Zero" bits from the previous calculation + xAND(eax, 0x01 ); // Grab "Is Zero" bits from the previous calculation ajmp8 = JZ8(0); // Skip if none are //check for 0/0 _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear EEREC_TEMP - SSE_CMPEQPS_XMM_to_XMM(t1reg, EEREC_TEMP); // Set all F's if each vector is zero - SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); // Clear EEREC_TEMP + xCMPEQ.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); // Set all F's if each vector is zero + xMOVMSKPS(eax, xRegisterSSE(t1reg)); // Move the sign bits of the previous calculation - AND32ItoR( EAX, 0x01 ); // Grab "Is Zero" bits from the previous calculation + xAND(eax, 0x01 ); // Grab "Is Zero" bits from the previous calculation qjmp1 = JZ8(0); - OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410 ); // Set invalid flag (0/0) + xOR(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0x410 ); // Set invalid flag (0/0) qjmp2 = JMP8(0); x86SetJ8(qjmp1); - OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820 ); // Zero divide (only when not 0/0) + xOR(ptr32[(u32*)(VU_VI_ADDR(REG_STATUS_FLAG, 2))], 0x820 ); // Zero divide (only when not 0/0) x86SetJ8(qjmp2); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ORPS_M128_to_XMM(EEREC_TEMP, (uptr)&g_maxvals[0]); // If division by zero, then EEREC_TEMP = +/- fmax - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&g_maxvals[0]]); // If division by zero, then EEREC_TEMP = +/- fmax + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_Q, 0))], xRegisterSSE(EEREC_TEMP)); bjmp8 = JMP8(0); x86SetJ8(ajmp8); _unpackVFSS_xyzw(t1reg, EEREC_S, _Fsf_); if (CHECK_VU_EXTRA_OVERFLOW) vuFloat_useEAX(info, t1reg, 0x8); // Clamp Infinities - SSE_DIVSS_XMM_to_XMM(t1reg, EEREC_TEMP); + xDIV.SS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); vuFloat_useEAX(info, t1reg, 0x8); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), t1reg); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_Q, 0))], xRegisterSSE(t1reg)); x86SetJ8(bjmp8); - if (t1boolean) SSE_MOVAPS_M128_to_XMM( t1reg, (uptr)&RSQRT_TEMP_XMM[0] ); // restore t1reg data + if (t1boolean) xMOVAPS(xRegisterSSE(t1reg), ptr[&RSQRT_TEMP_XMM[0] ]); // restore t1reg data else _freeXMMreg(t1reg); // free t1reg } //------------------------------------------------------------------ @@ -263,7 +263,7 @@ void _addISIMMtoIT(VURegs *VU, s16 imm, int info) if( _Is_ == 0 ) { itreg = ALLOCVI(_It_, MODE_WRITE); - MOV32ItoR(itreg, imm&0xffff); + xMOV(xRegister32(itreg), imm&0xffff); return; } @@ -272,14 +272,14 @@ void _addISIMMtoIT(VURegs *VU, s16 imm, int info) itreg = ALLOCVI(_It_, MODE_WRITE); if ( _It_ == _Is_ ) { - if (imm != 0 ) ADD16ItoR(itreg, imm); + if (imm != 0 ) xADD(xRegister16(itreg), imm); } else { if( imm ) { - LEA32RtoR(itreg, isreg, imm); - MOVZX32R16toR(itreg, itreg); + xLEA(xRegister32(itreg), ptr[xAddressReg(isreg)+imm]); + xMOVZX(xRegister32(itreg), xRegister16(itreg)); } - else MOV32RtoR(itreg, isreg); + else xMOV(xRegister32(itreg), xRegister32(isreg)); } } //------------------------------------------------------------------ @@ -326,7 +326,7 @@ void recVUMI_IADD( VURegs *VU, int info ) //Console.WriteLn("recVUMI_IADD"); if ( ( _It_ == 0 ) && ( _Is_ == 0 ) ) { idreg = ALLOCVI(_Id_, MODE_WRITE); - XOR32RtoR(idreg, idreg); + xXOR(xRegister32(idreg), xRegister32(idreg)); return; } @@ -337,26 +337,26 @@ void recVUMI_IADD( VURegs *VU, int info ) if ( _Is_ == 0 ) { if( (itreg = _checkX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _It_, MODE_READ)) >= 0 ) { - if( idreg != itreg ) MOV32RtoR(idreg, itreg); + if( idreg != itreg ) xMOV(xRegister32(idreg), xRegister32(itreg)); } - else MOVZX32M16toR(idreg, VU_VI_ADDR(_It_, 1)); + else xMOVZX(xRegister32(idreg), ptr16[(u16*)(VU_VI_ADDR(_It_, 1))]); } else if ( _It_ == 0 ) { if( (isreg = _checkX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _Is_, MODE_READ)) >= 0 ) { - if( idreg != isreg ) MOV32RtoR(idreg, isreg); + if( idreg != isreg ) xMOV(xRegister32(idreg), xRegister32(isreg)); } - else MOVZX32M16toR(idreg, VU_VI_ADDR(_Is_, 1)); + else xMOVZX(xRegister32(idreg), ptr16[(u16*)(VU_VI_ADDR(_Is_, 1))]); } else { //ADD_VI_NEEDED(_It_); isreg = ALLOCVI(_Is_, MODE_READ); itreg = ALLOCVI(_It_, MODE_READ); - if( idreg == isreg ) ADD32RtoR(idreg, itreg); - else if( idreg == itreg ) ADD32RtoR(idreg, isreg); - else LEA32RRtoR(idreg, isreg, itreg); - MOVZX32R16toR(idreg, idreg); // needed since don't know if idreg's upper bits are 0 + if( idreg == isreg ) xADD(xRegister32(idreg), xRegister32(itreg)); + else if( idreg == itreg ) xADD(xRegister32(idreg), xRegister32(isreg)); + else xLEA(xRegister32(idreg), ptr[xAddressReg(isreg) + xAddressReg(itreg)]); + xMOVZX(xRegister32(idreg), xRegister16(idreg)); // needed since don't know if idreg's upper bits are 0 } } //------------------------------------------------------------------ @@ -372,7 +372,7 @@ void recVUMI_IAND( VURegs *VU, int info ) //Console.WriteLn("recVUMI_IAND"); if ( ( _Is_ == 0 ) || ( _It_ == 0 ) ) { idreg = ALLOCVI(_Id_, MODE_WRITE); - XOR32RtoR(idreg, idreg); + xXOR(xRegister32(idreg), xRegister32(idreg)); return; } @@ -383,11 +383,11 @@ void recVUMI_IAND( VURegs *VU, int info ) isreg = ALLOCVI(_Is_, MODE_READ); itreg = ALLOCVI(_It_, MODE_READ); - if( idreg == isreg ) AND16RtoR(idreg, itreg); - else if( idreg == itreg ) AND16RtoR(idreg, isreg); + if( idreg == isreg ) xAND(xRegister16(idreg), xRegister16(itreg)); + else if( idreg == itreg ) xAND(xRegister16(idreg), xRegister16(isreg)); else { - MOV32RtoR(idreg, itreg); - AND32RtoR(idreg, isreg); + xMOV(xRegister32(idreg), xRegister32(itreg)); + xAND(xRegister32(idreg), xRegister32(isreg)); } } //------------------------------------------------------------------ @@ -403,7 +403,7 @@ void recVUMI_IOR( VURegs *VU, int info ) //Console.WriteLn("recVUMI_IOR"); if ( ( _It_ == 0 ) && ( _Is_ == 0 ) ) { idreg = ALLOCVI(_Id_, MODE_WRITE); - XOR32RtoR(idreg, idreg); + xXOR(xRegister32(idreg), xRegister32(idreg)); return; } @@ -414,27 +414,27 @@ void recVUMI_IOR( VURegs *VU, int info ) if ( _Is_ == 0 ) { if( (itreg = _checkX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _It_, MODE_READ)) >= 0 ) { - if( idreg != itreg ) MOV32RtoR(idreg, itreg); + if( idreg != itreg ) xMOV(xRegister32(idreg), xRegister32(itreg)); } - else MOVZX32M16toR(idreg, VU_VI_ADDR(_It_, 1)); + else xMOVZX(xRegister32(idreg), ptr16[(u16*)(VU_VI_ADDR(_It_, 1))]); } else if ( _It_ == 0 ) { if( (isreg = _checkX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _Is_, MODE_READ)) >= 0 ) { - if( idreg != isreg ) MOV32RtoR(idreg, isreg); + if( idreg != isreg ) xMOV(xRegister32(idreg), xRegister32(isreg)); } - else MOVZX32M16toR(idreg, VU_VI_ADDR(_Is_, 1)); + else xMOVZX(xRegister32(idreg), ptr16[(u16*)(VU_VI_ADDR(_Is_, 1))]); } else { isreg = ALLOCVI(_Is_, MODE_READ); itreg = ALLOCVI(_It_, MODE_READ); - if( idreg == isreg ) OR16RtoR(idreg, itreg); - else if( idreg == itreg ) OR16RtoR(idreg, isreg); + if( idreg == isreg ) xOR(xRegister16(idreg), xRegister16(itreg)); + else if( idreg == itreg ) xOR(xRegister16(idreg), xRegister16(isreg)); else { - MOV32RtoR(idreg, isreg); - OR32RtoR(idreg, itreg); + xMOV(xRegister32(idreg), xRegister32(isreg)); + xOR(xRegister32(idreg), xRegister32(itreg)); } } } @@ -451,7 +451,7 @@ void recVUMI_ISUB( VURegs *VU, int info ) //Console.WriteLn("recVUMI_ISUB"); if ( ( _It_ == 0 ) && ( _Is_ == 0 ) ) { idreg = ALLOCVI(_Id_, MODE_WRITE); - XOR32RtoR(idreg, idreg); + xXOR(xRegister32(idreg), xRegister32(idreg)); return; } @@ -462,31 +462,31 @@ void recVUMI_ISUB( VURegs *VU, int info ) if ( _Is_ == 0 ) { if( (itreg = _checkX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _It_, MODE_READ)) >= 0 ) { - if( idreg != itreg ) MOV32RtoR(idreg, itreg); + if( idreg != itreg ) xMOV(xRegister32(idreg), xRegister32(itreg)); } - else MOVZX32M16toR(idreg, VU_VI_ADDR(_It_, 1)); - NEG16R(idreg); + else xMOVZX(xRegister32(idreg), ptr16[(u16*)(VU_VI_ADDR(_It_, 1))]); + xNEG(xRegister16(idreg)); } else if ( _It_ == 0 ) { if( (isreg = _checkX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _Is_, MODE_READ)) >= 0 ) { - if( idreg != isreg ) MOV32RtoR(idreg, isreg); + if( idreg != isreg ) xMOV(xRegister32(idreg), xRegister32(isreg)); } - else MOVZX32M16toR(idreg, VU_VI_ADDR(_Is_, 1)); + else xMOVZX(xRegister32(idreg), ptr16[(u16*)(VU_VI_ADDR(_Is_, 1))]); } else { isreg = ALLOCVI(_Is_, MODE_READ); itreg = ALLOCVI(_It_, MODE_READ); - if( idreg == isreg ) SUB16RtoR(idreg, itreg); + if( idreg == isreg ) xSUB(xRegister16(idreg), xRegister16(itreg)); else if( idreg == itreg ) { - SUB16RtoR(idreg, isreg); - NEG16R(idreg); + xSUB(xRegister16(idreg), xRegister16(isreg)); + xNEG(xRegister16(idreg)); } else { - MOV32RtoR(idreg, isreg); - SUB16RtoR(idreg, itreg); + xMOV(xRegister32(idreg), xRegister32(isreg)); + xSUB(xRegister16(idreg), xRegister16(itreg)); } } } @@ -515,10 +515,10 @@ void recVUMI_MOVE( VURegs *VU, int info ) { if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; //Console.WriteLn("recVUMI_MOVE"); - if (_X_Y_Z_W == 0x8) SSE_MOVSS_XMM_to_XMM(EEREC_T, EEREC_S); - else if (_X_Y_Z_W == 0xf) SSE_MOVAPS_XMM_to_XMM(EEREC_T, EEREC_S); + if (_X_Y_Z_W == 0x8) xMOVSS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_S)); + else if (_X_Y_Z_W == 0xf) xMOVAPS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_S)); else { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } } @@ -538,22 +538,22 @@ void recVUMI_MFIR( VURegs *VU, int info ) xMOVDZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_VI_ADDR(_Is_, 1)-2)]); _vuFlipRegSS(VU, EEREC_T); - SSE2_PSRAD_I8_to_XMM(EEREC_TEMP, 16); - SSE_MOVSS_XMM_to_XMM(EEREC_T, EEREC_TEMP); + xPSRA.D(xRegisterSSE(EEREC_TEMP), 16); + xMOVSS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_TEMP)); _vuFlipRegSS(VU, EEREC_T); } else if (_X_Y_Z_W != 0xf) { xMOVDZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_VI_ADDR(_Is_, 1)-2)]); - SSE2_PSRAD_I8_to_XMM(EEREC_TEMP, 16); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0); + xPSRA.D(xRegisterSSE(EEREC_TEMP), 16); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } else { xMOVDZX(xRegisterSSE(EEREC_T), ptr[(void*)(VU_VI_ADDR(_Is_, 1)-2)]); - SSE2_PSRAD_I8_to_XMM(EEREC_T, 16); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0); + xPSRA.D(xRegisterSSE(EEREC_T), 16); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0); } } //------------------------------------------------------------------ @@ -569,14 +569,14 @@ void recVUMI_MTIR( VURegs *VU, int info ) _deleteX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _It_, 2); if( _Fsf_ == 0 ) { - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(_It_, 0), EEREC_S); + xMOVSS(ptr[(void*)(VU_VI_ADDR(_It_, 0))], xRegisterSSE(EEREC_S)); } else { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(_It_, 0), EEREC_TEMP); + xMOVSS(ptr[(void*)(VU_VI_ADDR(_It_, 0))], xRegisterSSE(EEREC_TEMP)); } - AND32ItoM(VU_VI_ADDR(_It_, 0), 0xffff); + xAND(ptr32[(u32*)(VU_VI_ADDR(_It_, 0))], 0xffff); } //------------------------------------------------------------------ @@ -589,13 +589,13 @@ void recVUMI_MR32( VURegs *VU, int info ) if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; //Console.WriteLn("recVUMI_MR32"); if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x39); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x39); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_T, EEREC_S); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0x39); + xMOVAPS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_S)); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0x39); } } //------------------------------------------------------------------ @@ -613,31 +613,31 @@ void _loadEAX(VURegs *VU, int x86reg, uptr offset, int info) if( x86reg >= 0 ) { switch(_X_Y_Z_W) { case 3: // ZW - SSE_MOVHPS_Rm_to_XMM(EEREC_T, x86reg, offset+8); + xMOVH.PS(xRegisterSSE(EEREC_T), ptr[xAddressReg(x86reg)+offset+8]); break; case 6: // YZ - SSE_SHUFPS_Rm_to_XMM(EEREC_T, x86reg, offset, 0x9c); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0x78); + xSHUF.PS(xRegisterSSE(EEREC_T), ptr[xAddressReg(x86reg)+offset], 0x9c); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0x78); break; case 8: // X - SSE_MOVSS_Rm_to_XMM(EEREC_TEMP, x86reg, offset); - SSE_MOVSS_XMM_to_XMM(EEREC_T, EEREC_TEMP); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[xAddressReg(x86reg)+offset]); + xMOVSS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_TEMP)); break; case 9: // XW - SSE_SHUFPS_Rm_to_XMM(EEREC_T, x86reg, offset, 0xc9); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0xd2); + xSHUF.PS(xRegisterSSE(EEREC_T), ptr[xAddressReg(x86reg)+offset], 0xc9); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0xd2); break; case 12: // XY - SSE_MOVLPS_Rm_to_XMM(EEREC_T, x86reg, offset); + xMOVL.PS(xRegisterSSE(EEREC_T), ptr[xAddressReg(x86reg)+offset]); break; case 15: - if( VU == &VU1 ) SSE_MOVAPSRmtoR(EEREC_T, x86reg, offset); - else SSE_MOVUPSRmtoR(EEREC_T, x86reg, offset); + if( VU == &VU1 ) xMOVAPS(xRegisterSSE(EEREC_T), ptr[xAddressReg(x86reg)+offset]); + else xMOVUPS(xRegisterSSE(EEREC_T), ptr[xAddressReg(x86reg)+offset]); break; default: - if( VU == &VU1 ) SSE_MOVAPSRmtoR(EEREC_TEMP, x86reg, offset); - else SSE_MOVUPSRmtoR(EEREC_TEMP, x86reg, offset); + if( VU == &VU1 ) xMOVAPS(xRegisterSSE(EEREC_TEMP), ptr[xAddressReg(x86reg)+offset]); + else xMOVUPS(xRegisterSSE(EEREC_TEMP), ptr[xAddressReg(x86reg)+offset]); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); break; @@ -646,30 +646,30 @@ void _loadEAX(VURegs *VU, int x86reg, uptr offset, int info) else { switch(_X_Y_Z_W) { case 3: // ZW - SSE_MOVHPS_M64_to_XMM(EEREC_T, offset+8); + xMOVH.PS(xRegisterSSE(EEREC_T), ptr[(void*)(offset+8)]); break; case 6: // YZ - SSE_SHUFPS_M128_to_XMM(EEREC_T, offset, 0x9c); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0x78); + xSHUF.PS(xRegisterSSE(EEREC_T), ptr[(void*)(offset)], 0x9c); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0x78); break; case 8: // X - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, offset); - SSE_MOVSS_XMM_to_XMM(EEREC_T, EEREC_TEMP); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(offset)]); + xMOVSS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_TEMP)); break; case 9: // XW - SSE_SHUFPS_M128_to_XMM(EEREC_T, offset, 0xc9); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0xd2); + xSHUF.PS(xRegisterSSE(EEREC_T), ptr[(void*)(offset)], 0xc9); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0xd2); break; case 12: // XY - SSE_MOVLPS_M64_to_XMM(EEREC_T, offset); + xMOVL.PS(xRegisterSSE(EEREC_T), ptr[(void*)(offset)]); break; case 15: - if( VU == &VU1 ) SSE_MOVAPS_M128_to_XMM(EEREC_T, offset); - else SSE_MOVUPS_M128_to_XMM(EEREC_T, offset); + if( VU == &VU1 ) xMOVAPS(xRegisterSSE(EEREC_T), ptr[(void*)(offset)]); + else xMOVUPS(xRegisterSSE(EEREC_T), ptr[(void*)(offset)]); break; default: - if( VU == &VU1 ) SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, offset); - else SSE_MOVUPS_M128_to_XMM(EEREC_TEMP, offset); + if( VU == &VU1 ) xMOVAPS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(offset)]); + else xMOVUPS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(offset)]); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); break; } @@ -684,16 +684,16 @@ void _loadEAX(VURegs *VU, int x86reg, uptr offset, int info) int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm) { if( x86reg == EAX ) { - if (imm) ADD32ItoR(x86reg, imm); + if (imm) xADD(xRegister32(x86reg), imm); } else { - if( imm ) LEA32RtoR(EAX, x86reg, imm); - else MOV32RtoR(EAX, x86reg); + if( imm ) xLEA(eax, ptr[xAddressReg(x86reg)+imm]); + else xMOV(eax, xRegister32(x86reg)); } if( VU == &VU1 ) { - AND32ItoR(EAX, 0x3ff); // wrap around - SHL32ItoR(EAX, 4); + xAND(eax, 0x3ff); // wrap around + xSHL(eax, 4); } else { @@ -710,7 +710,7 @@ int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm) xADD(eax, (u128*)VU1.VF - (u128*)VU0.Mem); done.SetTarget(); - SHL32ItoR(EAX, 4); // multiply by 16 (shift left by 4) + xSHL(eax, 4); // multiply by 16 (shift left by 4) } return EAX; @@ -747,7 +747,7 @@ void recVUMI_LQD( VURegs *VU, int info ) //Console.WriteLn("recVUMI_LQD"); if ( _Is_ != 0 ) { isreg = ALLOCVI(_Is_, MODE_READ|MODE_WRITE); - SUB16ItoR( isreg, 1 ); + xSUB(xRegister16(isreg), 1 ); } if ( _Ft_ == 0 ) return; @@ -768,10 +768,10 @@ void recVUMI_LQI(VURegs *VU, int info) if ( _Ft_ == 0 ) { if( _Is_ != 0 ) { if( (isreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Is_, MODE_WRITE|MODE_READ)) >= 0 ) { - ADD16ItoR(isreg, 1); + xADD(xRegister16(isreg), 1); } else { - ADD16ItoM( VU_VI_ADDR( _Is_, 0 ), 1 ); + xADD(ptr16[(u16*)(VU_VI_ADDR( _Is_, 0 ))], 1 ); } } return; @@ -783,7 +783,7 @@ void recVUMI_LQI(VURegs *VU, int info) else { isreg = ALLOCVI(_Is_, MODE_READ|MODE_WRITE); _loadEAX(VU, recVUTransformAddr(isreg, VU, _Is_, 0), (uptr)VU->Mem, info); - ADD16ItoR( isreg, 1 ); + xADD(xRegister16(isreg), 1 ); } } //------------------------------------------------------------------ @@ -799,8 +799,8 @@ void _saveEAX(VURegs *VU, int x86reg, uptr offset, int info) if ( _Fs_ == 0 ) { if ( _XYZW_SS ) { u32 c = _W ? 0x3f800000 : 0; - if ( x86reg >= 0 ) MOV32ItoRm(x86reg, c, offset+(_W?12:(_Z?8:(_Y?4:0)))); - else MOV32ItoM(offset+(_W?12:(_Z?8:(_Y?4:0))), c); + if ( x86reg >= 0 ) xMOV(ptr32[xAddressReg(x86reg)+offset+(_W?12:(_Z?8:(_Y?4:0)))], c); + else xMOV(ptr32[(u32*)(offset+(_W?12:(_Z?8:(_Y?4:0))))], c); } else { @@ -819,124 +819,124 @@ void _saveEAX(VURegs *VU, int x86reg, uptr offset, int info) switch ( _X_Y_Z_W ) { case 1: // W - SSE2_PSHUFD_XMM_to_XMM(EEREC_TEMP, EEREC_S, 0x27); - if ( x86reg >= 0 ) SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+12); - else SSE_MOVSS_XMM_to_M32(offset+12, EEREC_TEMP); + xPSHUF.D(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S), 0x27); + if ( x86reg >= 0 ) xMOVSS(ptr[xAddressReg(x86reg)+offset+12], xRegisterSSE(EEREC_TEMP)); + else xMOVSS(ptr[(void*)(offset+12)], xRegisterSSE(EEREC_TEMP)); break; case 2: // Z - SSE_MOVHLPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - if ( x86reg >= 0 ) SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+8); - else SSE_MOVSS_XMM_to_M32(offset+8, EEREC_TEMP); + xMOVHL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + if ( x86reg >= 0 ) xMOVSS(ptr[xAddressReg(x86reg)+offset+8], xRegisterSSE(EEREC_TEMP)); + else xMOVSS(ptr[(void*)(offset+8)], xRegisterSSE(EEREC_TEMP)); break; case 3: // ZW - if ( x86reg >= 0 ) SSE_MOVHPS_XMM_to_Rm(x86reg, EEREC_S, offset+8); - else SSE_MOVHPS_XMM_to_M64(offset+8, EEREC_S); + if ( x86reg >= 0 ) xMOVH.PS(ptr[xAddressReg(x86reg)+offset+8], xRegisterSSE(EEREC_S)); + else xMOVH.PS(ptr[(void*)(offset+8)], xRegisterSSE(EEREC_S)); break; case 4: // Y - SSE2_PSHUFLW_XMM_to_XMM(EEREC_TEMP, EEREC_S, 0x4e); - if ( x86reg >= 0 ) SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+4); - else SSE_MOVSS_XMM_to_M32(offset+4, EEREC_TEMP); + xPSHUF.LW(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S), 0x4e); + if ( x86reg >= 0 ) xMOVSS(ptr[xAddressReg(x86reg)+offset+4], xRegisterSSE(EEREC_TEMP)); + else xMOVSS(ptr[(void*)(offset+4)], xRegisterSSE(EEREC_TEMP)); break; case 5: // YW - SSE_SHUFPS_XMM_to_XMM(EEREC_S, EEREC_S, 0xB1); - SSE_MOVHLPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xSHUF.PS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0xB1); + xMOVHL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if ( x86reg >= 0 ) { - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_S, offset+4); - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+12); + xMOVSS(ptr[xAddressReg(x86reg)+offset+4], xRegisterSSE(EEREC_S)); + xMOVSS(ptr[xAddressReg(x86reg)+offset+12], xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVSS_XMM_to_M32(offset+4, EEREC_S); - SSE_MOVSS_XMM_to_M32(offset+12, EEREC_TEMP); + xMOVSS(ptr[(void*)(offset+4)], xRegisterSSE(EEREC_S)); + xMOVSS(ptr[(void*)(offset+12)], xRegisterSSE(EEREC_TEMP)); } - SSE_SHUFPS_XMM_to_XMM(EEREC_S, EEREC_S, 0xB1); + xSHUF.PS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0xB1); break; case 6: // YZ - SSE2_PSHUFD_XMM_to_XMM(EEREC_TEMP, EEREC_S, 0xc9); - if ( x86reg >= 0 ) SSE_MOVLPS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+4); - else SSE_MOVLPS_XMM_to_M64(offset+4, EEREC_TEMP); + xPSHUF.D(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S), 0xc9); + if ( x86reg >= 0 ) xMOVL.PS(ptr[xAddressReg(x86reg)+offset+4], xRegisterSSE(EEREC_TEMP)); + else xMOVL.PS(ptr[(void*)(offset+4)], xRegisterSSE(EEREC_TEMP)); break; case 7: // YZW - SSE2_PSHUFD_XMM_to_XMM(EEREC_TEMP, EEREC_S, 0x93); //ZYXW + xPSHUF.D(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S), 0x93); //ZYXW if ( x86reg >= 0 ) { - SSE_MOVHPS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+4); - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+12); + xMOVH.PS(ptr[xAddressReg(x86reg)+offset+4], xRegisterSSE(EEREC_TEMP)); + xMOVSS(ptr[xAddressReg(x86reg)+offset+12], xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVHPS_XMM_to_M64(offset+4, EEREC_TEMP); - SSE_MOVSS_XMM_to_M32(offset+12, EEREC_TEMP); + xMOVH.PS(ptr[(void*)(offset+4)], xRegisterSSE(EEREC_TEMP)); + xMOVSS(ptr[(void*)(offset+12)], xRegisterSSE(EEREC_TEMP)); } break; case 8: // X - if ( x86reg >= 0 ) SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_S, offset); - else SSE_MOVSS_XMM_to_M32(offset, EEREC_S); + if ( x86reg >= 0 ) xMOVSS(ptr[xAddressReg(x86reg)+offset], xRegisterSSE(EEREC_S)); + else xMOVSS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); break; case 9: // XW - if ( x86reg >= 0 ) SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_S, offset); - else SSE_MOVSS_XMM_to_M32(offset, EEREC_S); + if ( x86reg >= 0 ) xMOVSS(ptr[xAddressReg(x86reg)+offset], xRegisterSSE(EEREC_S)); + else xMOVSS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); - SSE2_PSHUFD_XMM_to_XMM(EEREC_TEMP, EEREC_S, 0xff); //WWWW + xPSHUF.D(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S), 0xff); //WWWW - if ( x86reg >= 0 ) SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+12); - else SSE_MOVSS_XMM_to_M32(offset+12, EEREC_TEMP); + if ( x86reg >= 0 ) xMOVSS(ptr[xAddressReg(x86reg)+offset+12], xRegisterSSE(EEREC_TEMP)); + else xMOVSS(ptr[(void*)(offset+12)], xRegisterSSE(EEREC_TEMP)); break; case 10: //XZ - SSE_MOVHLPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVHL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if ( x86reg >= 0 ) { - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_S, offset); - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+8); + xMOVSS(ptr[xAddressReg(x86reg)+offset], xRegisterSSE(EEREC_S)); + xMOVSS(ptr[xAddressReg(x86reg)+offset+8], xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVSS_XMM_to_M32(offset, EEREC_S); - SSE_MOVSS_XMM_to_M32(offset+8, EEREC_TEMP); + xMOVSS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); + xMOVSS(ptr[(void*)(offset+8)], xRegisterSSE(EEREC_TEMP)); } break; case 11: //XZW if ( x86reg >= 0 ) { - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_S, offset); - SSE_MOVHPS_XMM_to_Rm(x86reg, EEREC_S, offset+8); + xMOVSS(ptr[xAddressReg(x86reg)+offset], xRegisterSSE(EEREC_S)); + xMOVH.PS(ptr[xAddressReg(x86reg)+offset+8], xRegisterSSE(EEREC_S)); } else { - SSE_MOVSS_XMM_to_M32(offset, EEREC_S); - SSE_MOVHPS_XMM_to_M64(offset+8, EEREC_S); + xMOVSS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); + xMOVH.PS(ptr[(void*)(offset+8)], xRegisterSSE(EEREC_S)); } break; case 12: // XY - if ( x86reg >= 0 ) SSE_MOVLPS_XMM_to_Rm(x86reg, EEREC_S, offset+0); - else SSE_MOVLPS_XMM_to_M64(offset, EEREC_S); + if ( x86reg >= 0 ) xMOVL.PS(ptr[xAddressReg(x86reg)+offset+0], xRegisterSSE(EEREC_S)); + else xMOVL.PS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); break; case 13: // XYW - SSE2_PSHUFD_XMM_to_XMM(EEREC_TEMP, EEREC_S, 0x4b); //YXZW + xPSHUF.D(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S), 0x4b); //YXZW if ( x86reg >= 0 ) { - SSE_MOVHPS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+0); - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+12); + xMOVH.PS(ptr[xAddressReg(x86reg)+offset+0], xRegisterSSE(EEREC_TEMP)); + xMOVSS(ptr[xAddressReg(x86reg)+offset+12], xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVHPS_XMM_to_M64(offset, EEREC_TEMP); - SSE_MOVSS_XMM_to_M32(offset+12, EEREC_TEMP); + xMOVH.PS(ptr[(void*)(offset)], xRegisterSSE(EEREC_TEMP)); + xMOVSS(ptr[(void*)(offset+12)], xRegisterSSE(EEREC_TEMP)); } break; case 14: // XYZ - SSE_MOVHLPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVHL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if ( x86reg >= 0 ) { - SSE_MOVLPS_XMM_to_Rm(x86reg, EEREC_S, offset+0); - SSE_MOVSS_XMM_to_Rm(x86reg, EEREC_TEMP, offset+8); + xMOVL.PS(ptr[xAddressReg(x86reg)+offset+0], xRegisterSSE(EEREC_S)); + xMOVSS(ptr[xAddressReg(x86reg)+offset+8], xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVLPS_XMM_to_M64(offset, EEREC_S); - SSE_MOVSS_XMM_to_M32(offset+8, EEREC_TEMP); + xMOVL.PS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); + xMOVSS(ptr[(void*)(offset+8)], xRegisterSSE(EEREC_TEMP)); } break; case 15: // XYZW if ( VU == &VU1 ) { - if( x86reg >= 0 ) SSE_MOVAPSRtoRm(x86reg, EEREC_S, offset+0); - else SSE_MOVAPS_XMM_to_M128(offset, EEREC_S); + if( x86reg >= 0 ) xMOVAPS(ptr[xAddressReg(x86reg)+offset+0], xRegisterSSE(EEREC_S)); + else xMOVAPS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); } else { - if( x86reg >= 0 ) SSE_MOVUPSRtoRm(x86reg, EEREC_S, offset+0); + if( x86reg >= 0 ) xMOVUPS(ptr[xAddressReg(x86reg)+offset+0], xRegisterSSE(EEREC_S)); else { - if( offset & 15 ) SSE_MOVUPS_XMM_to_M128(offset, EEREC_S); - else SSE_MOVAPS_XMM_to_M128(offset, EEREC_S); + if( offset & 15 ) xMOVUPS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); + else xMOVAPS(ptr[(void*)(offset)], xRegisterSSE(EEREC_S)); } } break; @@ -971,7 +971,7 @@ void recVUMI_SQD(VURegs *VU, int info) if (_It_ == 0) _saveEAX(VU, -1, (uptr)VU->Mem, info); else { int itreg = ALLOCVI(_It_, MODE_READ|MODE_WRITE); - SUB16ItoR( itreg, 1 ); + xSUB(xRegister16(itreg), 1 ); _saveEAX(VU, recVUTransformAddr(itreg, VU, _It_, 0), (uptr)VU->Mem, info); } } @@ -988,7 +988,7 @@ void recVUMI_SQI(VURegs *VU, int info) else { int itreg = ALLOCVI(_It_, MODE_READ|MODE_WRITE); _saveEAX(VU, recVUTransformAddr(itreg, VU, _It_, 0), (uptr)VU->Mem, info); - ADD16ItoR( itreg, 1 ); + xADD(xRegister16(itreg), 1 ); } } //------------------------------------------------------------------ @@ -1018,7 +1018,7 @@ void recVUMI_ILW(VURegs *VU, int info) } else { int isreg = ALLOCVI(_Is_, MODE_READ); - MOV32RmtoR(itreg, recVUTransformAddr(isreg, VU, _Is_, imm), (uptr)VU->Mem + off); + xMOV(xRegister32(itreg), ptr[xAddressReg(recVUTransformAddr(isreg, VU, _Is_, imm))+(uptr)VU->Mem + off]); } } //------------------------------------------------------------------ @@ -1037,10 +1037,10 @@ void recVUMI_ISW( VURegs *VU, int info ) uptr off = (uptr)GET_VU_MEM(VU, (int)imm * 16); int itreg = ALLOCVI(_It_, MODE_READ); - if (_X) MOV32RtoM(off, itreg); - if (_Y) MOV32RtoM(off+4, itreg); - if (_Z) MOV32RtoM(off+8, itreg); - if (_W) MOV32RtoM(off+12, itreg); + if (_X) xMOV(ptr[(void*)(off)], xRegister32(itreg)); + if (_Y) xMOV(ptr[(void*)(off+4)], xRegister32(itreg)); + if (_Z) xMOV(ptr[(void*)(off+8)], xRegister32(itreg)); + if (_W) xMOV(ptr[(void*)(off+12)], xRegister32(itreg)); } else { int x86reg, isreg, itreg; @@ -1051,10 +1051,10 @@ void recVUMI_ISW( VURegs *VU, int info ) x86reg = recVUTransformAddr(isreg, VU, _Is_, imm); - if (_X) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem); - if (_Y) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem+4); - if (_Z) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem+8); - if (_W) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem+12); + if (_X) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem], xRegister32(itreg)); + if (_Y) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem+4], xRegister32(itreg)); + if (_Z) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem+8], xRegister32(itreg)); + if (_W) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem+12], xRegister32(itreg)); } } //------------------------------------------------------------------ @@ -1078,7 +1078,7 @@ void recVUMI_ILWR( VURegs *VU, int info ) itreg = ALLOCVI(_It_, MODE_WRITE); if ( _Is_ == 0 ) { - MOVZX32M16toR( itreg, (uptr)VU->Mem + off ); + xMOVZX(xRegister32(itreg), ptr16[(u16*)((uptr)VU->Mem + off )]); } else { int isreg = ALLOCVI(_Is_, MODE_READ); @@ -1099,20 +1099,20 @@ void recVUMI_ISWR( VURegs *VU, int info ) itreg = ALLOCVI(_It_, MODE_READ); if (_Is_ == 0) { - if (_X) MOV32RtoM((uptr)VU->Mem, itreg); - if (_Y) MOV32RtoM((uptr)VU->Mem+4, itreg); - if (_Z) MOV32RtoM((uptr)VU->Mem+8, itreg); - if (_W) MOV32RtoM((uptr)VU->Mem+12, itreg); + if (_X) xMOV(ptr[(VU->Mem)], xRegister32(itreg)); + if (_Y) xMOV(ptr[(void*)((uptr)VU->Mem+4)], xRegister32(itreg)); + if (_Z) xMOV(ptr[(void*)((uptr)VU->Mem+8)], xRegister32(itreg)); + if (_W) xMOV(ptr[(void*)((uptr)VU->Mem+12)], xRegister32(itreg)); } else { int x86reg; int isreg = ALLOCVI(_Is_, MODE_READ); x86reg = recVUTransformAddr(isreg, VU, _Is_, 0); - if (_X) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem); - if (_Y) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem+4); - if (_Z) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem+8); - if (_W) MOV32RtoRm(x86reg, itreg, (uptr)VU->Mem+12); + if (_X) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem], xRegister32(itreg)); + if (_Y) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem+4], xRegister32(itreg)); + if (_Z) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem+8], xRegister32(itreg)); + if (_W) xMOV(ptr[xAddressReg(x86reg)+(uptr)VU->Mem+12], xRegister32(itreg)); } } //------------------------------------------------------------------ @@ -1128,21 +1128,21 @@ void recVUMI_RINIT(VURegs *VU, int info) _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 2); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)s_mask); - SSE_ORPS_M128_to_XMM(EEREC_TEMP, (uptr)VU_ONE); - SSE_MOVSS_XMM_to_M32(VU_REGR_ADDR, EEREC_TEMP); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[s_mask]); + xOR.PS(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); + xMOVSS(ptr[(void*)(VU_REGR_ADDR)], xRegisterSSE(EEREC_TEMP)); } else { int rreg = ALLOCVI(REG_R, MODE_WRITE); if( xmmregs[EEREC_S].mode & MODE_WRITE ) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[_Fs_], EEREC_S); + xMOVAPS(ptr[(&VU->VF[_Fs_])], xRegisterSSE(EEREC_S)); xmmregs[EEREC_S].mode &= ~MODE_WRITE; } - MOV32MtoR( rreg, VU_VFx_ADDR( _Fs_ ) + 4 * _Fsf_ ); - AND32ItoR( rreg, 0x7fffff ); - OR32ItoR( rreg, 0x7f << 23 ); + xMOV(xRegister32(rreg), ptr[(void*)(VU_VFx_ADDR( _Fs_ ) + 4 * _Fsf_ )]); + xAND(xRegister32(rreg), 0x7fffff ); + xOR(xRegister32(rreg), 0x7f << 23 ); _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 1); } @@ -1161,13 +1161,13 @@ void recVUMI_RGET(VURegs *VU, int info) _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 1); if (_X_Y_Z_W != 0xf) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, VU_REGR_ADDR); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_REGR_ADDR)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } else { - SSE_MOVSS_M32_to_XMM(EEREC_T, VU_REGR_ADDR); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0); + xMOVSSZX(xRegisterSSE(EEREC_T), ptr[(void*)(VU_REGR_ADDR)]); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0); } } //------------------------------------------------------------------ @@ -1187,20 +1187,20 @@ void recVUMI_RNEXT( VURegs *VU, int info ) x86temp1 = ALLOCTEMPX86(0); // code from www.project-fao.org - //MOV32MtoR(rreg, VU_REGR_ADDR); - MOV32RtoR(x86temp0, rreg); - SHR32ItoR(x86temp0, 4); - AND32ItoR(x86temp0, 1); + //xMOV(xRegister32(rreg), ptr[(void*)(VU_REGR_ADDR)]); + xMOV(xRegister32(x86temp0), xRegister32(rreg)); + xSHR(xRegister32(x86temp0), 4); + xAND(xRegister32(x86temp0), 1); - MOV32RtoR(x86temp1, rreg); - SHR32ItoR(x86temp1, 22); - AND32ItoR(x86temp1, 1); + xMOV(xRegister32(x86temp1), xRegister32(rreg)); + xSHR(xRegister32(x86temp1), 22); + xAND(xRegister32(x86temp1), 1); - SHL32ItoR(rreg, 1); - XOR32RtoR(x86temp0, x86temp1); - XOR32RtoR(rreg, x86temp0); - AND32ItoR(rreg, 0x7fffff); - OR32ItoR(rreg, 0x3f800000); + xSHL(xRegister32(rreg), 1); + xXOR(xRegister32(x86temp0), xRegister32(x86temp1)); + xXOR(xRegister32(rreg), xRegister32(x86temp0)); + xAND(xRegister32(rreg), 0x7fffff); + xOR(xRegister32(rreg), 0x3f800000); _freeX86reg(x86temp0); _freeX86reg(x86temp1); @@ -1225,22 +1225,22 @@ void recVUMI_RXOR( VURegs *VU, int info ) _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 1); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); - SSE_XORPS_M128_to_XMM(EEREC_TEMP, VU_REGR_ADDR); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)s_mask); - SSE_ORPS_M128_to_XMM(EEREC_TEMP, (uptr)s_fones); - SSE_MOVSS_XMM_to_M32(VU_REGR_ADDR, EEREC_TEMP); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_REGR_ADDR)]); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[s_mask]); + xOR.PS(xRegisterSSE(EEREC_TEMP), ptr[s_fones]); + xMOVSS(ptr[(void*)(VU_REGR_ADDR)], xRegisterSSE(EEREC_TEMP)); } else { int rreg = ALLOCVI(REG_R, MODE_WRITE|MODE_READ); if( xmmregs[EEREC_S].mode & MODE_WRITE ) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[_Fs_], EEREC_S); + xMOVAPS(ptr[(&VU->VF[_Fs_])], xRegisterSSE(EEREC_S)); xmmregs[EEREC_S].mode &= ~MODE_WRITE; } - XOR32MtoR( rreg, VU_VFx_ADDR( _Fs_ ) + 4 * _Fsf_ ); - AND32ItoR( rreg, 0x7fffff ); - OR32ItoR ( rreg, 0x3f800000 ); + xXOR(xRegister32(rreg), ptr[(void*)(VU_VFx_ADDR( _Fs_ ) + 4 * _Fsf_ )]); + xAND(xRegister32(rreg), 0x7fffff ); + xOR(xRegister32(rreg), 0x3f800000 ); _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 1); } @@ -1255,7 +1255,7 @@ void recVUMI_WAITQ( VURegs *VU, int info ) { //Console.WriteLn("recVUMI_WAITQ"); // if( info & PROCESS_VU_SUPER ) { -// //CALLFunc(waitqfn); +// //xCALL((void*)waitqfn); // SuperVUFlush(0, 1); // } } @@ -1274,8 +1274,8 @@ void recVUMI_FSAND( VURegs *VU, int info ) if(_It_ == 0) return; itreg = ALLOCVI(_It_, MODE_WRITE); - MOV32MtoR( itreg, VU_VI_ADDR(REG_STATUS_FLAG, 1) ); - AND32ItoR( itreg, imm ); + xMOV(xRegister32(itreg), ptr[(void*)(VU_VI_ADDR(REG_STATUS_FLAG, 1))]); + xAND(xRegister32(itreg), imm ); } //------------------------------------------------------------------ @@ -1293,10 +1293,10 @@ void recVUMI_FSEQ( VURegs *VU, int info ) itreg = ALLOCVI(_It_, MODE_WRITE|MODE_8BITREG); - MOVZX32M16toR( EAX, VU_VI_ADDR(REG_STATUS_FLAG, 1) ); - XOR32RtoR(itreg, itreg); - CMP16ItoR(EAX, imm); - SETE8R(itreg); + xMOVZX(eax, ptr16[(u16*)(VU_VI_ADDR(REG_STATUS_FLAG, 1))]); + xXOR(xRegister32(itreg), xRegister32(itreg)); + xCMP(ax, imm); + xSETE(xRegister8(itreg)); } //------------------------------------------------------------------ @@ -1314,8 +1314,8 @@ void recVUMI_FSOR( VURegs *VU, int info ) itreg = ALLOCVI(_It_, MODE_WRITE); - MOVZX32M16toR( itreg, VU_VI_ADDR(REG_STATUS_FLAG, 1) ); - OR32ItoR( itreg, imm ); + xMOVZX(xRegister32(itreg), ptr16[(u16*)(VU_VI_ADDR(REG_STATUS_FLAG, 1))]); + xOR(xRegister32(itreg), imm ); } //------------------------------------------------------------------ @@ -1334,13 +1334,13 @@ void recVUMI_FSSET(VURegs *VU, int info) // keep the low 6 bits ONLY if the upper instruction is an fmac instruction (otherwise rewrite) - metal gear solid 3 //if( (info & PROCESS_VU_SUPER) && VUREC_FMAC ) { - MOV32MtoR(EAX, prevaddr); - AND32ItoR(EAX, 0x3f); - if ((imm&0xfc0) != 0) OR32ItoR(EAX, imm & 0xFC0); - MOV32RtoM(writeaddr ? writeaddr : prevaddr, EAX); + xMOV(eax, ptr[(void*)(prevaddr)]); + xAND(eax, 0x3f); + if ((imm&0xfc0) != 0) xOR(eax, imm & 0xFC0); + xMOV(ptr[(void*)(writeaddr ? writeaddr : prevaddr)], eax); //} //else { - // MOV32ItoM(writeaddr ? writeaddr : prevaddr, imm&0xfc0); + // xMOV(ptr32[(u32*)(writeaddr ? writeaddr : prevaddr)], imm&0xfc0); //} } //------------------------------------------------------------------ @@ -1358,11 +1358,11 @@ void recVUMI_FMAND( VURegs *VU, int info ) itreg = ALLOCVI(_It_, MODE_WRITE);//|MODE_8BITREG); if( isreg >= 0 ) { - if( itreg != isreg ) MOV32RtoR(itreg, isreg); + if( itreg != isreg ) xMOV(xRegister32(itreg), xRegister32(isreg)); } - else MOVZX32M16toR(itreg, VU_VI_ADDR(_Is_, 1)); + else xMOVZX(xRegister32(itreg), ptr16[(u16*)(VU_VI_ADDR(_Is_, 1))]); - AND16MtoR( itreg, VU_VI_ADDR(REG_MAC_FLAG, 1)); + xAND(xRegister16(itreg), ptr[(void*)(VU_VI_ADDR(REG_MAC_FLAG, 1))]); } //------------------------------------------------------------------ @@ -1378,19 +1378,19 @@ void recVUMI_FMEQ( VURegs *VU, int info ) if( _It_ == _Is_ ) { itreg = ALLOCVI(_It_, MODE_WRITE|MODE_READ);//|MODE_8BITREG - CMP16MtoR(itreg, VU_VI_ADDR(REG_MAC_FLAG, 1)); - SETE8R(EAX); - MOVZX32R8toR(itreg, EAX); + xCMP(xRegister16(itreg), ptr[(void*)(VU_VI_ADDR(REG_MAC_FLAG, 1))]); + xSETE(al); + xMOVZX(xRegister32(itreg), al); } else { ADD_VI_NEEDED(_Is_); itreg = ALLOCVI(_It_, MODE_WRITE|MODE_8BITREG); isreg = ALLOCVI(_Is_, MODE_READ); - XOR32RtoR(itreg, itreg); + xXOR(xRegister32(itreg), xRegister32(itreg)); - CMP16MtoR(isreg, VU_VI_ADDR(REG_MAC_FLAG, 1)); - SETE8R(itreg); + xCMP(xRegister16(isreg), ptr[(void*)(VU_VI_ADDR(REG_MAC_FLAG, 1))]); + xSETE(xRegister8(itreg)); } } //------------------------------------------------------------------ @@ -1406,22 +1406,22 @@ void recVUMI_FMOR( VURegs *VU, int info ) //Console.WriteLn("recVUMI_FMOR"); if( _Is_ == 0 ) { itreg = ALLOCVI(_It_, MODE_WRITE);//|MODE_8BITREG); - MOVZX32M16toR( itreg, VU_VI_ADDR(REG_MAC_FLAG, 1) ); + xMOVZX(xRegister32(itreg), ptr16[(u16*)(VU_VI_ADDR(REG_MAC_FLAG, 1))]); } else if( _It_ == _Is_ ) { itreg = ALLOCVI(_It_, MODE_WRITE|MODE_READ);//|MODE_8BITREG); - OR16MtoR( itreg, VU_VI_ADDR(REG_MAC_FLAG, 1) ); + xOR(xRegister16(itreg), ptr[(void*)(VU_VI_ADDR(REG_MAC_FLAG, 1))]); } else { isreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Is_, MODE_READ); itreg = ALLOCVI(_It_, MODE_WRITE); - MOVZX32M16toR( itreg, VU_VI_ADDR(REG_MAC_FLAG, 1) ); + xMOVZX(xRegister32(itreg), ptr16[(u16*)(VU_VI_ADDR(REG_MAC_FLAG, 1))]); if( isreg >= 0 ) - OR16RtoR( itreg, isreg ); + xOR(xRegister16(itreg), xRegister16(isreg )); else - OR16MtoR( itreg, VU_VI_ADDR(_Is_, 1) ); + xOR(xRegister16(itreg), ptr[(void*)(VU_VI_ADDR(_Is_, 1))]); } } //------------------------------------------------------------------ @@ -1434,11 +1434,11 @@ void recVUMI_FCAND( VURegs *VU, int info ) { int itreg = ALLOCVI(1, MODE_WRITE|MODE_8BITREG); //Console.WriteLn("recVUMI_FCAND"); - MOV32MtoR( EAX, VU_VI_ADDR(REG_CLIP_FLAG, 1) ); - XOR32RtoR( itreg, itreg ); - AND32ItoR( EAX, VU->code & 0xFFFFFF ); + xMOV(eax, ptr[(void*)(VU_VI_ADDR(REG_CLIP_FLAG, 1))]); + xXOR(xRegister32(itreg), xRegister32(itreg )); + xAND(eax, VU->code & 0xFFFFFF ); - SETNZ8R(itreg); + xSETNZ(xRegister8(itreg)); } //------------------------------------------------------------------ @@ -1450,12 +1450,12 @@ void recVUMI_FCEQ( VURegs *VU, int info ) { int itreg = ALLOCVI(1, MODE_WRITE|MODE_8BITREG); //Console.WriteLn("recVUMI_FCEQ"); - MOV32MtoR( EAX, VU_VI_ADDR(REG_CLIP_FLAG, 1) ); - AND32ItoR( EAX, 0xffffff ); - XOR32RtoR( itreg, itreg ); - CMP32ItoR( EAX, VU->code&0xffffff ); + xMOV(eax, ptr[(void*)(VU_VI_ADDR(REG_CLIP_FLAG, 1))]); + xAND(eax, 0xffffff ); + xXOR(xRegister32(itreg), xRegister32(itreg )); + xCMP(eax, VU->code&0xffffff ); - SETE8R(itreg); + xSETE(xRegister8(itreg)); } //------------------------------------------------------------------ @@ -1468,11 +1468,11 @@ void recVUMI_FCOR( VURegs *VU, int info ) int itreg; //Console.WriteLn("recVUMI_FCOR"); itreg = ALLOCVI(1, MODE_WRITE); - MOV32MtoR( itreg, VU_VI_ADDR(REG_CLIP_FLAG, 1) ); - OR32ItoR ( itreg, VU->code ); - AND32ItoR( itreg, 0xffffff ); - ADD32ItoR( itreg, 1 ); // If 24 1's will make 25th bit 1, else 0 - SHR32ItoR( itreg, 24 ); // Get the 25th bit (also clears the rest of the garbage in the reg) + xMOV(xRegister32(itreg), ptr[(void*)(VU_VI_ADDR(REG_CLIP_FLAG, 1))]); + xOR(xRegister32(itreg), VU->code ); + xAND(xRegister32(itreg), 0xffffff ); + xADD(xRegister32(itreg), 1 ); // If 24 1's will make 25th bit 1, else 0 + xSHR(xRegister32(itreg), 24 ); // Get the 25th bit (also clears the rest of the garbage in the reg) } //------------------------------------------------------------------ @@ -1487,7 +1487,7 @@ void recVUMI_FCSET( VURegs *VU, int info ) xMOV(ptr32[(u32*)(addr ? addr : VU_VI_ADDR(REG_CLIP_FLAG, 2))], VU->code&0xffffff); if( !(info & (PROCESS_VU_SUPER|PROCESS_VU_COP2)) ) - MOV32ItoM( VU_VI_ADDR(REG_CLIP_FLAG, 1), VU->code&0xffffff ); + xMOV(ptr32[(u32*)(VU_VI_ADDR(REG_CLIP_FLAG, 1))], VU->code&0xffffff ); } //------------------------------------------------------------------ @@ -1502,8 +1502,8 @@ void recVUMI_FCGET( VURegs *VU, int info ) //Console.WriteLn("recVUMI_FCGET"); itreg = ALLOCVI(_It_, MODE_WRITE); - MOV32MtoR(itreg, VU_VI_ADDR(REG_CLIP_FLAG, 1)); - AND32ItoR(itreg, 0x0fff); + xMOV(xRegister32(itreg), ptr[(void*)(VU_VI_ADDR(REG_CLIP_FLAG, 1))]); + xAND(xRegister32(itreg), 0x0fff); } //------------------------------------------------------------------ @@ -1524,18 +1524,18 @@ void recVUMI_MFP(VURegs *VU, int info) //Console.WriteLn("recVUMI_MFP"); if( _XYZW_SS ) { _vuFlipRegSS(VU, EEREC_T); - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, VU_VI_ADDR(REG_P, 1)); - SSE_MOVSS_XMM_to_XMM(EEREC_T, EEREC_TEMP); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_VI_ADDR(REG_P, 1))]); + xMOVSS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_TEMP)); _vuFlipRegSS(VU, EEREC_T); } else if (_X_Y_Z_W != 0xf) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, VU_VI_ADDR(REG_P, 1)); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_VI_ADDR(REG_P, 1))]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } else { - SSE_MOVSS_M32_to_XMM(EEREC_T, VU_VI_ADDR(REG_P, 1)); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0); + xMOVSSZX(xRegisterSSE(EEREC_T), ptr[(void*)(VU_VI_ADDR(REG_P, 1))]); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0); } } //------------------------------------------------------------------ @@ -1564,27 +1564,27 @@ void vuSqSumXYZ(int regd, int regs, int regtemp) // regd.x = x ^ 2 + y ^ 2 + z //Console.WriteLn("VU: SUMXYZ"); if( x86caps.hasStreamingSIMD4Extensions ) { - SSE_MOVAPS_XMM_to_XMM(regd, regs); + xMOVAPS(xRegisterSSE(regd), xRegisterSSE(regs)); if (CHECK_VU_EXTRA_OVERFLOW) vuFloat2(regd, regtemp, 0xf); - SSE4_DPPS_XMM_to_XMM(regd, regd, 0x71); + xDP.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x71); } else { - SSE_MOVAPS_XMM_to_XMM(regtemp, regs); + xMOVAPS(xRegisterSSE(regtemp), xRegisterSSE(regs)); if (CHECK_VU_EXTRA_OVERFLOW) vuFloat2(regtemp, regd, 0xf); - SSE_MULPS_XMM_to_XMM(regtemp, regtemp); // xyzw ^ 2 + xMUL.PS(xRegisterSSE(regtemp), xRegisterSSE(regtemp)); // xyzw ^ 2 if( x86caps.hasStreamingSIMD3Extensions ) { - SSE3_HADDPS_XMM_to_XMM(regd, regtemp); - SSE_ADDPS_XMM_to_XMM(regd, regtemp); // regd.z = x ^ 2 + y ^ 2 + z ^ 2 - SSE_MOVHLPS_XMM_to_XMM(regd, regd); // regd.x = regd.z + xHADD.PS(xRegisterSSE(regd), xRegisterSSE(regtemp)); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(regtemp)); // regd.z = x ^ 2 + y ^ 2 + z ^ 2 + xMOVHL.PS(xRegisterSSE(regd), xRegisterSSE(regd)); // regd.x = regd.z } else { - SSE_MOVSS_XMM_to_XMM(regd, regtemp); - SSE2_PSHUFLW_XMM_to_XMM(regtemp, regtemp, 0x4e); // wzyx -> wzxy - SSE_ADDSS_XMM_to_XMM(regd, regtemp); // x ^ 2 + y ^ 2 - SSE_SHUFPS_XMM_to_XMM(regtemp, regtemp, 0xD2); // wzxy -> wxyz - SSE_ADDSS_XMM_to_XMM(regd, regtemp); // x ^ 2 + y ^ 2 + z ^ 2 + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regtemp)); + xPSHUF.LW(xRegisterSSE(regtemp), xRegisterSSE(regtemp), 0x4e); // wzyx -> wzxy + xADD.SS(xRegisterSSE(regd), xRegisterSSE(regtemp)); // x ^ 2 + y ^ 2 + xSHUF.PS(xRegisterSSE(regtemp), xRegisterSSE(regtemp), 0xD2); // wzxy -> wxyz + xADD.SS(xRegisterSSE(regd), xRegisterSSE(regtemp)); // x ^ 2 + y ^ 2 + z ^ 2 } } } @@ -1600,12 +1600,12 @@ void recVUMI_ESADD( VURegs *VU, int info) pxAssert( VU == &VU1 ); if( EEREC_TEMP == EEREC_D ) { // special code to reset P ( FixMe: don't know if this is still needed! (cottonvibes) ) Console.Warning("ESADD: Resetting P reg!!!\n"); - MOV32ItoM(VU_VI_ADDR(REG_P, 0), 0); + xMOV(ptr32[(u32*)(VU_VI_ADDR(REG_P, 0))], 0); return; } vuSqSumXYZ(EEREC_D, EEREC_S, EEREC_TEMP); - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)g_maxvals); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_D); + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_D), ptr[g_maxvals]); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_D)); } //------------------------------------------------------------------ @@ -1619,10 +1619,10 @@ void recVUMI_ERSADD( VURegs *VU, int info ) pxAssert( VU == &VU1 ); vuSqSumXYZ(EEREC_D, EEREC_S, EEREC_TEMP); // don't use RCPSS (very bad precision) - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)VU_ONE); - SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_D); - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)g_maxvals); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); + xDIV.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_D)); + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_TEMP), ptr[g_maxvals]); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_TEMP)); } //------------------------------------------------------------------ @@ -1635,9 +1635,9 @@ void recVUMI_ELENG( VURegs *VU, int info ) //Console.WriteLn("VU: ELENG"); pxAssert( VU == &VU1 ); vuSqSumXYZ(EEREC_D, EEREC_S, EEREC_TEMP); - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)g_maxvals); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive - SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_D); + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_D), ptr[g_maxvals]); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive + xSQRT.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_D)); } //------------------------------------------------------------------ @@ -1650,12 +1650,12 @@ void recVUMI_ERLENG( VURegs *VU, int info ) //Console.WriteLn("VU: ERLENG"); pxAssert( VU == &VU1 ); vuSqSumXYZ(EEREC_D, EEREC_S, EEREC_TEMP); - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)g_maxvals); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive - SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D); // regd <- sqrt(x^2 + y^2 + z^2) - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)VU_ONE); // temp <- 1 - SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_D); // temp = 1 / sqrt(x^2 + y^2 + z^2) - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)g_maxvals); // Only need to do positive clamp - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP); + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_D), ptr[g_maxvals]); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive + xSQRT.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); // regd <- sqrt(x^2 + y^2 + z^2) + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); // temp <- 1 + xDIV.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_D)); // temp = 1 / sqrt(x^2 + y^2 + z^2) + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_TEMP), ptr[g_maxvals]); // Only need to do positive clamp + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_TEMP)); } //------------------------------------------------------------------ @@ -1668,13 +1668,13 @@ void recVUMI_EATANxy( VURegs *VU, int info ) pxAssert( VU == &VU1 ); //Console.WriteLn("recVUMI_EATANxy"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { - SSE_MOVLPS_XMM_to_M64((uptr)s_tempmem, EEREC_S); + xMOVL.PS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); FLD32((uptr)&s_tempmem[0]); FLD32((uptr)&s_tempmem[1]); } else { if( xmmregs[EEREC_S].mode & MODE_WRITE ) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[_Fs_], EEREC_S); + xMOVAPS(ptr[(&VU->VF[_Fs_])], xRegisterSSE(EEREC_S)); xmmregs[EEREC_S].mode &= ~MODE_WRITE; } @@ -1696,13 +1696,13 @@ void recVUMI_EATANxz( VURegs *VU, int info ) pxAssert( VU == &VU1 ); //Console.WriteLn("recVUMI_EATANxz"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { - SSE_MOVLPS_XMM_to_M64((uptr)s_tempmem, EEREC_S); + xMOVL.PS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); FLD32((uptr)&s_tempmem[0]); FLD32((uptr)&s_tempmem[2]); } else { if( xmmregs[EEREC_S].mode & MODE_WRITE ) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[_Fs_], EEREC_S); + xMOVAPS(ptr[(&VU->VF[_Fs_])], xRegisterSSE(EEREC_S)); xmmregs[EEREC_S].mode &= ~MODE_WRITE; } @@ -1724,21 +1724,21 @@ void recVUMI_ESUM( VURegs *VU, int info ) pxAssert( VU == &VU1 ); if( x86caps.hasStreamingSIMD3Extensions ) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) vuFloat_useEAX(info, EEREC_TEMP, 0xf); - SSE3_HADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); - SSE3_HADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xHADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); + xHADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVHLPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); // z, w, z, w - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); // z+x, w+y, z+z, w+w - SSE_UNPCKLPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); // z+x, z+x, w+y, w+y - SSE_MOVHLPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); // w+y, w+y, w+y, w+y - SSE_ADDSS_XMM_to_XMM(EEREC_TEMP, EEREC_D); // x+y+z+w, w+y, w+y, w+y + xMOVHL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); // z, w, z, w + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); // z+x, w+y, z+z, w+w + xUNPCK.LPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); // z+x, z+x, w+y, w+y + xMOVHL.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); // w+y, w+y, w+y, w+y + xADD.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_D)); // x+y+z+w, w+y, w+y, w+y } vuFloat_useEAX(info, EEREC_TEMP, 8); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_TEMP)); } //------------------------------------------------------------------ @@ -1755,34 +1755,34 @@ void recVUMI_ERCPR( VURegs *VU, int info ) switch ( _Fsf_ ) { case 0: //0001 if (CHECK_VU_EXTRA_OVERFLOW) vuFloat5_useEAX(EEREC_S, EEREC_TEMP, 8); - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)VU_ONE); // temp <- 1 - SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); // temp <- 1 + xDIV.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); break; case 1: //0010 - SSE2_PSHUFLW_XMM_to_XMM(EEREC_S, EEREC_S, 0x4e); + xPSHUF.LW(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0x4e); if (CHECK_VU_EXTRA_OVERFLOW) vuFloat5_useEAX(EEREC_S, EEREC_TEMP, 8); - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)VU_ONE); // temp <- 1 - SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE2_PSHUFLW_XMM_to_XMM(EEREC_S, EEREC_S, 0x4e); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); // temp <- 1 + xDIV.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xPSHUF.LW(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0x4e); break; case 2: //0100 - SSE_SHUFPS_XMM_to_XMM(EEREC_S, EEREC_S, 0xc6); + xSHUF.PS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0xc6); if (CHECK_VU_EXTRA_OVERFLOW) vuFloat5_useEAX(EEREC_S, EEREC_TEMP, 8); - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)VU_ONE); // temp <- 1 - SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SHUFPS_XMM_to_XMM(EEREC_S, EEREC_S, 0xc6); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); // temp <- 1 + xDIV.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSHUF.PS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0xc6); break; case 3: //1000 - SSE_SHUFPS_XMM_to_XMM(EEREC_S, EEREC_S, 0x27); + xSHUF.PS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0x27); if (CHECK_VU_EXTRA_OVERFLOW) vuFloat5_useEAX(EEREC_S, EEREC_TEMP, 8); - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)VU_ONE); // temp <- 1 - SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SHUFPS_XMM_to_XMM(EEREC_S, EEREC_S, 0x27); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); // temp <- 1 + xDIV.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSHUF.PS(xRegisterSSE(EEREC_S), xRegisterSSE(EEREC_S), 0x27); break; } vuFloat_useEAX(info, EEREC_TEMP, 8); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_TEMP)); } //------------------------------------------------------------------ @@ -1796,11 +1796,11 @@ void recVUMI_ESQRT( VURegs *VU, int info ) //Console.WriteLn("VU1: ESQRT"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)const_clip); // abs(x) - if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)g_maxvals); // Only need to do positive clamp - SSE_SQRTSS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[const_clip]); // abs(x) + if (CHECK_VU_OVERFLOW) xMIN.SS(xRegisterSSE(EEREC_TEMP), ptr[g_maxvals]); // Only need to do positive clamp + xSQRT.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_TEMP)); } //------------------------------------------------------------------ @@ -1816,25 +1816,25 @@ void recVUMI_ERSQRT( VURegs *VU, int info ) //Console.WriteLn("VU1: ERSQRT"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)const_clip); // abs(x) - SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)g_maxvals); // Clamp Infinities to Fmax - SSE_SQRTSS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); // SQRT(abs(x)) + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[const_clip]); // abs(x) + xMIN.SS(xRegisterSSE(EEREC_TEMP), ptr[g_maxvals]); // Clamp Infinities to Fmax + xSQRT.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); // SQRT(abs(x)) if( t1reg >= 0 ) { - SSE_MOVSS_M32_to_XMM(t1reg, (uptr)VU_ONE); - SSE_DIVSS_XMM_to_XMM(t1reg, EEREC_TEMP); + xMOVSSZX(xRegisterSSE(t1reg), ptr[VU_ONE]); + xDIV.SS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); vuFloat_useEAX(info, t1reg, 8); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), t1reg); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(t1reg)); _freeXMMreg(t1reg); } else { - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP); - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)VU_ONE); - SSE_DIVSS_M32_to_XMM(EEREC_TEMP, VU_VI_ADDR(REG_P, 0)); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_TEMP)); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[VU_ONE]); + xDIV.SS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_VI_ADDR(REG_P, 0))]); vuFloat_useEAX(info, EEREC_TEMP, 8); - SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP); + xMOVSS(ptr[(void*)(VU_VI_ADDR(REG_P, 0))], xRegisterSSE(EEREC_TEMP)); } } //------------------------------------------------------------------ @@ -1850,15 +1850,15 @@ void recVUMI_ESIN( VURegs *VU, int info ) //Console.WriteLn("recVUMI_ESIN"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { switch(_Fsf_) { - case 0: SSE_MOVSS_XMM_to_M32((uptr)s_tempmem, EEREC_S); break; - case 1: SSE_MOVLPS_XMM_to_M64((uptr)s_tempmem, EEREC_S); break; - default: SSE_MOVHPS_XMM_to_M64((uptr)&s_tempmem[2], EEREC_S); break; + case 0: xMOVSS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); break; + case 1: xMOVL.PS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); break; + default: xMOVH.PS(ptr[&s_tempmem[2]], xRegisterSSE(EEREC_S)); break; } FLD32((uptr)&s_tempmem[_Fsf_]); } else { if( xmmregs[EEREC_S].mode & MODE_WRITE ) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[_Fs_], EEREC_S); + xMOVAPS(ptr[(&VU->VF[_Fs_])], xRegisterSSE(EEREC_S)); xmmregs[EEREC_S].mode &= ~MODE_WRITE; } @@ -1881,15 +1881,15 @@ void recVUMI_EATAN( VURegs *VU, int info ) //Console.WriteLn("recVUMI_EATAN"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { switch(_Fsf_) { - case 0: SSE_MOVSS_XMM_to_M32((uptr)s_tempmem, EEREC_S); break; - case 1: SSE_MOVLPS_XMM_to_M64((uptr)s_tempmem, EEREC_S); break; - default: SSE_MOVHPS_XMM_to_M64((uptr)&s_tempmem[2], EEREC_S); break; + case 0: xMOVSS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); break; + case 1: xMOVL.PS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); break; + default: xMOVH.PS(ptr[&s_tempmem[2]], xRegisterSSE(EEREC_S)); break; } FLD32((uptr)&s_tempmem[_Fsf_]); } else { if( xmmregs[EEREC_S].mode & MODE_WRITE ) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[_Fs_], EEREC_S); + xMOVAPS(ptr[(&VU->VF[_Fs_])], xRegisterSSE(EEREC_S)); xmmregs[EEREC_S].mode &= ~MODE_WRITE; } } @@ -1913,15 +1913,15 @@ void recVUMI_EEXP( VURegs *VU, int info ) if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { switch(_Fsf_) { - case 0: SSE_MOVSS_XMM_to_M32((uptr)s_tempmem, EEREC_S); break; - case 1: SSE_MOVLPS_XMM_to_M64((uptr)s_tempmem, EEREC_S); break; - default: SSE_MOVHPS_XMM_to_M64((uptr)&s_tempmem[2], EEREC_S); break; + case 0: xMOVSS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); break; + case 1: xMOVL.PS(ptr[s_tempmem], xRegisterSSE(EEREC_S)); break; + default: xMOVH.PS(ptr[&s_tempmem[2]], xRegisterSSE(EEREC_S)); break; } FMUL32((uptr)&s_tempmem[_Fsf_]); } else { if( xmmregs[EEREC_S].mode & MODE_WRITE ) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[_Fs_], EEREC_S); + xMOVAPS(ptr[(&VU->VF[_Fs_])], xRegisterSSE(EEREC_S)); xmmregs[EEREC_S].mode &= ~MODE_WRITE; } @@ -1953,7 +1953,7 @@ void recVUMI_XITOP( VURegs *VU, int info ) if (_It_ == 0) return; //Console.WriteLn("recVUMI_XITOP"); itreg = ALLOCVI(_It_, MODE_WRITE); - MOVZX32M16toR( itreg, (uptr)&VU->GetVifRegs().itop ); + xMOVZX(xRegister32(itreg), ptr16[(u16*)((uptr)&VU->GetVifRegs().itop )]); } //------------------------------------------------------------------ @@ -1967,7 +1967,7 @@ void recVUMI_XTOP( VURegs *VU, int info ) if ( _It_ == 0 ) return; //Console.WriteLn("recVUMI_XTOP"); itreg = ALLOCVI(_It_, MODE_WRITE); - MOVZX32M16toR( itreg, (uptr)&VU->GetVifRegs().top ); + xMOVZX(xRegister32(itreg), ptr16[(u16*)((uptr)&VU->GetVifRegs().top )]); } //------------------------------------------------------------------ diff --git a/pcsx2/x86/sVU_Micro.cpp b/pcsx2/x86/sVU_Micro.cpp index 18afd3739e..14c607864e 100644 --- a/pcsx2/x86/sVU_Micro.cpp +++ b/pcsx2/x86/sVU_Micro.cpp @@ -740,23 +740,23 @@ int _vuGetTempXMMreg(int info) void _unpackVF_xyzw(int dstreg, int srcreg, int xyzw) { switch (xyzw) { - case 0: SSE2_PSHUFD_XMM_to_XMM(dstreg, srcreg, 0x00); break; - case 1: SSE2_PSHUFD_XMM_to_XMM(dstreg, srcreg, 0x55); break; - case 2: SSE2_PSHUFD_XMM_to_XMM(dstreg, srcreg, 0xaa); break; - case 3: SSE2_PSHUFD_XMM_to_XMM(dstreg, srcreg, 0xff); break; + case 0: xPSHUF.D(xRegisterSSE(dstreg), xRegisterSSE(srcreg), 0x00); break; + case 1: xPSHUF.D(xRegisterSSE(dstreg), xRegisterSSE(srcreg), 0x55); break; + case 2: xPSHUF.D(xRegisterSSE(dstreg), xRegisterSSE(srcreg), 0xaa); break; + case 3: xPSHUF.D(xRegisterSSE(dstreg), xRegisterSSE(srcreg), 0xff); break; } } void _unpackVFSS_xyzw(int dstreg, int srcreg, int xyzw) { switch (xyzw) { - case 0: SSE_MOVSS_XMM_to_XMM(dstreg, srcreg); break; + case 0: xMOVSS(xRegisterSSE(dstreg), xRegisterSSE(srcreg)); break; case 1: if ( x86caps.hasStreamingSIMD4Extensions ) xINSERTPS(xRegisterSSE(dstreg), xRegisterSSE(srcreg), _MM_MK_INSERTPS_NDX(1, 0, 0)); - else SSE2_PSHUFLW_XMM_to_XMM(dstreg, srcreg, 0xee); + else xPSHUF.LW(xRegisterSSE(dstreg), xRegisterSSE(srcreg), 0xee); break; - case 2: SSE_MOVHLPS_XMM_to_XMM(dstreg, srcreg); break; + case 2: xMOVHL.PS(xRegisterSSE(dstreg), xRegisterSSE(srcreg)); break; case 3: if ( x86caps.hasStreamingSIMD4Extensions ) xINSERTPS(xRegisterSSE(dstreg), xRegisterSSE(srcreg), _MM_MK_INSERTPS_NDX(3, 0, 0)); - else { SSE_MOVHLPS_XMM_to_XMM(dstreg, srcreg); SSE2_PSHUFLW_XMM_to_XMM(dstreg, dstreg, 0xee); } + else { xMOVHL.PS(xRegisterSSE(dstreg), xRegisterSSE(srcreg)); xPSHUF.LW(xRegisterSSE(dstreg), xRegisterSSE(dstreg), 0xee); } break; } } @@ -764,17 +764,17 @@ void _unpackVFSS_xyzw(int dstreg, int srcreg, int xyzw) void _vuFlipRegSS(VURegs * VU, int reg) { assert( _XYZW_SS ); - if( _Y ) SSE2_PSHUFLW_XMM_to_XMM(reg, reg, 0x4e); - else if( _Z ) SSE_SHUFPS_XMM_to_XMM(reg, reg, 0xc6); - else if( _W ) SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x27); + if( _Y ) xPSHUF.LW(xRegisterSSE(reg), xRegisterSSE(reg), 0x4e); + else if( _Z ) xSHUF.PS(xRegisterSSE(reg), xRegisterSSE(reg), 0xc6); + else if( _W ) xSHUF.PS(xRegisterSSE(reg), xRegisterSSE(reg), 0x27); } void _vuFlipRegSS_xyzw(int reg, int xyzw) { switch ( xyzw ) { - case 1: SSE2_PSHUFLW_XMM_to_XMM(reg, reg, 0x4e); break; - case 2: SSE_SHUFPS_XMM_to_XMM(reg, reg, 0xc6); break; - case 3: SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x27); break; + case 1: xPSHUF.LW(xRegisterSSE(reg), xRegisterSSE(reg), 0x4e); break; + case 2: xSHUF.PS(xRegisterSSE(reg), xRegisterSSE(reg), 0xc6); break; + case 3: xSHUF.PS(xRegisterSSE(reg), xRegisterSSE(reg), 0x27); break; } } @@ -791,157 +791,157 @@ void _vuMoveSS(VURegs * VU, int dstreg, int srcreg) void VU_MERGE0(int dest, int src) { // 0000s } void VU_MERGE1(int dest, int src) { // 1000 - SSE_MOVHLPS_XMM_to_XMM(src, dest); - SSE_SHUFPS_XMM_to_XMM(dest, src, 0xc4); + xMOVHL.PS(xRegisterSSE(src), xRegisterSSE(dest)); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0xc4); } void VU_MERGE1b(int dest, int src) { // 1000s - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); } void VU_MERGE2(int dest, int src) { // 0100 - SSE_MOVHLPS_XMM_to_XMM(src, dest); - SSE_SHUFPS_XMM_to_XMM(dest, src, 0x64); + xMOVHL.PS(xRegisterSSE(src), xRegisterSSE(dest)); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0x64); } void VU_MERGE2b(int dest, int src) { // 0100s - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); } void VU_MERGE3(int dest, int src) { // 1100s - SSE_SHUFPS_XMM_to_XMM(dest, src, 0xe4); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0xe4); } void VU_MERGE4(int dest, int src) { // 0010 - SSE_MOVSS_XMM_to_XMM(src, dest); - SSE2_MOVSD_XMM_to_XMM(dest, src); + xMOVSS(xRegisterSSE(src), xRegisterSSE(dest)); + xMOVSD(xRegisterSSE(dest), xRegisterSSE(src)); } void VU_MERGE4b(int dest, int src) { // 0010s - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); } void VU_MERGE5(int dest, int src) { // 1010 - SSE_SHUFPS_XMM_to_XMM(dest, src, 0xd8); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xd8); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0xd8); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xd8); } void VU_MERGE5b(int dest, int src) { // 1010s - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); } void VU_MERGE6(int dest, int src) { // 0110 - SSE_SHUFPS_XMM_to_XMM(dest, src, 0x9c); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x78); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0x9c); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x78); } void VU_MERGE6b(int dest, int src) { // 0110s - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); } void VU_MERGE7(int dest, int src) { // 1110 - SSE_MOVSS_XMM_to_XMM(src, dest); - SSE_MOVAPS_XMM_to_XMM(dest, src); + xMOVSS(xRegisterSSE(src), xRegisterSSE(dest)); + xMOVAPS(xRegisterSSE(dest), xRegisterSSE(src)); } void VU_MERGE7b(int dest, int src) { // 1110s - SSE_SHUFPS_XMM_to_XMM(dest, src, 0xe4); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0xe4); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); } void VU_MERGE8(int dest, int src) { // 0001s - SSE_MOVSS_XMM_to_XMM(dest, src); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); } void VU_MERGE9(int dest, int src) { // 1001 - SSE_SHUFPS_XMM_to_XMM(dest, src, 0xc9); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xd2); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0xc9); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xd2); } void VU_MERGE9b(int dest, int src) { // 1001s - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); } void VU_MERGE10(int dest, int src) { // 0101 - SSE_SHUFPS_XMM_to_XMM(dest, src, 0x8d); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x72); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0x8d); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x72); } void VU_MERGE10b(int dest, int src) { // 0101s - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); } void VU_MERGE11(int dest, int src) { // 1101s - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(dest, src, 0xe4); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(src), 0xe4); } void VU_MERGE12(int dest, int src) { // 0011 - SSE2_MOVSD_XMM_to_XMM(dest, src); + xMOVSD(xRegisterSSE(dest), xRegisterSSE(src)); } void VU_MERGE13(int dest, int src) { // 1011 - SSE_MOVHLPS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, dest, 0x64); - SSE_MOVAPS_XMM_to_XMM(dest, src); + xMOVHL.PS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(dest), 0x64); + xMOVAPS(xRegisterSSE(dest), xRegisterSSE(src)); } void VU_MERGE13b(int dest, int src) { // 1011s - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0x27); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0x27); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0x27); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0x27); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); } void VU_MERGE14(int dest, int src) { // 0111 - SSE_MOVHLPS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, dest, 0xc4); - SSE_MOVAPS_XMM_to_XMM(dest, src); + xMOVHL.PS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(dest), 0xc4); + xMOVAPS(xRegisterSSE(dest), xRegisterSSE(src)); } void VU_MERGE14b(int dest, int src) { // 0111s - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xE1); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xE1); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); - SSE_MOVSS_XMM_to_XMM(dest, src); - SSE_SHUFPS_XMM_to_XMM(src, src, 0xC6); - SSE_SHUFPS_XMM_to_XMM(dest, dest, 0xC6); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xE1); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xE1); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); + xMOVSS(xRegisterSSE(dest), xRegisterSSE(src)); + xSHUF.PS(xRegisterSSE(src), xRegisterSSE(src), 0xC6); + xSHUF.PS(xRegisterSSE(dest), xRegisterSSE(dest), 0xC6); } void VU_MERGE15(int dest, int src) { // 1111s - SSE_MOVAPS_XMM_to_XMM(dest, src); + xMOVAPS(xRegisterSSE(dest), xRegisterSSE(src)); } typedef void (*VUMERGEFN)(int dest, int src); @@ -964,7 +964,7 @@ void VU_MERGE_REGS_CUSTOM(int dest, int src, int xyzw) { if ( (dest != src) && (xyzw != 0) ) { if ( x86caps.hasStreamingSIMD4Extensions && (xyzw != 0x8) && (xyzw != 0xf) ) { xyzw = ((xyzw & 1) << 3) | ((xyzw & 2) << 1) | ((xyzw & 4) >> 1) | ((xyzw & 8) >> 3); - SSE4_BLENDPS_XMM_to_XMM(dest, src, xyzw); + xBLEND.PS(xRegisterSSE(dest), xRegisterSSE(src), xyzw); } else s_VuMerge[xyzw](dest, src); } @@ -975,7 +975,7 @@ void VU_MERGE_REGS_SAFE(int dest, int src, int xyzw) { if ( (dest != src) && (xyzw != 0) ) { if ( x86caps.hasStreamingSIMD4Extensions && (xyzw != 0x8) && (xyzw != 0xf) ) { xyzw = ((xyzw & 1) << 3) | ((xyzw & 2) << 1) | ((xyzw & 4) >> 1) | ((xyzw & 8) >> 3); - SSE4_BLENDPS_XMM_to_XMM(dest, src, xyzw); + xBLEND.PS(xRegisterSSE(dest), xRegisterSSE(src), xyzw); } else s_VuMerge2[xyzw](dest, src); } @@ -987,132 +987,132 @@ void VU_MERGE_REGS_SAFE(int dest, int src, int xyzw) { // Misc VU Reg Clamping/Overflow Functions //------------------------------------------------------------------ #define CLAMP_NORMAL_SSE4(n) \ - SSE_MOVAPS_XMM_to_XMM(regTemp, regd);\ - SSE4_PMINUD_M128_to_XMM(regd, (uptr)&g_minvals_XYZW[n][0]);\ - SSE2_PSUBD_XMM_to_XMM(regTemp, regd);\ - SSE2_PCMPGTD_M128_to_XMM(regTemp, (uptr)&g_ones[0]);\ - SSE4_PMINSD_M128_to_XMM(regd, (uptr)&g_maxvals_XYZW[n][0]);\ - SSE2_PSLLD_I8_to_XMM(regTemp, 31);\ - SSE_XORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd));\ + xPMIN.UD(xRegisterSSE(regd), ptr[&g_minvals_XYZW[n][0]]);\ + xPSUB.D(xRegisterSSE(regTemp), xRegisterSSE(regd));\ + xPCMP.GTD(xRegisterSSE(regTemp), ptr[&g_ones[0]]);\ + xPMIN.SD(xRegisterSSE(regd), ptr[&g_maxvals_XYZW[n][0]]);\ + xPSLL.D(xRegisterSSE(regTemp), 31);\ + xXOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); #define CLAMP_SIGN_SSE4(n) \ - SSE4_PMINSD_M128_to_XMM(regd, (uptr)&g_maxvals_XYZW[n][0]);\ - SSE4_PMINUD_M128_to_XMM(regd, (uptr)&g_minvals_XYZW[n][0]); + xPMIN.SD(xRegisterSSE(regd), ptr[&g_maxvals_XYZW[n][0]]);\ + xPMIN.UD(xRegisterSSE(regd), ptr[&g_minvals_XYZW[n][0]]); void vFloat0(int regd, int regTemp) { } //0000 void vFloat1(int regd, int regTemp) { //1000 - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); } void vFloat1c(int regd, int regTemp) { //1000 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(1); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat2(int regd, int regTemp) { //0100 - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); } void vFloat2c(int regd, int regTemp) { //0100 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(2); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat3(int regd, int regTemp) { //1100 - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x36); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x36); } void vFloat3b(int regd, int regTemp) { //1100 //regTemp is Modified - SSE2_MOVSD_XMM_to_XMM(regTemp, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE2_MOVSD_XMM_to_XMM(regd, regTemp); + xMOVSD(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xMOVSD(xRegisterSSE(regd), xRegisterSSE(regTemp)); } void vFloat3c(int regd, int regTemp) { //1100 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(3); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x36); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x36); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat4(int regd, int regTemp) { //0010 - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); } void vFloat4c(int regd, int regTemp) { //0010 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(4); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat5(int regd, int regTemp) { //1010 - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x2d); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x2d); } void vFloat5b(int regd, int regTemp) { //1010 //regTemp is Modified if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_NORMAL_SSE4(5); } else { - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x2d); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x2d); } } void vFloat5c(int regd, int regTemp) { //1010 @@ -1120,39 +1120,39 @@ void vFloat5c(int regd, int regTemp) { //1010 CLAMP_SIGN_SSE4(5); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x2d); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x2d); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat6(int regd, int regTemp) { //0110 - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc9); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc9); } void vFloat6b(int regd, int regTemp) { //0110 //regTemp is Modified if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_NORMAL_SSE4(6); } else { - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc9); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc9); } } void vFloat6c(int regd, int regTemp) { //0110 @@ -1160,66 +1160,66 @@ void vFloat6c(int regd, int regTemp) { //0110 CLAMP_SIGN_SSE4(6); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc9); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc9); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat7(int regd, int regTemp) { //1110 - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x39); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x39); } void vFloat7_useEAX(int regd, int regTemp) { //1110 //EAX is Modified - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); + xMOVD(eax, xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); if ( x86caps.hasStreamingSIMD4Extensions ) - SSE4_PINSRD_R32_to_XMM(regd, EAX, 0x00); + xPINSR.D(xRegisterSSE(regd), eax, 0x00); else { - SSE_PINSRW_R32_to_XMM(regd, EAX, 0); - SHR32ItoR(EAX, 16); - SSE_PINSRW_R32_to_XMM(regd, EAX, 1); + xPINSR.W(xRegisterSSE(regd), eax, 0); + xSHR(eax, 16); + xPINSR.W(xRegisterSSE(regd), eax, 1); } } void vFloat7b(int regd, int regTemp) { //1110 //regTemp is Modified - SSE_MOVSS_XMM_to_XMM(regTemp, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_MOVSS_XMM_to_XMM(regd, regTemp); + xMOVSS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } void vFloat7c(int regd, int regTemp) { //1110 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(7); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x39); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x39); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat7c_useEAX(int regd, int regTemp) { //1110 //EAX is Modified @@ -1227,51 +1227,51 @@ void vFloat7c_useEAX(int regd, int regTemp) { //1110 //EAX is Modified CLAMP_SIGN_SSE4(7); } else { - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_ORPS_XMM_to_XMM(regd, regTemp); - SSE2_MOVD_R_to_XMM(regTemp, EAX); - SSE_MOVSS_XMM_to_XMM(regd, regTemp); + xMOVD(eax, xRegisterSSE(regd)); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); + xMOVDZX(xRegisterSSE(regTemp), eax); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat8(int regd, int regTemp) { //0001 - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); } void vFloat8c(int regd, int regTemp) { //0001 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(8); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat9(int regd, int regTemp) { //1001 - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); } void vFloat9b(int regd, int regTemp) { //1001 //regTemp is Modified if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_NORMAL_SSE4(9); } else { - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); } } void vFloat9c(int regd, int regTemp) { //1001 @@ -1279,36 +1279,36 @@ void vFloat9c(int regd, int regTemp) { //1001 CLAMP_SIGN_SSE4(9); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat10(int regd, int regTemp) { //0101 - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); } void vFloat10b(int regd, int regTemp) { //0101 //regTemp is Modified if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_NORMAL_SSE4(10); } else { - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); } } void vFloat10c(int regd, int regTemp) { //0101 @@ -1316,66 +1316,66 @@ void vFloat10c(int regd, int regTemp) { //0101 CLAMP_SIGN_SSE4(10); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat11(int regd, int regTemp) { //1101 - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x36); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x36); } void vFloat11_useEAX(int regd, int regTemp) { //1101 //EAX is Modified - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMOVD(eax, xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); if ( x86caps.hasStreamingSIMD4Extensions ) - SSE4_PINSRD_R32_to_XMM(regd, EAX, 0x00); + xPINSR.D(xRegisterSSE(regd), eax, 0x00); else { - SSE_PINSRW_R32_to_XMM(regd, EAX, 0); - SHR32ItoR(EAX, 16); - SSE_PINSRW_R32_to_XMM(regd, EAX, 1); + xPINSR.W(xRegisterSSE(regd), eax, 0); + xSHR(eax, 16); + xPINSR.W(xRegisterSSE(regd), eax, 1); } - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); } void vFloat11b(int regd, int regTemp) { //1101 //regTemp is Modified - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_MOVSS_XMM_to_XMM(regTemp, regd); - SSE2_MOVSD_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xMOVSS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xMOVSD(xRegisterSSE(regd), xRegisterSSE(regTemp)); } void vFloat11c(int regd, int regTemp) { //1101 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(11); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x36); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x36); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat11c_useEAX(int regd, int regTemp) { //1101 // EAX is modified @@ -1383,97 +1383,97 @@ void vFloat11c_useEAX(int regd, int regTemp) { //1101 // EAX is modified CLAMP_SIGN_SSE4(11); } else { - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_ORPS_XMM_to_XMM(regd, regTemp); - SSE2_MOVD_R_to_XMM(regTemp, EAX); - SSE_MOVSS_XMM_to_XMM(regd, regTemp); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMOVD(eax, xRegisterSSE(regd)); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); + xMOVDZX(xRegisterSSE(regTemp), eax); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regTemp)); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); } } void vFloat12(int regd, int regTemp) { //0011 - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); } void vFloat12b(int regd, int regTemp) { //0011 //regTemp is Modified - SSE_MOVHLPS_XMM_to_XMM(regTemp, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE2_PUNPCKLQDQ_XMM_to_XMM(regd, regTemp); + xMOVHL.PS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xPUNPCK.LQDQ(xRegisterSSE(regd), xRegisterSSE(regTemp)); } void vFloat12c(int regd, int regTemp) { //0011 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(12); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat13(int regd, int regTemp) { //1011 - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x2d); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x2d); } void vFloat13_useEAX(int regd, int regTemp) { //1011 // EAX is modified - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMOVD(eax, xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); if ( x86caps.hasStreamingSIMD4Extensions ) - SSE4_PINSRD_R32_to_XMM(regd, EAX, 0x00); + xPINSR.D(xRegisterSSE(regd), eax, 0x00); else { - SSE_PINSRW_R32_to_XMM(regd, EAX, 0); - SHR32ItoR(EAX, 16); - SSE_PINSRW_R32_to_XMM(regd, EAX, 1); + xPINSR.W(xRegisterSSE(regd), eax, 0); + xSHR(eax, 16); + xPINSR.W(xRegisterSSE(regd), eax, 1); } - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); } void vFloat13b(int regd, int regTemp) { //1011 //regTemp is Modified - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_MOVHLPS_XMM_to_XMM(regTemp, regd); - SSE_SHUFPS_XMM_to_XMM(regd, regTemp, 0x64); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xMOVHL.PS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regTemp), 0x64); } void vFloat13c(int regd, int regTemp) { //1011 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(13); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x2d); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x2d); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat13c_useEAX(int regd, int regTemp) { //1011 // EAX is modified @@ -1481,67 +1481,67 @@ void vFloat13c_useEAX(int regd, int regTemp) { //1011 // EAX is modified CLAMP_SIGN_SSE4(13); } else { - SSE2_PSHUFD_XMM_to_XMM(regd, regd, 0xc6); - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_ORPS_XMM_to_XMM(regd, regTemp); - SSE2_MOVD_R_to_XMM(regTemp, EAX); - SSE_MOVSS_XMM_to_XMM(regd, regTemp); - SSE2_PSHUFD_XMM_to_XMM(regd, regd, 0xc6); + xPSHUF.D(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMOVD(eax, xRegisterSSE(regd)); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); + xMOVDZX(xRegisterSSE(regTemp), eax); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regTemp)); + xPSHUF.D(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); } } void vFloat14(int regd, int regTemp) { //0111 - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc9); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc9); } void vFloat14_useEAX(int regd, int regTemp) { //0111 // EAX is modified - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMOVD(eax, xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); if ( x86caps.hasStreamingSIMD4Extensions ) - SSE4_PINSRD_R32_to_XMM(regd, EAX, 0x00); + xPINSR.D(xRegisterSSE(regd), eax, 0x00); else { - SSE_PINSRW_R32_to_XMM(regd, EAX, 0); - SHR32ItoR(EAX, 16); - SSE_PINSRW_R32_to_XMM(regd, EAX, 1); + xPINSR.W(xRegisterSSE(regd), eax, 0); + xSHR(eax, 16); + xPINSR.W(xRegisterSSE(regd), eax, 1); } - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x27); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); } void vFloat14b(int regd, int regTemp) { //0111 //regTemp is Modified - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_MOVHLPS_XMM_to_XMM(regTemp, regd); - SSE_SHUFPS_XMM_to_XMM(regd, regTemp, 0xc4); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xMOVHL.PS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regTemp), 0xc4); } void vFloat14c(int regd, int regTemp) { //0111 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(14); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE2_PSHUFLW_XMM_to_XMM(regd, regd, 0x4e); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc6); - SSE_MINSS_M32_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXSS_M32_to_XMM(regd, (uptr)g_minvals); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0xc9); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xPSHUF.LW(xRegisterSSE(regd), xRegisterSSE(regd), 0x4e); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc6); + xMIN.SS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.SS(xRegisterSSE(regd), ptr[g_minvals]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0xc9); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } void vFloat14c_useEAX(int regd, int regTemp) { //0111 // EAX is modified @@ -1549,32 +1549,32 @@ void vFloat14c_useEAX(int regd, int regTemp) { //0111 // EAX is modified CLAMP_SIGN_SSE4(14); } else { - SSE2_PSHUFD_XMM_to_XMM(regd, regd, 0x27); - SSE2_MOVD_XMM_to_R(EAX, regd); - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); - SSE_ORPS_XMM_to_XMM(regd, regTemp); - SSE2_MOVD_R_to_XMM(regTemp, EAX); - SSE_MOVSS_XMM_to_XMM(regd, regTemp); - SSE2_PSHUFD_XMM_to_XMM(regd, regd, 0x27); + xPSHUF.D(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); + xMOVD(eax, xRegisterSSE(regd)); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); + xMOVDZX(xRegisterSSE(regTemp), eax); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regTemp)); + xPSHUF.D(xRegisterSSE(regd), xRegisterSSE(regd), 0x27); } } void vFloat15(int regd, int regTemp) { //1111 - SSE_MINPS_M128_to_XMM(regd, (uptr)g_maxvals); - SSE_MAXPS_M128_to_XMM(regd, (uptr)g_minvals); + xMIN.PS(xRegisterSSE(regd), ptr[g_maxvals]); + xMAX.PS(xRegisterSSE(regd), ptr[g_minvals]); } void vFloat15c(int regd, int regTemp) { //1111 if ( x86caps.hasStreamingSIMD4Extensions ) { CLAMP_SIGN_SSE4(15); } else { - SSE_MOVAPS_XMM_to_XMM(regTemp, regd); - SSE_ANDPS_M128_to_XMM(regTemp, (uptr)&const_clip[4]); - SSE_MINPS_M128_to_XMM(regd, (uptr)&g_maxvals[0]); - SSE_MAXPS_M128_to_XMM(regd, (uptr)&g_minvals[0]); - SSE_ORPS_XMM_to_XMM(regd, regTemp); + xMOVAPS(xRegisterSSE(regTemp), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(regTemp), ptr[&const_clip[4]]); + xMIN.PS(xRegisterSSE(regd), ptr[&g_maxvals[0]]); + xMAX.PS(xRegisterSSE(regd), ptr[&g_minvals[0]]); + xOR.PS(xRegisterSSE(regd), xRegisterSSE(regTemp)); } } @@ -1691,14 +1691,14 @@ void vuFloat3(uptr x86ptr) { u8* pjmp; if( CHECK_VU_OVERFLOW ) { - CMP32ItoM(x86ptr, 0x7f800000 ); + xCMP(ptr32[(u32*)(x86ptr)], 0x7f800000 ); pjmp = JL8(0); // Signed Comparison - MOV32ItoM(x86ptr, 0x7f7fffff ); + xMOV(ptr32[(u32*)(x86ptr)], 0x7f7fffff ); x86SetJ8(pjmp); - CMP32ItoM(x86ptr, 0xff800000 ); + xCMP(ptr32[(u32*)(x86ptr)], 0xff800000 ); pjmp = JB8(0); // Unsigned Comparison - MOV32ItoM(x86ptr, 0xff7fffff ); + xMOV(ptr32[(u32*)(x86ptr)], 0xff7fffff ); x86SetJ8(pjmp); } } @@ -1709,17 +1709,17 @@ __aligned16 u64 vuFloatData[4]; void vuFloatExtra( int regd, int XYZW) { int t1reg = (regd == 0) ? (regd + 1) : (regd - 1); int t2reg = (regd <= 1) ? (regd + 2) : (regd - 2); - SSE_MOVAPS_XMM_to_M128( (uptr)&vuFloatData[0], t1reg ); - SSE_MOVAPS_XMM_to_M128( (uptr)&vuFloatData[2], t2reg ); + xMOVAPS(ptr[&vuFloatData[0]], xRegisterSSE(t1reg )); + xMOVAPS(ptr[&vuFloatData[2]], xRegisterSSE(t2reg )); - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPORDPS_XMM_to_XMM(t1reg, regd); - SSE_MOVAPS_XMM_to_XMM(t2reg, regd); - SSE_ANDPS_XMM_to_XMM(t2reg, t1reg); + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); + xCMPORD.PS(xRegisterSSE(t1reg), xRegisterSSE(regd)); + xMOVAPS(xRegisterSSE(t2reg), xRegisterSSE(regd)); + xAND.PS(xRegisterSSE(t2reg), xRegisterSSE(t1reg)); VU_MERGE_REGS_CUSTOM(regd, t2reg, XYZW); - SSE_MOVAPS_M128_to_XMM( t1reg, (uptr)&vuFloatData[0] ); - SSE_MOVAPS_M128_to_XMM( t2reg, (uptr)&vuFloatData[2] ); + xMOVAPS(xRegisterSSE(t1reg), ptr[&vuFloatData[0] ]); + xMOVAPS(xRegisterSSE(t2reg), ptr[&vuFloatData[2] ]); } static __aligned16 u32 tempRegX[] = {0x00000000, 0x00000000, 0x00000000, 0x00000000}; @@ -1738,6 +1738,6 @@ void testPrintOverflow() { // Outputs to the console when overflow has occured. void testWhenOverflow(int info, int regd, int t0reg) { - SSE_MOVAPS_XMM_to_M128((uptr)tempRegX, regd); - CALLFunc((uptr)testPrintOverflow); + xMOVAPS(ptr[tempRegX], xRegisterSSE(regd)); + xCALL((void*)(uptr)testPrintOverflow); } diff --git a/pcsx2/x86/sVU_Upper.cpp b/pcsx2/x86/sVU_Upper.cpp index a1733ae602..0b3da61ba8 100644 --- a/pcsx2/x86/sVU_Upper.cpp +++ b/pcsx2/x86/sVU_Upper.cpp @@ -176,7 +176,7 @@ void recUpdateFlags(VURegs * VU, int reg, int info) if (t1reg < 0) { //Console.WriteLn( "VU ALLOCATION ERROR: Temp reg can't be allocated!!!!" ); t1reg = (reg == 0) ? 1 : 0; // Make t1reg != reg - SSE_MOVAPS_XMM_to_M128( (uptr)TEMPXMMData, t1reg ); // Backup data to temp address + xMOVAPS(ptr[TEMPXMMData], xRegisterSSE(t1reg )); // Backup data to temp address t1regBoolean = 1; } else t1regBoolean = 0; @@ -186,9 +186,9 @@ void recUpdateFlags(VURegs * VU, int reg, int info) t1regBoolean = 2; } - SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x1B); // Flip wzyx to xyzw - MOV32MtoR(x86statflag, prevstataddr); // Load the previous status in to x86statflag - AND16ItoR(x86statflag, 0xff0); // Keep Sticky and D/I flags + xSHUF.PS(xRegisterSSE(reg), xRegisterSSE(reg), 0x1B); // Flip wzyx to xyzw + xMOV(xRegister32(x86statflag), ptr[(void*)(prevstataddr)]); // Load the previous status in to x86statflag + xAND(xRegister16(x86statflag), 0xff0); // Keep Sticky and D/I flags if (CHECK_VU_EXTRA_FLAGS) { // Checks all flags @@ -197,54 +197,54 @@ void recUpdateFlags(VURegs * VU, int reg, int info) //-------------------------Check for Overflow flags------------------------------ - //SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg - //SSE_CMPUNORDPS_XMM_to_XMM(t1reg, reg); // If reg == NaN then set Vector to 0xFFFFFFFF + //xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); // Clear t1reg + //xCMPUNORD.PS(xRegisterSSE(t1reg), xRegisterSSE(reg)); // If reg == NaN then set Vector to 0xFFFFFFFF - //SSE_MOVAPS_XMM_to_XMM(t1reg, reg); - //SSE_MINPS_M128_to_XMM(t1reg, (uptr)g_maxvals); - //SSE_MAXPS_M128_to_XMM(t1reg, (uptr)g_minvals); - //SSE_CMPNEPS_XMM_to_XMM(t1reg, reg); // If they're not equal, then overflow has occured + //xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(reg)); + //xMIN.PS(xRegisterSSE(t1reg), ptr[g_maxvals]); + //xMAX.PS(xRegisterSSE(t1reg), ptr[g_minvals]); + //xCMPNE.PS(xRegisterSSE(t1reg), xRegisterSSE(reg)); // If they're not equal, then overflow has occured - SSE_MOVAPS_XMM_to_XMM(t1reg, reg); - SSE_ANDPS_M128_to_XMM(t1reg, (uptr)VU_Zero_Helper_Mask); - SSE_CMPEQPS_M128_to_XMM(t1reg, (uptr)VU_Pos_Infinity); // If infinity, then overflow has occured (NaN's don't report as overflow) + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(reg)); + xAND.PS(xRegisterSSE(t1reg), ptr[VU_Zero_Helper_Mask]); + xCMPEQ.PS(xRegisterSSE(t1reg), ptr[VU_Pos_Infinity]); // If infinity, then overflow has occured (NaN's don't report as overflow) - SSE_MOVMSKPS_XMM_to_R32(x86macflag, t1reg); // Move the sign bits of the previous calculation + xMOVMSKPS(xRegister32(x86macflag), xRegisterSSE(t1reg)); // Move the sign bits of the previous calculation - AND16ItoR(x86macflag, _X_Y_Z_W ); // Grab "Has Overflowed" bits from the previous calculation (also make sure we're only grabbing from the XYZW being modified) + xAND(xRegister16(x86macflag), _X_Y_Z_W ); // Grab "Has Overflowed" bits from the previous calculation (also make sure we're only grabbing from the XYZW being modified) pjmp = JZ8(0); // Skip if none are - OR16ItoR(x86statflag, 0x208); // OS, O flags - SHL16ItoR(x86macflag, 12); + xOR(xRegister16(x86statflag), 0x208); // OS, O flags + xSHL(xRegister16(x86macflag), 12); if (_XYZW_SS) pjmp32 = JMP32(0); // Skip Underflow Check x86SetJ8(pjmp); //-------------------------Check for Underflow flags------------------------------ - SSE_MOVAPS_XMM_to_XMM(t1reg, reg); // t1reg <- reg + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(reg)); // t1reg <- reg - SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&VU_Underflow_Mask1[ 0 ]); - SSE_CMPEQPS_M128_to_XMM(t1reg, (uptr)&VU_Zero_Mask[ 0 ]); // If (t1reg == zero exponent) then set Vector to 0xFFFFFFFF + xAND.PS(xRegisterSSE(t1reg), ptr[&VU_Underflow_Mask1[ 0 ]]); + xCMPEQ.PS(xRegisterSSE(t1reg), ptr[&VU_Zero_Mask[ 0 ]]); // If (t1reg == zero exponent) then set Vector to 0xFFFFFFFF - SSE_ANDPS_XMM_to_XMM(t1reg, reg); - SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&VU_Underflow_Mask2[ 0 ]); - SSE_CMPNEPS_M128_to_XMM(t1reg, (uptr)&VU_Zero_Mask[ 0 ]); // If (t1reg != zero mantisa) then set Vector to 0xFFFFFFFF + xAND.PS(xRegisterSSE(t1reg), xRegisterSSE(reg)); + xAND.PS(xRegisterSSE(t1reg), ptr[&VU_Underflow_Mask2[ 0 ]]); + xCMPNE.PS(xRegisterSSE(t1reg), ptr[&VU_Zero_Mask[ 0 ]]); // If (t1reg != zero mantisa) then set Vector to 0xFFFFFFFF - SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation + xMOVMSKPS(eax, xRegisterSSE(t1reg)); // Move the sign bits of the previous calculation - AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Has Underflowed" bits from the previous calculation + xAND(ax, _X_Y_Z_W ); // Grab "Has Underflowed" bits from the previous calculation pjmp = JZ8(0); // Skip if none are - OR16ItoR(x86statflag, 0x104); // US, U flags - SHL16ItoR(EAX, 8); - OR32RtoR(x86macflag, EAX); + xOR(xRegister16(x86statflag), 0x104); // US, U flags + xSHL(ax, 8); + xOR(xRegister32(x86macflag), eax); x86SetJ8(pjmp); //-------------------------Optional Code: Denormals Are Zero------------------------------ if (CHECK_VU_UNDERFLOW) { // Sets underflow/denormals to zero - SSE_ANDNPS_XMM_to_XMM(t1reg, reg); // t1reg = !t1reg & reg (t1reg = denormals are positive zero) + xANDN.PS(xRegisterSSE(t1reg), xRegisterSSE(reg)); // t1reg = !t1reg & reg (t1reg = denormals are positive zero) VU_MERGE_REGS_SAFE(t1reg, reg, (15 - flipMask[_X_Y_Z_W])); // Send t1reg the vectors that shouldn't be modified (since reg was flipped, we need a mask to get the unmodified vectors) // Now we have Denormals are Positive Zero in t1reg; the next two lines take Signed Zero into account - SSE_ANDPS_M128_to_XMM(reg, (uptr)&VU_Signed_Zero_Mask[ 0 ]); // Only keep the sign bit for each vector - SSE_ORPS_XMM_to_XMM(reg, t1reg); // Denormals are Signed Zero, and unmodified vectors stay the same! + xAND.PS(xRegisterSSE(reg), ptr[&VU_Signed_Zero_Mask[ 0 ]]); // Only keep the sign bit for each vector + xOR.PS(xRegisterSSE(reg), xRegisterSSE(t1reg)); // Denormals are Signed Zero, and unmodified vectors stay the same! } if (_XYZW_SS) x86SetJ32(pjmp32); // If we skipped the Underflow Flag Checking (when we had an Overflow), return here @@ -253,26 +253,26 @@ void recUpdateFlags(VURegs * VU, int reg, int info) //-------------------------Check for Signed flags------------------------------ - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg - SSE_CMPEQPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is zero - SSE_MOVMSKPS_XMM_to_R32(x86temp, t1reg); // Used for Zero Flag Calculation + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); // Clear t1reg + xCMPEQ.PS(xRegisterSSE(t1reg), xRegisterSSE(reg)); // Set all F's if each vector is zero + xMOVMSKPS(xRegister32(x86temp), xRegisterSSE(t1reg)); // Used for Zero Flag Calculation - SSE_MOVMSKPS_XMM_to_R32(EAX, reg); // Move the sign bits of the t1reg + xMOVMSKPS(eax, xRegisterSSE(reg)); // Move the sign bits of the t1reg - AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation + xAND(ax, _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation pjmp = JZ8(0); // Skip if none are - OR16ItoR(x86statflag, 0x82); // SS, S flags - SHL16ItoR(EAX, 4); - OR32RtoR(x86macflag, EAX); + xOR(xRegister16(x86statflag), 0x82); // SS, S flags + xSHL(ax, 4); + xOR(xRegister32(x86macflag), eax); if (_XYZW_SS) pjmp2 = JMP8(0); // If negative and not Zero, we can skip the Zero Flag checking x86SetJ8(pjmp); //-------------------------Check for Zero flags------------------------------ - AND16ItoR(x86temp, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation + xAND(xRegister16(x86temp), _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation pjmp = JZ8(0); // Skip if none are - OR16ItoR(x86statflag, 0x41); // ZS, Z flags - OR32RtoR(x86macflag, x86temp); + xOR(xRegister16(x86statflag), 0x41); // ZS, Z flags + xOR(xRegister32(x86macflag), xRegister32(x86temp)); x86SetJ8(pjmp); _freeX86reg(x86temp); @@ -284,38 +284,38 @@ void recUpdateFlags(VURegs * VU, int reg, int info) //-------------------------Check for Signed flags------------------------------ // The following code makes sure the Signed Bit isn't set with Negative Zero - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg - SSE_CMPEQPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is zero - SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Used for Zero Flag Calculation - SSE_ANDNPS_XMM_to_XMM(t1reg, reg); + xXOR.PS(xRegisterSSE(t1reg), xRegisterSSE(t1reg)); // Clear t1reg + xCMPEQ.PS(xRegisterSSE(t1reg), xRegisterSSE(reg)); // Set all F's if each vector is zero + xMOVMSKPS(eax, xRegisterSSE(t1reg)); // Used for Zero Flag Calculation + xANDN.PS(xRegisterSSE(t1reg), xRegisterSSE(reg)); - SSE_MOVMSKPS_XMM_to_R32(x86macflag, t1reg); // Move the sign bits of the t1reg + xMOVMSKPS(xRegister32(x86macflag), xRegisterSSE(t1reg)); // Move the sign bits of the t1reg - AND16ItoR(x86macflag, _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation + xAND(xRegister16(x86macflag), _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation pjmp = JZ8(0); // Skip if none are - OR16ItoR(x86statflag, 0x82); // SS, S flags - SHL16ItoR(x86macflag, 4); + xOR(xRegister16(x86statflag), 0x82); // SS, S flags + xSHL(xRegister16(x86macflag), 4); if (_XYZW_SS) pjmp2 = JMP8(0); // If negative and not Zero, we can skip the Zero Flag checking x86SetJ8(pjmp); //-------------------------Check for Zero flags------------------------------ - AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation + xAND(ax, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation pjmp = JZ8(0); // Skip if none are - OR16ItoR(x86statflag, 0x41); // ZS, Z flags - OR32RtoR(x86macflag, EAX); + xOR(xRegister16(x86statflag), 0x41); // ZS, Z flags + xOR(xRegister32(x86macflag), eax); x86SetJ8(pjmp); } //-------------------------Finally: Send the Flags to the Mac Flag Address------------------------------ if (_XYZW_SS) x86SetJ8(pjmp2); // If we skipped the Zero Flag Checking, return here - if (t1regBoolean == 2) SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x1B); // Flip back reg to wzyx (have to do this because reg != EEREC_TEMP) - else if (t1regBoolean == 1) SSE_MOVAPS_M128_to_XMM( t1reg, (uptr)TEMPXMMData ); // Restore data from temo address + if (t1regBoolean == 2) xSHUF.PS(xRegisterSSE(reg), xRegisterSSE(reg), 0x1B); // Flip back reg to wzyx (have to do this because reg != EEREC_TEMP) + else if (t1regBoolean == 1) xMOVAPS(xRegisterSSE(t1reg), ptr[TEMPXMMData ]); // Restore data from temo address else _freeXMMreg(t1reg); // Free temp reg - MOV16RtoM(macaddr, x86macflag); - MOV16RtoM(stataddr, x86statflag); + xMOV(ptr[(void*)(macaddr)], xRegister16(x86macflag)); + xMOV(ptr[(void*)(stataddr)], xRegister16(x86statflag)); _freeX86reg(x86macflag); _freeX86reg(x86statflag); @@ -337,7 +337,7 @@ void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info) { u8 *localptr[4][8]; - MOV32RtoM((uptr)&tempECX, ECX); + xMOV(ptr[&tempECX], ecx); int temp1 = ECX; //receives regd int temp2 = ALLOCTEMPX86(0); @@ -348,54 +348,54 @@ void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info) _freeX86reg(ECX); } - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[0][0], regd); - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[1][0], regt); + xMOVAPS(ptr[&VU_addsub_reg[0][0]], xRegisterSSE(regd)); + xMOVAPS(ptr[&VU_addsub_reg[1][0]], xRegisterSSE(regt)); - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsuband[0][0], regd); - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsuband[1][0], regd); - SSE_MOVAPS_M128_to_XMM(regd, (uptr)&VU_addsub_reg[0][0]); + xPCMP.EQB(xRegisterSSE(regd), xRegisterSSE(regd)); + xMOVAPS(ptr[&VU_addsuband[0][0]], xRegisterSSE(regd)); + xMOVAPS(ptr[&VU_addsuband[1][0]], xRegisterSSE(regd)); + xMOVAPS(xRegisterSSE(regd), ptr[&VU_addsub_reg[0][0]]); - SSE2_PSLLD_I8_to_XMM(regd, 1); - SSE2_PSLLD_I8_to_XMM(regt, 1); + xPSLL.D(xRegisterSSE(regd), 1); + xPSLL.D(xRegisterSSE(regt), 1); - SSE2_PSRLD_I8_to_XMM(regd, 24); - SSE2_PSRLD_I8_to_XMM(regt, 24); + xPSRL.D(xRegisterSSE(regd), 24); + xPSRL.D(xRegisterSSE(regt), 24); - SSE2_PSUBD_XMM_to_XMM(regd, regt); + xPSUB.D(xRegisterSSE(regd), xRegisterSSE(regt)); #define PERFORM(i) \ \ - SSE_PEXTRW_XMM_to_R32(temp1, regd, i*2); \ - MOVSX32R16toR(temp1, temp1); \ - CMP32ItoR(temp1, 25);\ + xPEXTR.W(xRegister32(temp1), xRegisterSSE(regd), i*2); \ + xMOVSX(xRegister32(temp1), xRegister16(temp1)); \ + xCMP(xRegister32(temp1), 25);\ localptr[i][0] = JGE8(0);\ - CMP32ItoR(temp1, 0);\ + xCMP(xRegister32(temp1), 0);\ localptr[i][1] = JG8(0);\ localptr[i][2] = JE8(0);\ - CMP32ItoR(temp1, -25);\ + xCMP(xRegister32(temp1), -25);\ localptr[i][3] = JLE8(0);\ \ - NEG32R(temp1); \ - DEC32R(temp1);\ - MOV32ItoR(temp2, 0xffffffff); \ - SHL32CLtoR(temp2); \ - MOV32RtoM((uptr)&VU_addsuband[0][i], temp2);\ + xNEG(xRegister32(temp1)); \ + xDEC(xRegister32(temp1));\ + xMOV(xRegister32(temp2), 0xffffffff); \ + xSHL(xRegister32(temp2), cl); \ + xMOV(ptr[&VU_addsuband[0][i]], xRegister32(temp2));\ localptr[i][4] = JMP8(0);\ \ x86SetJ8(localptr[i][0]);\ - MOV32ItoM((uptr)&VU_addsuband[1][i], 0x80000000);\ + xMOV(ptr32[&VU_addsuband[1][i]], 0x80000000);\ localptr[i][5] = JMP8(0);\ \ x86SetJ8(localptr[i][1]);\ - DEC32R(temp1);\ - MOV32ItoR(temp2, 0xffffffff);\ - SHL32CLtoR(temp2); \ - MOV32RtoM((uptr)&VU_addsuband[1][i], temp2);\ + xDEC(xRegister32(temp1));\ + xMOV(xRegister32(temp2), 0xffffffff);\ + xSHL(xRegister32(temp2), cl); \ + xMOV(ptr[&VU_addsuband[1][i]], xRegister32(temp2));\ localptr[i][6] = JMP8(0);\ \ x86SetJ8(localptr[i][3]);\ - MOV32ItoM((uptr)&VU_addsuband[0][i], 0x80000000);\ + xMOV(ptr32[&VU_addsuband[0][i]], 0x80000000);\ localptr[i][7] = JMP8(0);\ \ x86SetJ8(localptr[i][2]);\ @@ -411,20 +411,20 @@ void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info) PERFORM(3); #undef PERFORM - SSE_MOVAPS_M128_to_XMM(regd, (uptr)&VU_addsub_reg[0][0]); - SSE_MOVAPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); + xMOVAPS(xRegisterSSE(regd), ptr[&VU_addsub_reg[0][0]]); + xMOVAPS(xRegisterSSE(regt), ptr[&VU_addsub_reg[1][0]]); - SSE_ANDPS_M128_to_XMM(regd, (uptr)&VU_addsuband[0][0]); - SSE_ANDPS_M128_to_XMM(regt, (uptr)&VU_addsuband[1][0]); + xAND.PS(xRegisterSSE(regd), ptr[&VU_addsuband[0][0]]); + xAND.PS(xRegisterSSE(regt), ptr[&VU_addsuband[1][0]]); - if (is_sub) SSE_SUBPS_XMM_to_XMM(regd, regt); - else SSE_ADDPS_XMM_to_XMM(regd, regt); + if (is_sub) xSUB.PS(xRegisterSSE(regd), xRegisterSSE(regt)); + else xADD.PS(xRegisterSSE(regd), xRegisterSSE(regt)); - SSE_MOVAPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); + xMOVAPS(xRegisterSSE(regt), ptr[&VU_addsub_reg[1][0]]); _freeX86reg(temp2); - MOV32MtoR(ECX, (uptr)&tempECX); + xMOV(ecx, ptr[&tempECX]); } void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info) @@ -432,7 +432,7 @@ void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info) u8 *localptr[8]; u32 addrt = regt; //for case is_mem - MOV32RtoM((uptr)&tempECX, ECX); + xMOV(ptr[&tempECX], ecx); int temp1 = ECX; //receives regd int temp2 = ALLOCTEMPX86(0); @@ -443,90 +443,90 @@ void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info) _freeX86reg(ECX); } - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[0][0], regd); - if (!is_mem) SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[1][0], regt); + xMOVAPS(ptr[&VU_addsub_reg[0][0]], xRegisterSSE(regd)); + if (!is_mem) xMOVAPS(ptr[&VU_addsub_reg[1][0]], xRegisterSSE(regt)); - SSE2_MOVD_XMM_to_R(temp1, regd); - SHR32ItoR(temp1, 23); + xMOVD(xRegister32(temp1), xRegisterSSE(regd)); + xSHR(xRegister32(temp1), 23); if (is_mem) { - MOV32MtoR(temp2, addrt); - MOV32RtoM((uptr)&VU_addsub_reg[1][0], temp2); - SHR32ItoR(temp2, 23); + xMOV(xRegister32(temp2), ptr[(void*)(addrt)]); + xMOV(ptr[&VU_addsub_reg[1][0]], xRegister32(temp2)); + xSHR(xRegister32(temp2), 23); } else { - SSE2_MOVD_XMM_to_R(temp2, regt); - SHR32ItoR(temp2, 23); + xMOVD(xRegister32(temp2), xRegisterSSE(regt)); + xSHR(xRegister32(temp2), 23); } - AND32ItoR(temp1, 0xff); - AND32ItoR(temp2, 0xff); + xAND(xRegister32(temp1), 0xff); + xAND(xRegister32(temp2), 0xff); - SUB32RtoR(temp1, temp2); //temp1 = exponent difference + xSUB(xRegister32(temp1), xRegister32(temp2)); //temp1 = exponent difference - CMP32ItoR(temp1, 25); + xCMP(xRegister32(temp1), 25); localptr[0] = JGE8(0); - CMP32ItoR(temp1, 0); + xCMP(xRegister32(temp1), 0); localptr[1] = JG8(0); localptr[2] = JE8(0); - CMP32ItoR(temp1, -25); + xCMP(xRegister32(temp1), -25); localptr[3] = JLE8(0); - NEG32R(temp1); - DEC32R(temp1); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); + xNEG(xRegister32(temp1)); + xDEC(xRegister32(temp1)); + xMOV(xRegister32(temp2), 0xffffffff); + xSHL(xRegister32(temp2), cl); + xPCMP.EQB(xRegisterSSE(regd), xRegisterSSE(regd)); if (is_mem) { - SSE_PINSRW_R32_to_XMM(regd, temp2, 0); - SHR32ItoR(temp2, 16); - SSE_PINSRW_R32_to_XMM(regd, temp2, 1); + xPINSR.W(xRegisterSSE(regd), xRegister32(temp2), 0); + xSHR(xRegister32(temp2), 16); + xPINSR.W(xRegisterSSE(regd), xRegister32(temp2), 1); } else { - SSE2_MOVD_R_to_XMM(regt, temp2); - SSE_MOVSS_XMM_to_XMM(regd, regt); - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); + xMOVDZX(xRegisterSSE(regt), xRegister32(temp2)); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regt)); + xPCMP.EQB(xRegisterSSE(regt), xRegisterSSE(regt)); } localptr[4] = JMP8(0); x86SetJ8(localptr[0]); - MOV32ItoR(temp2, 0x80000000); + xMOV(xRegister32(temp2), 0x80000000); if (is_mem) - AND32RtoM((uptr)&VU_addsub_reg[1][0], temp2); + xAND(ptr[&VU_addsub_reg[1][0]], xRegister32(temp2)); else { - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); - SSE2_MOVD_R_to_XMM(regd, temp2); - SSE_MOVSS_XMM_to_XMM(regt, regd); + xPCMP.EQB(xRegisterSSE(regt), xRegisterSSE(regt)); + xMOVDZX(xRegisterSSE(regd), xRegister32(temp2)); + xMOVSS(xRegisterSSE(regt), xRegisterSSE(regd)); } - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); + xPCMP.EQB(xRegisterSSE(regd), xRegisterSSE(regd)); localptr[5] = JMP8(0); x86SetJ8(localptr[1]); - DEC32R(temp1); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); + xDEC(xRegister32(temp1)); + xMOV(xRegister32(temp2), 0xffffffff); + xSHL(xRegister32(temp2), cl); if (is_mem) - AND32RtoM((uptr)&VU_addsub_reg[1][0], temp2); + xAND(ptr[&VU_addsub_reg[1][0]], xRegister32(temp2)); else { - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); - SSE2_MOVD_R_to_XMM(regd, temp2); - SSE_MOVSS_XMM_to_XMM(regt, regd); + xPCMP.EQB(xRegisterSSE(regt), xRegisterSSE(regt)); + xMOVDZX(xRegisterSSE(regd), xRegister32(temp2)); + xMOVSS(xRegisterSSE(regt), xRegisterSSE(regd)); } - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); + xPCMP.EQB(xRegisterSSE(regd), xRegisterSSE(regd)); localptr[6] = JMP8(0); x86SetJ8(localptr[3]); - MOV32ItoR(temp2, 0x80000000); - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); + xMOV(xRegister32(temp2), 0x80000000); + xPCMP.EQB(xRegisterSSE(regd), xRegisterSSE(regd)); if (is_mem) { - SSE_PINSRW_R32_to_XMM(regd, temp2, 0); - SHR32ItoR(temp2, 16); - SSE_PINSRW_R32_to_XMM(regd, temp2, 1); + xPINSR.W(xRegisterSSE(regd), xRegister32(temp2), 0); + xSHR(xRegister32(temp2), 16); + xPINSR.W(xRegisterSSE(regd), xRegister32(temp2), 1); } else { - SSE2_MOVD_R_to_XMM(regt, temp2); - SSE_MOVSS_XMM_to_XMM(regd, regt); - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); + xMOVDZX(xRegisterSSE(regt), xRegister32(temp2)); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(regt)); + xPCMP.EQB(xRegisterSSE(regt), xRegisterSSE(regt)); } localptr[7] = JMP8(0); @@ -538,62 +538,62 @@ void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info) if (is_mem) { - SSE_ANDPS_M128_to_XMM(regd, (uptr)&VU_addsub_reg[0][0]); //regd contains mask + xAND.PS(xRegisterSSE(regd), ptr[&VU_addsub_reg[0][0]]); //regd contains mask - if (is_sub) SSE_SUBSS_M32_to_XMM(regd, (uptr)&VU_addsub_reg[1][0]); - else SSE_ADDSS_M32_to_XMM(regd, (uptr)&VU_addsub_reg[1][0]); + if (is_sub) xSUB.SS(xRegisterSSE(regd), ptr[&VU_addsub_reg[1][0]]); + else xADD.SS(xRegisterSSE(regd), ptr[&VU_addsub_reg[1][0]]); } else { - SSE_ANDPS_M128_to_XMM(regd, (uptr)&VU_addsub_reg[0][0]); //regd contains mask - SSE_ANDPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); //regt contains mask + xAND.PS(xRegisterSSE(regd), ptr[&VU_addsub_reg[0][0]]); //regd contains mask + xAND.PS(xRegisterSSE(regt), ptr[&VU_addsub_reg[1][0]]); //regt contains mask - if (is_sub) SSE_SUBSS_XMM_to_XMM(regd, regt); - else SSE_ADDSS_XMM_to_XMM(regd, regt); + if (is_sub) xSUB.SS(xRegisterSSE(regd), xRegisterSSE(regt)); + else xADD.SS(xRegisterSSE(regd), xRegisterSSE(regt)); - SSE_MOVAPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); + xMOVAPS(xRegisterSSE(regt), ptr[&VU_addsub_reg[1][0]]); } _freeX86reg(temp2); - MOV32MtoR(ECX, (uptr)&tempECX); + xMOV(ecx, ptr[&tempECX]); } void SSE_ADDPS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { VU_ADD_SUB(regd, regt, 0, info); } - else SSE_ADDPS_XMM_to_XMM(regd, regt); + else xADD.PS(xRegisterSSE(regd), xRegisterSSE(regt)); } void SSE_SUBPS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { VU_ADD_SUB(regd, regt, 1, info); } - else SSE_SUBPS_XMM_to_XMM(regd, regt); + else xSUB.PS(xRegisterSSE(regd), xRegisterSSE(regt)); } void SSE_ADDSS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { VU_ADD_SUB_SS(regd, regt, 0, 0, info); } - else SSE_ADDSS_XMM_to_XMM(regd, regt); + else xADD.SS(xRegisterSSE(regd), xRegisterSSE(regt)); } void SSE_SUBSS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { VU_ADD_SUB_SS(regd, regt, 1, 0, info); } - else SSE_SUBSS_XMM_to_XMM(regd, regt); + else xSUB.SS(xRegisterSSE(regd), xRegisterSSE(regt)); } void SSE_ADDSS_M32_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { VU_ADD_SUB_SS(regd, regt, 0, 1, info); } - else SSE_ADDSS_M32_to_XMM(regd, regt); + else xADD.SS(xRegisterSSE(regd), ptr[(void*)(regt)]); } void SSE_SUBSS_M32_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { VU_ADD_SUB_SS(regd, regt, 1, 1, info); } - else SSE_SUBSS_M32_to_XMM(regd, regt); + else xSUB.SS(xRegisterSSE(regd), ptr[(void*)(regt)]); } //------------------------------------------------------------------ @@ -615,11 +615,11 @@ void recVUMI_ABS(VURegs *VU, int info) if ((_X_Y_Z_W == 0x8) || (_X_Y_Z_W == 0xf)) { VU_MERGE_REGS(EEREC_T, EEREC_S); - SSE_ANDPS_M128_to_XMM(EEREC_T, (uptr)&const_abs_table[ _X_Y_Z_W ][ 0 ] ); + xAND.PS(xRegisterSSE(EEREC_T), ptr[&const_abs_table[ _X_Y_Z_W ][ 0 ] ]); } else { // Use a temp reg because VU_MERGE_REGS() modifies source reg! - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_abs_table[ _X_Y_Z_W ][ 0 ] ); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_abs_table[ _X_Y_Z_W ][ 0 ] ]); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } } @@ -638,10 +638,10 @@ void recVUMI_ADD(VURegs *VU, int info) if ( _Fs_ == 0 && _Ft_ == 0 ) { // if adding VF00 with VF00, then the result is always 0,0,0,2 if ( _X_Y_Z_W != 0xf ) { - SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)s_two); + xMOVAPS(xRegisterSSE(EEREC_TEMP), ptr[s_two]); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } - else SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)s_two); + else xMOVAPS(xRegisterSSE(EEREC_D), ptr[s_two]); } else { if (CHECK_VU_EXTRA_OVERFLOW) { @@ -649,24 +649,24 @@ void recVUMI_ADD(VURegs *VU, int info) if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); } if( _X_Y_Z_W == 8 ) { // If only adding x, then we can do a Scalar Add - if (EEREC_D == EEREC_S) SSE_ADDSS_XMM_to_XMM(EEREC_D, EEREC_T); - else if (EEREC_D == EEREC_T) SSE_ADDSS_XMM_to_XMM(EEREC_D, EEREC_S); + if (EEREC_D == EEREC_S) xADD.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if (EEREC_D == EEREC_T) xADD.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_ADDSS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else if (_X_Y_Z_W != 0xf) { // If xyzw != 1111, then we have to use a temp reg - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { // All xyzw being modified (xyzw == 1111) - if (EEREC_D == EEREC_S) SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_T); - else if (EEREC_D == EEREC_T) SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); + if (EEREC_D == EEREC_S) xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if (EEREC_D == EEREC_T) xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } } @@ -687,24 +687,24 @@ void recVUMI_ADD_iq(VURegs *VU, uptr addr, int info) if ( _XYZW_SS ) { if ( EEREC_D == EEREC_TEMP ) { _vuFlipRegSS(VU, EEREC_S); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_ADDSS_M32_to_XMM(EEREC_D, addr); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_S); _vuFlipRegSS(VU, EEREC_D); // have to flip over EEREC_D for computing flags! } else if ( EEREC_D == EEREC_S ) { _vuFlipRegSS(VU, EEREC_D); - SSE_ADDSS_M32_to_XMM(EEREC_D, addr); + xADD.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_D); } else { if ( _X ) { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); SSE_ADDSS_M32_to_XMM_custom(info, EEREC_D, addr); } else { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); SSE_ADDPS_XMM_to_XMM_custom(info, EEREC_TEMP, EEREC_S); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } @@ -712,21 +712,21 @@ void recVUMI_ADD_iq(VURegs *VU, uptr addr, int info) } else { if ( (_X_Y_Z_W != 0xf) || (EEREC_D == EEREC_S) || (EEREC_D == EEREC_TEMP) ) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); } if (_X_Y_Z_W != 0xf) { - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { - if ( EEREC_D == EEREC_TEMP ) SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); - else if ( EEREC_D == EEREC_S ) SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + if ( EEREC_D == EEREC_TEMP ) xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + else if ( EEREC_D == EEREC_S ) xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); else { - SSE_MOVSS_M32_to_XMM(EEREC_D, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_D, EEREC_D, 0x00); - SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x00); + xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } } @@ -747,23 +747,23 @@ void recVUMI_ADD_xyzw(VURegs *VU, int xyzw, int info) if ( _Ft_ == 0 && xyzw < 3 ) { // just move since adding zero if ( _X_Y_Z_W == 0x8 ) { VU_MERGE_REGS(EEREC_D, EEREC_S); } else if ( _X_Y_Z_W != 0xf ) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } - else SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S); + else xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else if ( _X_Y_Z_W == 8 && (EEREC_D != EEREC_TEMP) ) { if ( xyzw == 0 ) { - if ( EEREC_D == EEREC_T ) SSE_ADDSS_XMM_to_XMM(EEREC_D, EEREC_S); + if ( EEREC_D == EEREC_T ) xADD.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_ADDSS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_ADDSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } } else if( _Fs_ == 0 && !_W ) { // just move @@ -773,13 +773,13 @@ void recVUMI_ADD_xyzw(VURegs *VU, int xyzw, int info) else { if ( _X_Y_Z_W != 0xf ) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { - if( EEREC_D == EEREC_TEMP ) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); } - else if( EEREC_D == EEREC_S ) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); } - else { _unpackVF_xyzw(EEREC_D, EEREC_T, xyzw); SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); } + if( EEREC_D == EEREC_TEMP ) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } + else if( EEREC_D == EEREC_S ) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } + else { _unpackVF_xyzw(EEREC_D, EEREC_T, xyzw); xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } } flagUpdate: @@ -808,25 +808,25 @@ void recVUMI_ADDA(VURegs *VU, int info) } if( _X_Y_Z_W == 8 ) { - if (EEREC_ACC == EEREC_S) SSE_ADDSS_XMM_to_XMM(EEREC_ACC, EEREC_T); // Can this case happen? (cottonvibes) - else if (EEREC_ACC == EEREC_T) SSE_ADDSS_XMM_to_XMM(EEREC_ACC, EEREC_S); // Can this case happen? + if (EEREC_ACC == EEREC_S) xADD.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); // Can this case happen? (cottonvibes) + else if (EEREC_ACC == EEREC_T) xADD.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); // Can this case happen? else { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_ADDSS_XMM_to_XMM(EEREC_ACC, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); VU_MERGE_REGS(EEREC_ACC, EEREC_TEMP); } else { - if( EEREC_ACC == EEREC_S ) SSE_ADDPS_XMM_to_XMM(EEREC_ACC, EEREC_T); // Can this case happen? - else if( EEREC_ACC == EEREC_T ) SSE_ADDPS_XMM_to_XMM(EEREC_ACC, EEREC_S); // Can this case happen? + if( EEREC_ACC == EEREC_S ) xADD.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); // Can this case happen? + else if( EEREC_ACC == EEREC_T ) xADD.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); // Can this case happen? else { - SSE_MOVAPS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_ADDPS_XMM_to_XMM(EEREC_ACC, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xADD.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); } } flagUpdate: @@ -846,38 +846,38 @@ void recVUMI_ADDA_iq(VURegs *VU, uptr addr, int info) assert( EEREC_ACC != EEREC_TEMP ); if( EEREC_ACC == EEREC_S ) { _vuFlipRegSS(VU, EEREC_ACC); - SSE_ADDSS_M32_to_XMM(EEREC_ACC, addr); + xADD.SS(xRegisterSSE(EEREC_ACC), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_ACC); } else { if( _X ) { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_ADDSS_M32_to_XMM(EEREC_ACC, addr); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_ACC), ptr[(void*)(addr)]); } else { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_ACC, EEREC_TEMP); } } } else { if( _X_Y_Z_W != 0xf || EEREC_ACC == EEREC_S ) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); } if (_X_Y_Z_W != 0xf) { - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_ACC, EEREC_TEMP); } else { - if( EEREC_ACC == EEREC_S ) SSE_ADDPS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + if( EEREC_ACC == EEREC_S ) xADD.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); else { - SSE_MOVSS_M32_to_XMM(EEREC_ACC, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_ACC, EEREC_ACC, 0x00); - SSE_ADDPS_XMM_to_XMM(EEREC_ACC, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_ACC), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_ACC), 0x00); + xADD.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); } } } @@ -897,17 +897,17 @@ void recVUMI_ADDA_xyzw(VURegs *VU, int xyzw, int info) if( _X_Y_Z_W == 8 ) { assert( EEREC_ACC != EEREC_T ); if( xyzw == 0 ) { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_ADDSS_XMM_to_XMM(EEREC_ACC, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); } else { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); if( _Fs_ == 0 ) { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_ADDSS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xADD.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); } } } @@ -916,14 +916,14 @@ void recVUMI_ADDA_xyzw(VURegs *VU, int xyzw, int info) _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); if (_X_Y_Z_W != 0xf) { - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_ACC, EEREC_TEMP); } else { - if( EEREC_ACC == EEREC_S ) SSE_ADDPS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + if( EEREC_ACC == EEREC_S ) xADD.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); else { _unpackVF_xyzw(EEREC_ACC, EEREC_T, xyzw); - SSE_ADDPS_XMM_to_XMM(EEREC_ACC, EEREC_S); + xADD.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); } } } @@ -950,8 +950,8 @@ void recVUMI_SUB(VURegs *VU, int info) if ( !_Fd_ ) info = (info & ~PROCESS_EE_SET_D(0xf)) | PROCESS_EE_SET_D(EEREC_TEMP); if( EEREC_S == EEREC_T ) { - if (_X_Y_Z_W != 0xf) SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&SSEmovMask[15-_X_Y_Z_W][0]); - else SSE_XORPS_XMM_to_XMM(EEREC_D, EEREC_D); + if (_X_Y_Z_W != 0xf) xAND.PS(xRegisterSSE(EEREC_D), ptr[(&SSEmovMask[15-_X_Y_Z_W][0])]); + else xXOR.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else if( _X_Y_Z_W == 8 ) { if (CHECK_VU_EXTRA_OVERFLOW) { @@ -959,19 +959,19 @@ void recVUMI_SUB(VURegs *VU, int info) if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); } if (EEREC_D == EEREC_S) { - if (_Ft_) SSE_SUBSS_XMM_to_XMM(EEREC_D, EEREC_T); + if (_Ft_) xSUB.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if (EEREC_D == EEREC_T) { if (_Ft_) { - SSE_MOVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SUBSS_XMM_to_XMM(EEREC_TEMP, EEREC_T); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } - else SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); + else xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - if (_Ft_) SSE_SUBSS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + if (_Ft_) xSUB.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { @@ -980,21 +980,21 @@ void recVUMI_SUB(VURegs *VU, int info) if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); } if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - if( ( _Ft_ > 0 ) || _W ) SSE_SUBPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + if( ( _Ft_ > 0 ) || _W ) xSUB.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { - if (EEREC_D == EEREC_S) SSE_SUBPS_XMM_to_XMM(EEREC_D, EEREC_T); + if (EEREC_D == EEREC_S) xSUB.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); else if (EEREC_D == EEREC_T) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); - SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); + xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } } @@ -1015,59 +1015,59 @@ void recVUMI_SUB_iq(VURegs *VU, uptr addr, int info) if( _XYZW_SS ) { if( EEREC_D == EEREC_TEMP ) { _vuFlipRegSS(VU, EEREC_S); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_SUBSS_M32_to_XMM(EEREC_D, addr); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_S); _vuFlipRegSS(VU, EEREC_D); } else if( EEREC_D == EEREC_S ) { _vuFlipRegSS(VU, EEREC_D); - SSE_SUBSS_M32_to_XMM(EEREC_D, addr); + xSUB.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_D); } else { if( _X ) { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_SUBSS_M32_to_XMM(EEREC_D, addr); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); } else { _vuMoveSS(VU, EEREC_TEMP, EEREC_S); _vuFlipRegSS(VU, EEREC_D); - SSE_SUBSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xSUB.SS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); _vuFlipRegSS(VU, EEREC_D); } } } else { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); if (_X_Y_Z_W != 0xf) { int t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { - SSE_MOVAPS_XMM_to_XMM(t1reg, EEREC_S); - SSE_SUBPS_XMM_to_XMM(t1reg, EEREC_TEMP); + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); VU_MERGE_REGS(EEREC_D, t1reg); _freeXMMreg(t1reg); } else { // negate - SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } } else { if( EEREC_D == EEREC_TEMP ) { - SSE_XORPS_M128_to_XMM(EEREC_D, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); + xXOR.PS(xRegisterSSE(EEREC_D), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } } } @@ -1087,23 +1087,23 @@ void recVUMI_SUB_xyzw(VURegs *VU, int xyzw, int info) if ( _X_Y_Z_W == 8 ) { if ( (xyzw == 0) && (_Ft_ == _Fs_) ) { - SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&SSEmovMask[7][0]); + xAND.PS(xRegisterSSE(EEREC_D), ptr[&SSEmovMask[7][0]]); } else if ( EEREC_D == EEREC_TEMP ) { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); if ( (_Ft_ > 0) || (xyzw == 3) ) { _vuFlipRegSS_xyzw(EEREC_T, xyzw); - SSE_SUBSS_XMM_to_XMM(EEREC_D, EEREC_T); + xSUB.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); _vuFlipRegSS_xyzw(EEREC_T, xyzw); } } else { if ( (_Ft_ > 0) || (xyzw == 3) ) { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_SUBSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } - else SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); + else xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } else { @@ -1113,27 +1113,27 @@ void recVUMI_SUB_xyzw(VURegs *VU, int xyzw, int info) int t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { - SSE_MOVAPS_XMM_to_XMM(t1reg, EEREC_S); - SSE_SUBPS_XMM_to_XMM(t1reg, EEREC_TEMP); + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); VU_MERGE_REGS(EEREC_D, t1reg); _freeXMMreg(t1reg); } else { // negate - SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } } else { if( EEREC_D == EEREC_TEMP ) { - SSE_XORPS_M128_to_XMM(EEREC_D, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_D, EEREC_S); + xXOR.PS(xRegisterSSE(EEREC_D), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } } } @@ -1163,37 +1163,37 @@ void recVUMI_SUBA(VURegs *VU, int info) } if( EEREC_S == EEREC_T ) { - if (_X_Y_Z_W != 0xf) SSE_ANDPS_M128_to_XMM(EEREC_ACC, (uptr)&SSEmovMask[15-_X_Y_Z_W][0]); - else SSE_XORPS_XMM_to_XMM(EEREC_ACC, EEREC_ACC); + if (_X_Y_Z_W != 0xf) xAND.PS(xRegisterSSE(EEREC_ACC), ptr[(&SSEmovMask[15-_X_Y_Z_W][0])]); + else xXOR.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_ACC)); } else if( _X_Y_Z_W == 8 ) { - if (EEREC_ACC == EEREC_S) SSE_SUBSS_XMM_to_XMM(EEREC_ACC, EEREC_T); + if (EEREC_ACC == EEREC_S) xSUB.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); else if (EEREC_ACC == EEREC_T) { - SSE_MOVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SUBSS_XMM_to_XMM(EEREC_TEMP, EEREC_T); - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_SUBSS_XMM_to_XMM(EEREC_ACC, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); VU_MERGE_REGS(EEREC_ACC, EEREC_TEMP); } else { - if( EEREC_ACC == EEREC_S ) SSE_SUBPS_XMM_to_XMM(EEREC_ACC, EEREC_T); + if( EEREC_ACC == EEREC_S ) xSUB.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); else if( EEREC_ACC == EEREC_T ) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); - SSE_MOVAPS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); + xMOVAPS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_ACC, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); } } flagUpdate: @@ -1211,47 +1211,47 @@ void recVUMI_SUBA_iq(VURegs *VU, uptr addr, int info) if( _XYZW_SS ) { if( EEREC_ACC == EEREC_S ) { _vuFlipRegSS(VU, EEREC_ACC); - SSE_SUBSS_M32_to_XMM(EEREC_ACC, addr); + xSUB.SS(xRegisterSSE(EEREC_ACC), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_ACC); } else { if( _X ) { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_SUBSS_M32_to_XMM(EEREC_ACC, addr); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_ACC), ptr[(void*)(addr)]); } else { _vuMoveSS(VU, EEREC_TEMP, EEREC_S); _vuFlipRegSS(VU, EEREC_ACC); - SSE_SUBSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xSUB.SS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); _vuFlipRegSS(VU, EEREC_ACC); } } } else { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); if (_X_Y_Z_W != 0xf) { int t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { - SSE_MOVAPS_XMM_to_XMM(t1reg, EEREC_S); - SSE_SUBPS_XMM_to_XMM(t1reg, EEREC_TEMP); + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); VU_MERGE_REGS(EEREC_ACC, t1reg); _freeXMMreg(t1reg); } else { // negate - SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_ACC, EEREC_TEMP); } } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); } } recUpdateFlags(VU, EEREC_ACC, info); @@ -1267,13 +1267,13 @@ void recVUMI_SUBA_xyzw(VURegs *VU, int xyzw, int info) if( _X_Y_Z_W == 8 ) { if( xyzw == 0 ) { - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_SUBSS_XMM_to_XMM(EEREC_ACC, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_T)); } else { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MOVSS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_SUBSS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xSUB.SS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); } } else { @@ -1283,22 +1283,22 @@ void recVUMI_SUBA_xyzw(VURegs *VU, int xyzw, int info) int t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { - SSE_MOVAPS_XMM_to_XMM(t1reg, EEREC_S); - SSE_SUBPS_XMM_to_XMM(t1reg, EEREC_TEMP); + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); VU_MERGE_REGS(EEREC_ACC, t1reg); _freeXMMreg(t1reg); } else { // negate - SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_ACC, EEREC_TEMP); } } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_ACC, EEREC_S); - SSE_SUBPS_XMM_to_XMM(EEREC_ACC, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_S)); + xSUB.PS(xRegisterSSE(EEREC_ACC), xRegisterSSE(EEREC_TEMP)); } } recUpdateFlags(VU, EEREC_ACC, info); @@ -1325,34 +1325,34 @@ void recVUMI_MUL_toD(VURegs *VU, int regd, int info) } if (_X_Y_Z_W == 1 && (_Ft_ == 0 || _Fs_==0) ) { // W - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, _Ft_ ? EEREC_T : EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(_Ft_ ? EEREC_T : EEREC_S)); VU_MERGE_REGS(regd, EEREC_TEMP); } else if( _Fd_ == _Fs_ && _Fs_ == _Ft_ && _XYZW_SS ) { _vuFlipRegSS(VU, EEREC_D); - SSE_MULSS_XMM_to_XMM(EEREC_D, EEREC_D); + xMUL.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); _vuFlipRegSS(VU, EEREC_D); } else if( _X_Y_Z_W == 8 ) { - if (regd == EEREC_S) SSE_MULSS_XMM_to_XMM(regd, EEREC_T); - else if (regd == EEREC_T) SSE_MULSS_XMM_to_XMM(regd, EEREC_S); + if (regd == EEREC_S) xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); + else if (regd == EEREC_T) xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); VU_MERGE_REGS(regd, EEREC_TEMP); } else { - if (regd == EEREC_S) SSE_MULPS_XMM_to_XMM(regd, EEREC_T); - else if (regd == EEREC_T) SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + if (regd == EEREC_S) xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); + else if (regd == EEREC_T) xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); else { - SSE_MOVAPS_XMM_to_XMM(regd, EEREC_S); - SSE_MULPS_XMM_to_XMM(regd, EEREC_T); + xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); } } } @@ -1368,46 +1368,46 @@ void recVUMI_MUL_iq_toD(VURegs *VU, uptr addr, int regd, int info) if( _XYZW_SS ) { if( regd == EEREC_TEMP ) { _vuFlipRegSS(VU, EEREC_S); - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MULSS_M32_to_XMM(regd, addr); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(regd), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_S); _vuFlipRegSS(VU, regd); } else if( regd == EEREC_S ) { _vuFlipRegSS(VU, regd); - SSE_MULSS_M32_to_XMM(regd, addr); + xMUL.SS(xRegisterSSE(regd), ptr[(void*)(addr)]); _vuFlipRegSS(VU, regd); } else { if( _X ) { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MULSS_M32_to_XMM(regd, addr); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(regd), ptr[(void*)(addr)]); } else { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(regd, EEREC_TEMP); } } } else { if( _X_Y_Z_W != 0xf || regd == EEREC_TEMP || regd == EEREC_S ) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); } if (_X_Y_Z_W != 0xf) { - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(regd, EEREC_TEMP); } else { - if( regd == EEREC_TEMP ) SSE_MULPS_XMM_to_XMM(regd, EEREC_S); - else if (regd == EEREC_S) SSE_MULPS_XMM_to_XMM(regd, EEREC_TEMP); + if( regd == EEREC_TEMP ) xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + else if (regd == EEREC_S) xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); else { - SSE_MOVSS_M32_to_XMM(regd, addr); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x00); - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMOVSSZX(xRegisterSSE(regd), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x00); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); } } } @@ -1426,39 +1426,39 @@ void recVUMI_MUL_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) if( _Ft_ == 0 ) { if( xyzw < 3 ) { if (_X_Y_Z_W != 0xf) { - SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xXOR.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); VU_MERGE_REGS(regd, EEREC_TEMP); } - else SSE_XORPS_XMM_to_XMM(regd, regd); + else xXOR.PS(xRegisterSSE(regd), xRegisterSSE(regd)); } else { assert(xyzw==3); if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(regd, EEREC_TEMP); } - else SSE_MOVAPS_XMM_to_XMM(regd, EEREC_S); + else xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); } } else if( _X_Y_Z_W == 8 ) { if( regd == EEREC_TEMP ) { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); } else { if( xyzw == 0 ) { if( regd == EEREC_T ) { - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); } } else { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MULSS_XMM_to_XMM(regd, EEREC_TEMP); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } } } @@ -1467,15 +1467,15 @@ void recVUMI_MUL_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); if (_X_Y_Z_W != 0xf) { - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(regd, EEREC_TEMP); } else { - if( regd == EEREC_TEMP ) SSE_MULPS_XMM_to_XMM(regd, EEREC_S); - else if (regd == EEREC_S) SSE_MULPS_XMM_to_XMM(regd, EEREC_TEMP); + if( regd == EEREC_TEMP ) xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + else if (regd == EEREC_S) xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); else { _unpackVF_xyzw(regd, EEREC_T, xyzw); - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); } } } @@ -1563,58 +1563,58 @@ void recVUMI_MADD_toD(VURegs *VU, int regd, int info) if( _X_Y_Z_W == 8 ) { if( regd == EEREC_ACC ) { - SSE_MOVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULSS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_TEMP); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } else if (regd == EEREC_T) { - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else if (regd == EEREC_S) { - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MULSS_XMM_to_XMM(regd, EEREC_T); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } else { if( regd == EEREC_ACC ) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_TEMP); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } else if (regd == EEREC_T) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else if (regd == EEREC_S) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_T); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else { - SSE_MOVAPS_XMM_to_XMM(regd, EEREC_S); - SSE_MULPS_XMM_to_XMM(regd, EEREC_T); + xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } } } @@ -1632,46 +1632,46 @@ void recVUMI_MADD_iq_toD(VURegs *VU, uptr addr, int regd, int info) if( _Fs_ == 0 ) { // do nothing if regd == ACC (ACCx <= ACCx + 0.0 * *addr) if( regd != EEREC_ACC ) { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_ACC); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } return; } if( regd == EEREC_ACC ) { assert( EEREC_TEMP < iREGCNT_XMM ); - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_MULSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xMUL.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_TEMP); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } else if( regd == EEREC_S ) { - SSE_MULSS_M32_to_XMM(regd, addr); + xMUL.SS(xRegisterSSE(regd), ptr[(void*)(addr)]); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); - SSE_MULSS_M32_to_XMM(regd, addr); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.SS(xRegisterSSE(regd), ptr[(void*)(addr)]); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } } else { if( _Fs_ == 0 ) { if( regd == EEREC_ACC ) { // ACCxyz is unchanged, ACCw <= ACCw + *addr if( _W ) { // if _W is zero, do nothing - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); // { *addr, 0, 0, 0 } - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x27); // { 0, 0, 0, *addr } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_TEMP); // { ACCx, ACCy, ACCz, ACCw + *addr } + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); // { *addr, 0, 0, 0 } + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x27); // { 0, 0, 0, *addr } + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); // { ACCx, ACCy, ACCz, ACCw + *addr } } } else { // DESTxyz <= ACCxyz, DESTw <= ACCw + *addr if( _W ) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); // { *addr, 0, 0, 0 } - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x27); // { 0, 0, 0, *addr } - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); // { ACCx, ACCy, ACCz, ACCw + *addr } + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); // { *addr, 0, 0, 0 } + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x27); // { 0, 0, 0, *addr } + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); // { ACCx, ACCy, ACCz, ACCw + *addr } } - else SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + else xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } @@ -1679,39 +1679,39 @@ void recVUMI_MADD_iq_toD(VURegs *VU, uptr addr, int regd, int info) } if( _X_Y_Z_W != 0xf || regd == EEREC_ACC || regd == EEREC_TEMP || regd == EEREC_S ) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); } if (_X_Y_Z_W != 0xf) { - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } else { if( regd == EEREC_ACC ) { - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_TEMP); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } else if( regd == EEREC_S ) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_TEMP); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else if( regd == EEREC_TEMP ) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else { - SSE_MOVSS_M32_to_XMM(regd, addr); - SSE_SHUFPS_XMM_to_XMM(regd, regd, 0x00); - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMOVSSZX(xRegisterSSE(regd), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(regd), xRegisterSSE(regd), 0x00); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } } } @@ -1733,24 +1733,24 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) if( xyzw == 3 ) { // just add if( _X_Y_Z_W == 8 ) { - if( regd == EEREC_S ) SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + if( regd == EEREC_S ) xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_ACC); - SSE_ADDSS_XMM_to_XMM(regd, EEREC_S); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); } } else { if( _X_Y_Z_W != 0xf ) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } else { - if( regd == EEREC_S ) SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + if( regd == EEREC_S ) xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); else { - SSE_MOVAPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_ADDPS_XMM_to_XMM(regd, EEREC_S); + xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); } } } @@ -1758,10 +1758,10 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) else { // just move acc to regd if( _X_Y_Z_W != 0xf ) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } - else SSE_MOVAPS_XMM_to_XMM(regd, EEREC_ACC); + else xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } return; @@ -1771,25 +1771,25 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); if( regd == EEREC_ACC ) { - SSE_MULSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_TEMP); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } else if( regd == EEREC_S ) { - SSE_MULSS_XMM_to_XMM(regd, EEREC_TEMP); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else if( regd == EEREC_TEMP ) { - SSE_MULSS_XMM_to_XMM(regd, EEREC_S); + xMUL.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_ACC); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else { - SSE_MOVSS_XMM_to_XMM(regd, EEREC_ACC); - SSE_MULSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVSS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xMUL.SS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, 8); } - SSE_ADDSS_XMM_to_XMM(regd, EEREC_TEMP); + xADD.SS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } } else { @@ -1798,33 +1798,33 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) } if (_X_Y_Z_W != 0xf) { - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } else { if( regd == EEREC_ACC ) { - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_TEMP); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } else if( regd == EEREC_S ) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_TEMP); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else if( regd == EEREC_TEMP ) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } else { _unpackVF_xyzw(regd, EEREC_T, xyzw); - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_ADDPS_XMM_to_XMM(regd, EEREC_ACC); + xADD.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); } } } @@ -1933,51 +1933,51 @@ void recVUMI_MSUB_toD(VURegs *VU, int regd, int info) if (_X_Y_Z_W != 0xf) { int t1reg = _vuGetTempXMMreg(info); - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } if( t1reg >= 0 ) { - SSE_MOVAPS_XMM_to_XMM(t1reg, EEREC_ACC); - SSE_SUBPS_XMM_to_XMM(t1reg, EEREC_TEMP); + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_ACC)); + xSUB.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); VU_MERGE_REGS(regd, t1reg); _freeXMMreg(t1reg); } else { - SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } } else { if( regd == EEREC_S ) { assert( regd != EEREC_ACC ); - SSE_MULPS_XMM_to_XMM(regd, EEREC_T); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_XORPS_M128_to_XMM(regd, (uptr)&const_clip[4]); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xXOR.PS(xRegisterSSE(regd), ptr[&const_clip[4]]); } else if( regd == EEREC_T ) { assert( regd != EEREC_ACC ); - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_XORPS_M128_to_XMM(regd, (uptr)&const_clip[4]); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xXOR.PS(xRegisterSSE(regd), ptr[&const_clip[4]]); } else if( regd == EEREC_TEMP ) { - SSE_MOVAPS_XMM_to_XMM(regd, EEREC_S); - SSE_MULPS_XMM_to_XMM(regd, EEREC_T); + xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_XORPS_M128_to_XMM(regd, (uptr)&const_clip[4]); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xXOR.PS(xRegisterSSE(regd), ptr[&const_clip[4]]); } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MOVAPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_TEMP); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } } } @@ -1989,47 +1989,47 @@ void recVUMI_MSUB_temp_toD(VURegs *VU, int regd, int info) if (_X_Y_Z_W != 0xf) { int t1reg = _vuGetTempXMMreg(info); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } if( t1reg >= 0 ) { - SSE_MOVAPS_XMM_to_XMM(t1reg, EEREC_ACC); - SSE_SUBPS_XMM_to_XMM(t1reg, EEREC_TEMP); + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_ACC)); + xSUB.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); if ( regd != EEREC_TEMP ) { VU_MERGE_REGS(regd, t1reg); } - else SSE_MOVAPS_XMM_to_XMM(regd, t1reg); + else xMOVAPS(xRegisterSSE(regd), xRegisterSSE(t1reg)); _freeXMMreg(t1reg); } else { - SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS(regd, EEREC_TEMP); } } else { if( regd == EEREC_ACC ) { - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_TEMP); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } else if( regd == EEREC_S ) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_TEMP); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_XORPS_M128_to_XMM(regd, (uptr)&const_clip[4]); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xXOR.PS(xRegisterSSE(regd), ptr[&const_clip[4]]); } else if( regd == EEREC_TEMP ) { - SSE_MULPS_XMM_to_XMM(regd, EEREC_S); + xMUL.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, regd, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_XORPS_M128_to_XMM(regd, (uptr)&const_clip[4]); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xXOR.PS(xRegisterSSE(regd), ptr[&const_clip[4]]); } else { - SSE_MOVAPS_XMM_to_XMM(regd, EEREC_ACC); - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVAPS(xRegisterSSE(regd), xRegisterSSE(EEREC_ACC)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat_useEAX( info, EEREC_TEMP, _X_Y_Z_W ); } - SSE_SUBPS_XMM_to_XMM(regd, EEREC_TEMP); + xSUB.PS(xRegisterSSE(regd), xRegisterSSE(EEREC_TEMP)); } } } @@ -2042,8 +2042,8 @@ void recVUMI_MSUB_iq_toD(VURegs *VU, int regd, int addr, int info) vuFloat5_useEAX( EEREC_ACC, EEREC_TEMP, _X_Y_Z_W ); vuFloat3(addr); } - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); recVUMI_MSUB_temp_toD(VU, regd, info); } @@ -2192,7 +2192,7 @@ void MINMAXlogical(VURegs *VU, int info, int min, int mode, uptr addr = 0, int x t1regbool = 1; for (t1reg = 0; ( (t1reg == EEREC_D) || (t1reg == EEREC_S) || (mode != 1 && t1reg == EEREC_T) || (t1reg == EEREC_TEMP) ); t1reg++); // Find unused reg (For first temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)temp_loc, t1reg); // Backup t1reg XMM reg + xMOVAPS(ptr[temp_loc], xRegisterSSE(t1reg)); // Backup t1reg XMM reg } int t2regbool = -1; int t2reg = EEREC_TEMP; @@ -2205,66 +2205,66 @@ void MINMAXlogical(VURegs *VU, int info, int min, int mode, uptr addr = 0, int x t2regbool = 1; for (t2reg = 0; ( (t2reg == EEREC_D) || (t2reg == EEREC_S) || (mode != 1 && t2reg == EEREC_T) || (t2reg == t1reg) || (t2reg == EEREC_TEMP) ); t2reg++); // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)temp_loc2, t2reg); // Backup t2reg XMM reg + xMOVAPS(ptr[temp_loc2], xRegisterSSE(t2reg)); // Backup t2reg XMM reg } } if (_X || _Y) { - SSE2_PSHUFD_XMM_to_XMM(t1reg, EEREC_S, 0x50); - SSE2_PAND_M128_to_XMM(t1reg, (uptr)special_mask); - SSE2_POR_M128_to_XMM(t1reg, (uptr)special_mask2); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S), 0x50); + xPAND(xRegisterSSE(t1reg), ptr[special_mask]); + xPOR(xRegisterSSE(t1reg), ptr[special_mask2]); if (mode == 0) - SSE2_PSHUFD_XMM_to_XMM(t2reg, EEREC_T, 0x50); + xPSHUF.D(xRegisterSSE(t2reg), xRegisterSSE(EEREC_T), 0x50); else if (mode == 1) { - SSE2_MOVD_M32_to_XMM(t2reg, addr); - SSE2_PSHUFD_XMM_to_XMM(t2reg, t2reg, 0x00); + xMOVDZX(xRegisterSSE(t2reg), ptr[(void*)(addr)]); + xPSHUF.D(xRegisterSSE(t2reg), xRegisterSSE(t2reg), 0x00); } else if (mode == 2) _unpackVF_xyzw(t2reg, EEREC_T, xyzw); - SSE2_PAND_M128_to_XMM(t2reg, (uptr)special_mask); - SSE2_POR_M128_to_XMM(t2reg, (uptr)special_mask2); + xPAND(xRegisterSSE(t2reg), ptr[special_mask]); + xPOR(xRegisterSSE(t2reg), ptr[special_mask2]); if (min) - SSE2_MINPD_XMM_to_XMM(t1reg, t2reg); + xMIN.PD(xRegisterSSE(t1reg), xRegisterSSE(t2reg)); else - SSE2_MAXPD_XMM_to_XMM(t1reg, t2reg); - SSE2_PSHUFD_XMM_to_XMM(t1reg, t1reg, 0x88); + xMAX.PD(xRegisterSSE(t1reg), xRegisterSSE(t2reg)); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(t1reg), 0x88); VU_MERGE_REGS_CUSTOM(EEREC_D, t1reg, 0xc & _X_Y_Z_W); } if (_Z || _W) { - SSE2_PSHUFD_XMM_to_XMM(t1reg, EEREC_S, 0xfa); - SSE2_PAND_M128_to_XMM(t1reg, (uptr)special_mask); - SSE2_POR_M128_to_XMM(t1reg, (uptr)special_mask2); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S), 0xfa); + xPAND(xRegisterSSE(t1reg), ptr[special_mask]); + xPOR(xRegisterSSE(t1reg), ptr[special_mask2]); if (mode == 0) - SSE2_PSHUFD_XMM_to_XMM(t2reg, EEREC_T, 0xfa); + xPSHUF.D(xRegisterSSE(t2reg), xRegisterSSE(EEREC_T), 0xfa); else if (mode == 1) { - SSE2_MOVD_M32_to_XMM(t2reg, addr); - SSE2_PSHUFD_XMM_to_XMM(t2reg, t2reg, 0x00); + xMOVDZX(xRegisterSSE(t2reg), ptr[(void*)(addr)]); + xPSHUF.D(xRegisterSSE(t2reg), xRegisterSSE(t2reg), 0x00); } else if (mode == 2) _unpackVF_xyzw(t2reg, EEREC_T, xyzw); - SSE2_PAND_M128_to_XMM(t2reg, (uptr)special_mask); - SSE2_POR_M128_to_XMM(t2reg, (uptr)special_mask2); + xPAND(xRegisterSSE(t2reg), ptr[special_mask]); + xPOR(xRegisterSSE(t2reg), ptr[special_mask2]); if (min) - SSE2_MINPD_XMM_to_XMM(t1reg, t2reg); + xMIN.PD(xRegisterSSE(t1reg), xRegisterSSE(t2reg)); else - SSE2_MAXPD_XMM_to_XMM(t1reg, t2reg); - SSE2_PSHUFD_XMM_to_XMM(t1reg, t1reg, 0x88); + xMAX.PD(xRegisterSSE(t1reg), xRegisterSSE(t2reg)); + xPSHUF.D(xRegisterSSE(t1reg), xRegisterSSE(t1reg), 0x88); VU_MERGE_REGS_CUSTOM(EEREC_D, t1reg, 0x3 & _X_Y_Z_W); } if (t1regbool == 0) _freeXMMreg(t1reg); else if (t1regbool == 1) - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)temp_loc); // Restore t1reg XMM reg + xMOVAPS(xRegisterSSE(t1reg), ptr[temp_loc]); // Restore t1reg XMM reg if (t2regbool == 0) _freeXMMreg(t2reg); else if (t2regbool == 1) - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)temp_loc2); // Restore t2reg XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[temp_loc2]); // Restore t2reg XMM reg } //------------------------------------------------------------------ @@ -2285,25 +2285,25 @@ void recVUMI_MAX(VURegs *VU, int info) if (_Ft_) vuFloat4_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); if( _X_Y_Z_W == 8 ) { - if (EEREC_D == EEREC_S) SSE_MAXSS_XMM_to_XMM(EEREC_D, EEREC_T); - else if (EEREC_D == EEREC_T) SSE_MAXSS_XMM_to_XMM(EEREC_D, EEREC_S); + if (EEREC_D == EEREC_S) xMAX.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if (EEREC_D == EEREC_T) xMAX.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MAXSS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMAX.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MAXPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMAX.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { - if( EEREC_D == EEREC_S ) SSE_MAXPS_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE_MAXPS_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xMAX.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xMAX.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MAXPS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMAX.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } } @@ -2324,8 +2324,8 @@ void recVUMI_MAX_iq(VURegs *VU, uptr addr, int info) if( _XYZW_SS ) { if( EEREC_D == EEREC_TEMP ) { _vuFlipRegSS(VU, EEREC_S); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MAXSS_M32_to_XMM(EEREC_D, addr); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMAX.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_S); // have to flip over EEREC_D if computing flags! @@ -2334,39 +2334,39 @@ void recVUMI_MAX_iq(VURegs *VU, uptr addr, int info) } else if( EEREC_D == EEREC_S ) { _vuFlipRegSS(VU, EEREC_D); - SSE_MAXSS_M32_to_XMM(EEREC_D, addr); + xMAX.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_D); } else { if( _X ) { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MAXSS_M32_to_XMM(EEREC_D, addr); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMAX.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); } else { _vuMoveSS(VU, EEREC_TEMP, EEREC_S); _vuFlipRegSS(VU, EEREC_D); - SSE_MAXSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMAX.SS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); _vuFlipRegSS(VU, EEREC_D); } } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); - SSE_MAXPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); + xMAX.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { if(EEREC_D == EEREC_S) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); - SSE_MAXPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); + xMAX.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVSS_M32_to_XMM(EEREC_D, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_D, EEREC_D, 0x00); - SSE_MAXPS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x00); + xMAX.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } } @@ -2381,26 +2381,26 @@ void recVUMI_MAX_xyzw(VURegs *VU, int xyzw, int info) { if( _X_Y_Z_W == 8 && (EEREC_D != EEREC_TEMP)) { if( xyzw < 3 ) { - SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xXOR.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, (uptr)s_fones); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[s_fones]); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } } else if (_X_Y_Z_W != 0xf) { if( xyzw < 3 ) { - if( _X_Y_Z_W & 1 ) SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)&VU->VF[0].UL[0]); // w included, so insert the whole reg - else SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); // w not included, can zero out + if( _X_Y_Z_W & 1 ) xMOVAPS(xRegisterSSE(EEREC_TEMP), ptr[(&VU->VF[0].UL[0])]); // w included, so insert the whole reg + else xXOR.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); // w not included, can zero out } - else SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)s_fones); + else xMOVAPS(xRegisterSSE(EEREC_TEMP), ptr[s_fones]); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { //If VF0.w isnt chosen as the constant, then its going to be MAX( 0, VF0 ), so the result is VF0 - if( xyzw < 3 ) { SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)&VU->VF[0].UL[0]); } - else SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)s_fones); + if( xyzw < 3 ) { xMOVAPS(xRegisterSSE(EEREC_D), ptr[(&VU->VF[0].UL[0])]); } + else xMOVAPS(xRegisterSSE(EEREC_D), ptr[s_fones]); } return; } @@ -2414,32 +2414,32 @@ void recVUMI_MAX_xyzw(VURegs *VU, int xyzw, int info) if( _X_Y_Z_W == 8 && (EEREC_D != EEREC_TEMP)) { if( xyzw == 0 ) { - if( EEREC_D == EEREC_S ) SSE_MAXSS_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE_MAXSS_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xMAX.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xMAX.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MAXSS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMAX.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MAXSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMAX.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } } else if (_X_Y_Z_W != 0xf) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MAXPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMAX.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { if (EEREC_D == EEREC_S) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MAXPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMAX.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } else { _unpackVF_xyzw(EEREC_D, EEREC_T, xyzw); - SSE_MAXPS_XMM_to_XMM(EEREC_D, EEREC_S); + xMAX.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } } @@ -2470,31 +2470,31 @@ void recVUMI_MINI(VURegs *VU, int info) if (_Ft_) vuFloat4_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); if( _X_Y_Z_W == 8 ) { - if (EEREC_D == EEREC_S) SSE_MINSS_XMM_to_XMM(EEREC_D, EEREC_T); - else if (EEREC_D == EEREC_T) SSE_MINSS_XMM_to_XMM(EEREC_D, EEREC_S); + if (EEREC_D == EEREC_S) xMIN.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if (EEREC_D == EEREC_T) xMIN.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MINSS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMIN.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MINPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMIN.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { if( EEREC_D == EEREC_S ) { //ClampUnordered(EEREC_T, EEREC_TEMP, 0); // need for GT4 vu0rec - SSE_MINPS_XMM_to_XMM(EEREC_D, EEREC_T); + xMIN.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } else if( EEREC_D == EEREC_T ) { //ClampUnordered(EEREC_S, EEREC_TEMP, 0); // need for GT4 vu0rec - SSE_MINPS_XMM_to_XMM(EEREC_D, EEREC_S); + xMIN.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MINPS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMIN.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } } @@ -2516,8 +2516,8 @@ void recVUMI_MINI_iq(VURegs *VU, uptr addr, int info) if( _XYZW_SS ) { if( EEREC_D == EEREC_TEMP ) { _vuFlipRegSS(VU, EEREC_S); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MINSS_M32_to_XMM(EEREC_D, addr); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMIN.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_S); // have to flip over EEREC_D if computing flags! @@ -2526,39 +2526,39 @@ void recVUMI_MINI_iq(VURegs *VU, uptr addr, int info) } else if( EEREC_D == EEREC_S ) { _vuFlipRegSS(VU, EEREC_D); - SSE_MINSS_M32_to_XMM(EEREC_D, addr); + xMIN.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); _vuFlipRegSS(VU, EEREC_D); } else { if( _X ) { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MINSS_M32_to_XMM(EEREC_D, addr); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMIN.SS(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); } else { _vuMoveSS(VU, EEREC_TEMP, EEREC_S); _vuFlipRegSS(VU, EEREC_D); - SSE_MINSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMIN.SS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); _vuFlipRegSS(VU, EEREC_D); } } } else if (_X_Y_Z_W != 0xf) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); - SSE_MINPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); + xMIN.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { if(EEREC_D == EEREC_S) { - SSE_MOVSS_M32_to_XMM(EEREC_TEMP, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x00); - SSE_MINPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSSZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0x00); + xMIN.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } else { - SSE_MOVSS_M32_to_XMM(EEREC_D, addr); - SSE_SHUFPS_XMM_to_XMM(EEREC_D, EEREC_D, 0x00); - SSE_MINPS_XMM_to_XMM(EEREC_D, EEREC_S); + xMOVSSZX(xRegisterSSE(EEREC_D), ptr[(void*)(addr)]); + xSHUF.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D), 0x00); + xMIN.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } } @@ -2574,14 +2574,14 @@ void recVUMI_MINI_xyzw(VURegs *VU, int xyzw, int info) if( _X_Y_Z_W == 0xf ) { //If VF0.w is the constant, the result will match VF0, else its all 0's - if(xyzw == 3) SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)&VU->VF[0].UL[0]); - else SSE_XORPS_XMM_to_XMM(EEREC_D, EEREC_D); + if(xyzw == 3) xMOVAPS(xRegisterSSE(EEREC_D), ptr[(&VU->VF[0].UL[0])]); + else xXOR.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_D)); } else { //If VF0.w is the constant, the result will match VF0, else its all 0's - if(xyzw == 3) SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)&VU->VF[0].UL[0]); - else SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + if(xyzw == 3) xMOVAPS(xRegisterSSE(EEREC_TEMP), ptr[(&VU->VF[0].UL[0])]); + else xXOR.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } return; @@ -2595,32 +2595,32 @@ void recVUMI_MINI_xyzw(VURegs *VU, int xyzw, int info) if( _X_Y_Z_W == 8 && (EEREC_D != EEREC_TEMP)) { if( xyzw == 0 ) { - if( EEREC_D == EEREC_S ) SSE_MINSS_XMM_to_XMM(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) SSE_MINSS_XMM_to_XMM(EEREC_D, EEREC_S); + if( EEREC_D == EEREC_S ) xMIN.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); + else if( EEREC_D == EEREC_T ) xMIN.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); else { - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MINSS_XMM_to_XMM(EEREC_D, EEREC_T); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMIN.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_T)); } } else { _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); - SSE_MINSS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); + xMIN.SS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } } else if (_X_Y_Z_W != 0xf) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MINPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMIN.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); VU_MERGE_REGS(EEREC_D, EEREC_TEMP); } else { if (EEREC_D == EEREC_S) { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, xyzw); - SSE_MINPS_XMM_to_XMM(EEREC_D, EEREC_TEMP); + xMIN.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_TEMP)); } else { _unpackVF_xyzw(EEREC_D, EEREC_T, xyzw); - SSE_MINPS_XMM_to_XMM(EEREC_D, EEREC_S); + xMIN.PS(xRegisterSSE(EEREC_D), xRegisterSSE(EEREC_S)); } } } @@ -2645,16 +2645,16 @@ void recVUMI_OPMULA( VURegs *VU, int info ) if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, 0xE); } - SSE_MOVAPS_XMM_to_XMM( EEREC_TEMP, EEREC_S ); - SSE_SHUFPS_XMM_to_XMM( EEREC_T, EEREC_T, 0xD2 ); // EEREC_T = WYXZ - SSE_SHUFPS_XMM_to_XMM( EEREC_TEMP, EEREC_TEMP, 0xC9 ); // EEREC_TEMP = WXZY - SSE_MULPS_XMM_to_XMM( EEREC_TEMP, EEREC_T ); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S )); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0xD2 ); // EEREC_T = WYXZ + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0xC9 ); // EEREC_TEMP = WXZY + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T )); VU_MERGE_REGS_CUSTOM(EEREC_ACC, EEREC_TEMP, 14); // revert EEREC_T if( EEREC_T != EEREC_ACC ) - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0xC9); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0xC9); recUpdateFlags(VU, EEREC_ACC, info); } @@ -2673,18 +2673,18 @@ void recVUMI_OPMSUB( VURegs *VU, int info ) } if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0xD2); // EEREC_T = WYXZ - SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0xC9); // EEREC_TEMP = WXZY - SSE_MULPS_XMM_to_XMM(EEREC_TEMP, EEREC_T); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0xD2); // EEREC_T = WYXZ + xSHUF.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP), 0xC9); // EEREC_TEMP = WXZY + xMUL.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_T)); // negate and add - SSE_XORPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ADDPS_XMM_to_XMM(EEREC_TEMP, EEREC_ACC); + xXOR.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[4]]); + xADD.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_ACC)); VU_MERGE_REGS_CUSTOM(EEREC_D, EEREC_TEMP, 14); // revert EEREC_T - if( EEREC_T != EEREC_D ) SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0xC9); + if( EEREC_T != EEREC_D ) xSHUF.PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T), 0xC9); recUpdateFlags(VU, EEREC_D, info); } @@ -2713,23 +2713,23 @@ void recVUMI_FTOI_Saturate(int rec_s, int rec_t, int rec_tmp1, int rec_tmp2) //Console.WriteLn ("recVUMI_FTOI_Saturate"); //Duplicate the xor'd sign bit to the whole value //FFFF FFFF for positive, 0 for negative - SSE_MOVAPS_XMM_to_XMM(rec_tmp1, rec_s); - SSE2_PXOR_M128_to_XMM(rec_tmp1, (uptr)&const_clip[4]); - SSE2_PSRAD_I8_to_XMM(rec_tmp1, 31); + xMOVAPS(xRegisterSSE(rec_tmp1), xRegisterSSE(rec_s)); + xPXOR(xRegisterSSE(rec_tmp1), ptr[&const_clip[4]]); + xPSRA.D(xRegisterSSE(rec_tmp1), 31); //Create mask: 0 where !=8000 0000 - SSE_MOVAPS_XMM_to_XMM(rec_tmp2, rec_t); - SSE2_PCMPEQD_M128_to_XMM(rec_tmp2, (uptr)&const_clip[4]); + xMOVAPS(xRegisterSSE(rec_tmp2), xRegisterSSE(rec_t)); + xPCMP.EQD(xRegisterSSE(rec_tmp2), ptr[&const_clip[4]]); //AND the mask w/ the edit values - SSE_ANDPS_XMM_to_XMM(rec_tmp1, rec_tmp2); + xAND.PS(xRegisterSSE(rec_tmp1), xRegisterSSE(rec_tmp2)); //if v==8000 0000 && positive -> 8000 0000 + FFFF FFFF -> 7FFF FFFF //if v==8000 0000 && negative -> 8000 0000 + 0 -> 8000 0000 //if v!=8000 0000 -> v+0 (masked from the and) //Add the values as needed - SSE2_PADDD_XMM_to_XMM(rec_t, rec_tmp1); + xPADD.D(xRegisterSSE(rec_t), xRegisterSSE(rec_tmp1)); } //------------------------------------------------------------------ @@ -2748,44 +2748,44 @@ void recVUMI_FTOI0(VURegs *VU, int info) //Console.WriteLn ("recVUMI_FTOI0"); if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); vuFloat_useEAX( info, EEREC_TEMP, 0xf ); // Clamp Infs and NaNs to pos/neg fmax (NaNs always to positive fmax) - SSE2_CVTTPS2DQ_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xCVTTPS2DQ(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { // If theres a temp XMM reg available for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg) ); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t2reg); // Backup XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t2reg)); // Backup XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp1); // Restore XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp1]); // Restore XMM reg _freeXMMreg(t1reg); // Free temp reg } else { // No temp reg available for (t1reg = 0; ( (t1reg == EEREC_S) || (t1reg == EEREC_T) || (t1reg == EEREC_TEMP) ); t1reg++) ; // Find unused reg (For first temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t1reg); // Backup t1reg XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t1reg)); // Backup t1reg XMM reg for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg) ); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp2, t2reg); // Backup t2reg XMM reg + xMOVAPS(ptr[FTIO_Temp2], xRegisterSSE(t2reg)); // Backup t2reg XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)FTIO_Temp1); // Restore t1reg XMM reg - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp2); // Restore t2reg XMM reg + xMOVAPS(xRegisterSSE(t1reg), ptr[FTIO_Temp1]); // Restore t1reg XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp2]); // Restore t2reg XMM reg } VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } else { if (EEREC_T != EEREC_S) { - SSE_MOVAPS_XMM_to_XMM(EEREC_T, EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_S)); vuFloat_useEAX( info, EEREC_T, 0xf ); // Clamp Infs and NaNs to pos/neg fmax (NaNs always to positive fmax) - SSE2_CVTTPS2DQ_XMM_to_XMM(EEREC_T, EEREC_T); + xCVTTPS2DQ(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T)); t1reg = _vuGetTempXMMreg(info); @@ -2796,46 +2796,46 @@ void recVUMI_FTOI0(VURegs *VU, int info) else { // No temp reg available for (t1reg = 0; ( (t1reg == EEREC_S) || (t1reg == EEREC_T) || (t1reg == EEREC_TEMP) ); t1reg++) ; // Find unused reg - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t1reg); // Backup t1reg XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t1reg)); // Backup t1reg XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_T, EEREC_TEMP, t1reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)FTIO_Temp1); // Restore t1reg XMM reg + xMOVAPS(xRegisterSSE(t1reg), ptr[FTIO_Temp1]); // Restore t1reg XMM reg } } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); vuFloat_useEAX( info, EEREC_TEMP, 0xf ); // Clamp Infs and NaNs to pos/neg fmax (NaNs always to positive fmax) - SSE2_CVTTPS2DQ_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xCVTTPS2DQ(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { // If theres a temp XMM reg available for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg)); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t2reg); // Backup XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t2reg)); // Backup XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp1); // Restore XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp1]); // Restore XMM reg _freeXMMreg(t1reg); // Free temp reg } else { // No temp reg available for (t1reg = 0; ( (t1reg == EEREC_S) || (t1reg == EEREC_T) || (t1reg == EEREC_TEMP) ); t1reg++) ; // Find unused reg (For first temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t1reg); // Backup t1reg XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t1reg)); // Backup t1reg XMM reg for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg) ); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp2, t2reg); // Backup t2reg XMM reg + xMOVAPS(ptr[FTIO_Temp2], xRegisterSSE(t2reg)); // Backup t2reg XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)FTIO_Temp1); // Restore t1reg XMM reg - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp2); // Restore t2reg XMM reg + xMOVAPS(xRegisterSSE(t1reg), ptr[FTIO_Temp1]); // Restore t1reg XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp2]); // Restore t2reg XMM reg } - SSE_MOVAPS_XMM_to_XMM(EEREC_T, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_TEMP)); } } } @@ -2848,46 +2848,46 @@ void recVUMI_FTOIX(VURegs *VU, int addr, int info) //Console.WriteLn ("recVUMI_FTOIX"); if (_X_Y_Z_W != 0xf) { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULPS_M128_to_XMM(EEREC_TEMP, addr); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); vuFloat_useEAX( info, EEREC_TEMP, 0xf ); // Clamp Infs and NaNs to pos/neg fmax (NaNs always to positive fmax) - SSE2_CVTTPS2DQ_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xCVTTPS2DQ(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { // If theres a temp XMM reg available for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg)); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t2reg); // Backup XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t2reg)); // Backup XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp1); // Restore XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp1]); // Restore XMM reg _freeXMMreg(t1reg); // Free temp reg } else { // No temp reg available for (t1reg = 0; ( (t1reg == EEREC_S) || (t1reg == EEREC_T) || (t1reg == EEREC_TEMP) ); t1reg++) ; // Find unused reg (For first temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t1reg); // Backup t1reg XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t1reg)); // Backup t1reg XMM reg for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg) ); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp2, t2reg); // Backup t2reg XMM reg + xMOVAPS(ptr[FTIO_Temp2], xRegisterSSE(t2reg)); // Backup t2reg XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)FTIO_Temp1); // Restore t1reg XMM reg - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp2); // Restore t2reg XMM reg + xMOVAPS(xRegisterSSE(t1reg), ptr[FTIO_Temp1]); // Restore t1reg XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp2]); // Restore t2reg XMM reg } VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } else { if (EEREC_T != EEREC_S) { - SSE_MOVAPS_XMM_to_XMM(EEREC_T, EEREC_S); - SSE_MULPS_M128_to_XMM(EEREC_T, addr); + xMOVAPS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_T), ptr[(void*)(addr)]); vuFloat_useEAX( info, EEREC_T, 0xf ); // Clamp Infs and NaNs to pos/neg fmax (NaNs always to positive fmax) - SSE2_CVTTPS2DQ_XMM_to_XMM(EEREC_T, EEREC_T); + xCVTTPS2DQ(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_T)); t1reg = _vuGetTempXMMreg(info); @@ -2898,47 +2898,47 @@ void recVUMI_FTOIX(VURegs *VU, int addr, int info) else { // No temp reg available for (t1reg = 0; ( (t1reg == EEREC_S) || (t1reg == EEREC_T) || (t1reg == EEREC_TEMP) ); t1reg++) ; // Find unused reg - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t1reg); // Backup t1reg XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t1reg)); // Backup t1reg XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_T, EEREC_TEMP, t1reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)FTIO_Temp1); // Restore t1reg XMM reg + xMOVAPS(xRegisterSSE(t1reg), ptr[FTIO_Temp1]); // Restore t1reg XMM reg } } else { - SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULPS_M128_to_XMM(EEREC_TEMP, addr); + xMOVAPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); vuFloat_useEAX( info, EEREC_TEMP, 0xf ); // Clamp Infs and NaNs to pos/neg fmax (NaNs always to positive fmax) - SSE2_CVTTPS2DQ_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); + xCVTTPS2DQ(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_TEMP)); t1reg = _vuGetTempXMMreg(info); if( t1reg >= 0 ) { // If theres a temp XMM reg available for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg)); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t2reg); // Backup XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t2reg)); // Backup XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp1); // Restore XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp1]); // Restore XMM reg _freeXMMreg(t1reg); // Free temp reg } else { // No temp reg available for (t1reg = 0; ( (t1reg == EEREC_S) || (t1reg == EEREC_T) || (t1reg == EEREC_TEMP) ); t1reg++) ; // Find unused reg (For first temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp1, t1reg); // Backup t1reg XMM reg + xMOVAPS(ptr[FTIO_Temp1], xRegisterSSE(t1reg)); // Backup t1reg XMM reg for (t2reg = 0; ( (t2reg == EEREC_S) || (t2reg == EEREC_T) || (t2reg == EEREC_TEMP) || (t2reg == t1reg) ); t2reg++) ; // Find unused reg (For second temp reg) - SSE_MOVAPS_XMM_to_M128((uptr)FTIO_Temp2, t2reg); // Backup t2reg XMM reg + xMOVAPS(ptr[FTIO_Temp2], xRegisterSSE(t2reg)); // Backup t2reg XMM reg recVUMI_FTOI_Saturate(EEREC_S, EEREC_TEMP, t1reg, t2reg); // Saturate if Float->Int conversion returned illegal result - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)FTIO_Temp1); // Restore t1reg XMM reg - SSE_MOVAPS_M128_to_XMM(t2reg, (uptr)FTIO_Temp2); // Restore t2reg XMM reg + xMOVAPS(xRegisterSSE(t1reg), ptr[FTIO_Temp1]); // Restore t1reg XMM reg + xMOVAPS(xRegisterSSE(t2reg), ptr[FTIO_Temp2]); // Restore t2reg XMM reg } - SSE_MOVAPS_XMM_to_XMM(EEREC_T, EEREC_TEMP); + xMOVAPS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_TEMP)); } } } @@ -2958,13 +2958,13 @@ void recVUMI_ITOF0( VURegs *VU, int info ) //Console.WriteLn ("recVUMI_ITOF0"); if (_X_Y_Z_W != 0xf) { - SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_TEMP, EEREC_S); + xCVTDQ2PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); vuFloat_useEAX( info, EEREC_TEMP, 15); // Clamp infinities VU_MERGE_REGS(EEREC_T, EEREC_TEMP); xmmregs[EEREC_T].mode |= MODE_WRITE; } else { - SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_T, EEREC_S); + xCVTDQ2PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_S)); vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities } } @@ -2975,15 +2975,15 @@ void recVUMI_ITOFX(VURegs *VU, int addr, int info) //Console.WriteLn ("recVUMI_ITOFX"); if (_X_Y_Z_W != 0xf) { - SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_TEMP, EEREC_S); - SSE_MULPS_M128_to_XMM(EEREC_TEMP, addr); + xCVTDQ2PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_TEMP), ptr[(void*)(addr)]); vuFloat_useEAX( info, EEREC_TEMP, 15); // Clamp infinities VU_MERGE_REGS(EEREC_T, EEREC_TEMP); xmmregs[EEREC_T].mode |= MODE_WRITE; } else { - SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_T, EEREC_S); - SSE_MULPS_M128_to_XMM(EEREC_T, addr); + xCVTDQ2PS(xRegisterSSE(EEREC_T), xRegisterSSE(EEREC_S)); + xMUL.PS(xRegisterSSE(EEREC_T), ptr[(void*)(addr)]); vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities } } @@ -3014,8 +3014,8 @@ void recVUMI_CLIP(VURegs *VU, int info) //Flush the clip flag before processing, incase of double clip commands (GoW) if( prevclipaddr != (uptr)&VU->VI[REG_CLIP_FLAG] ) { - MOV32MtoR(EAX, prevclipaddr); - MOV32RtoM((uptr)&VU->VI[REG_CLIP_FLAG], EAX); + xMOV(eax, ptr[(void*)(prevclipaddr)]); + xMOV(ptr[(&VU->VI[REG_CLIP_FLAG])], eax); } assert( clipaddr != 0 ); @@ -3030,40 +3030,40 @@ void recVUMI_CLIP(VURegs *VU, int info) _freeXMMreg(t2reg); // but if they've been used since then, then free them. (just doing this incase :p (cottonvibes)) if( _Ft_ == 0 ) { - SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)&s_fones[0]); // all 1s - SSE_MOVAPS_M128_to_XMM(t1reg, (uptr)&s_fones[4]); + xMOVAPS(xRegisterSSE(EEREC_TEMP), ptr[&s_fones[0]]); // all 1s + xMOVAPS(xRegisterSSE(t1reg), ptr[&s_fones[4]]); } else { _unpackVF_xyzw(EEREC_TEMP, EEREC_T, 3); - SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[0]); - SSE_MOVAPS_XMM_to_XMM(t1reg, EEREC_TEMP); - SSE_ORPS_M128_to_XMM(t1reg, (uptr)&const_clip[4]); + xAND.PS(xRegisterSSE(EEREC_TEMP), ptr[&const_clip[0]]); + xMOVAPS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_TEMP)); + xOR.PS(xRegisterSSE(t1reg), ptr[&const_clip[4]]); } - MOV32MtoR(EAX, prevclipaddr); + xMOV(eax, ptr[(void*)(prevclipaddr)]); - SSE_CMPNLEPS_XMM_to_XMM(t1reg, EEREC_S); //-w, -z, -y, -x - SSE_CMPLTPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); //+w, +z, +y, +x + xCMPNLE.PS(xRegisterSSE(t1reg), xRegisterSSE(EEREC_S)); //-w, -z, -y, -x + xCMPLT.PS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(EEREC_S)); //+w, +z, +y, +x - SHL32ItoR(EAX, 6); + xSHL(eax, 6); - SSE_MOVAPS_XMM_to_XMM(t2reg, EEREC_TEMP); //t2 = +w, +z, +y, +x - SSE_UNPCKLPS_XMM_to_XMM(EEREC_TEMP, t1reg); //EEREC_TEMP = -y,+y,-x,+x - SSE_UNPCKHPS_XMM_to_XMM(t2reg, t1reg); //t2reg = -w,+w,-z,+z - SSE_MOVMSKPS_XMM_to_R32(x86temp2, EEREC_TEMP); // -y,+y,-x,+x - SSE_MOVMSKPS_XMM_to_R32(x86temp1, t2reg); // -w,+w,-z,+z + xMOVAPS(xRegisterSSE(t2reg), xRegisterSSE(EEREC_TEMP)); //t2 = +w, +z, +y, +x + xUNPCK.LPS(xRegisterSSE(EEREC_TEMP), xRegisterSSE(t1reg)); //EEREC_TEMP = -y,+y,-x,+x + xUNPCK.HPS(xRegisterSSE(t2reg), xRegisterSSE(t1reg)); //t2reg = -w,+w,-z,+z + xMOVMSKPS(xRegister32(x86temp2), xRegisterSSE(EEREC_TEMP)); // -y,+y,-x,+x + xMOVMSKPS(xRegister32(x86temp1), xRegisterSSE(t2reg)); // -w,+w,-z,+z - AND8ItoR(x86temp1, 0x3); - SHL8ItoR(x86temp1, 4); - OR8RtoR(EAX, x86temp1); - AND8ItoR(x86temp2, 0xf); - OR8RtoR(EAX, x86temp2); - AND32ItoR(EAX, 0xffffff); + xAND(xRegister8(x86temp1), 0x3); + xSHL(xRegister8(x86temp1), 4); + xOR(al, xRegister8(x86temp1)); + xAND(xRegister8(x86temp2), 0xf); + xOR(al, xRegister8(x86temp2)); + xAND(eax, 0xffffff); - MOV32RtoM(clipaddr, EAX); + xMOV(ptr[(void*)(clipaddr)], eax); if (( !(info & (PROCESS_VU_SUPER|PROCESS_VU_COP2)) ) ) //Instantly update the flag if its called from elsewhere (unlikely, but ok) - MOV32RtoM((uptr)&VU->VI[REG_CLIP_FLAG], EAX); + xMOV(ptr[(&VU->VI[REG_CLIP_FLAG])], eax); _freeX86reg(x86temp1); _freeX86reg(x86temp2); diff --git a/pcsx2/x86/sVU_zerorec.cpp b/pcsx2/x86/sVU_zerorec.cpp index 5e71be2d36..c7e6b00ce3 100644 --- a/pcsx2/x86/sVU_zerorec.cpp +++ b/pcsx2/x86/sVU_zerorec.cpp @@ -2621,36 +2621,36 @@ void SuperVUFlush(int p, int wait) if (recwait == 0) { // write didn't happen this block - MOV32MtoR(EAX, p ? (uptr)&s_writeP : (uptr)&s_writeQ); - OR32RtoR(EAX, EAX); + xMOV(eax, ptr[(void*)(p ? (uptr)&s_writeP : (uptr)&s_writeQ)]); + xOR(eax, eax); pjmp[0] = JS8(0); - if (s_pCurInst->info.cycle) SUB32ItoR(EAX, s_pCurInst->info.cycle); + if (s_pCurInst->info.cycle) xSUB(eax, s_pCurInst->info.cycle); // if writeQ <= total+offset if (!wait) // only write back if time is up { - CMP32MtoR(EAX, (uptr)&s_TotalVUCycles); + xCMP(eax, ptr[&s_TotalVUCycles]); pjmp[1] = JG8(0); } else { // add (writeQ-total-offset) to s_TotalVUCycles // necessary? - CMP32MtoR(EAX, (uptr)&s_TotalVUCycles); + xCMP(eax, ptr[&s_TotalVUCycles]); pjmp[2] = JLE8(0); - MOV32RtoM((uptr)&s_TotalVUCycles, EAX); + xMOV(ptr[&s_TotalVUCycles], eax); x86SetJ8(pjmp[2]); } } else if (wait && s_pCurInst->info.cycle < recwait) { - ADD32ItoM((uptr)&s_TotalVUCycles, recwait); + xADD(ptr32[&s_TotalVUCycles], recwait); } - MOV32MtoR(EAX, SuperVUGetVIAddr(p ? REG_P : REG_Q, 0)); - MOV32ItoM(p ? (uptr)&s_writeP : (uptr)&s_writeQ, 0x80000000); - MOV32RtoM(SuperVUGetVIAddr(p ? REG_P : REG_Q, 1), EAX); + xMOV(eax, ptr[(void*)(SuperVUGetVIAddr(p ? REG_P : REG_Q, 0))]); + xMOV(ptr32[(u32*)(p ? (uptr)&s_writeP : (uptr)&s_writeQ)], 0x80000000); + xMOV(ptr[(void*)(SuperVUGetVIAddr(p ? REG_P : REG_Q, 1))], eax); if (recwait == 0) { @@ -2717,10 +2717,10 @@ static void SuperVURecompile() { pxAssert(pchild->blocks.size() == 0); - AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag - //AND32ItoM((uptr)&VU->GetVifRegs().stat, ~VIF1_STAT_VEW); + xAND(ptr32[&VU0.VI[ REG_VPU_STAT ].UL], s_vu ? ~0x100 : ~0x001); // E flag + //xAND(ptr32[(&VU->GetVifRegs().stat)], ~VIF1_STAT_VEW); - MOV32ItoM((uptr)&VU->VI[REG_TPC], pchild->endpc); + xMOV(ptr32[(&VU->VI[REG_TPC])], pchild->endpc); JMP32((uptr)SuperVUEndProgram - ((uptr)x86Ptr + 5)); } // only other case is when there are two branches @@ -2820,12 +2820,12 @@ void SuperVUFreeXMMregs(u32* livevars) if (xmmregs[i].mode & MODE_VUZ) { - SSE_MOVHPS_XMM_to_M64(addr, (x86SSERegType)i); - SSE_SHUFPS_M128_to_XMM((x86SSERegType)i, addr, 0xc4); + xMOVH.PS(ptr[(void*)(addr)], xRegisterSSE((x86SSERegType)i)); + xSHUF.PS(xRegisterSSE((x86SSERegType)i), ptr[(void*)(addr)], 0xc4); } else { - SSE_MOVHPS_M64_to_XMM((x86SSERegType)i, addr + 8); + xMOVH.PS(xRegisterSSE((x86SSERegType)i), ptr[(void*)(addr + 8)]); } xmmregs[i].mode &= ~MODE_VUXYZ; @@ -2848,16 +2848,16 @@ void SuperVUTestVU0Condition(u32 incstack) // sometimes games spin on vu0, so be careful with // runCycles value... woody hangs if too high // Edit: Need to test this again, if anyone ever has a "Woody" game :p - MOV32RtoM((uptr)&backupEAX, EAX); - MOV32MtoR(EAX, (uptr)&s_TotalVUCycles); - CMP32MtoR(EAX, (uptr)&runCycles); - MOV32MtoR(EAX, (uptr)&backupEAX); + xMOV(ptr[&backupEAX], eax); + xMOV(eax, ptr[&s_TotalVUCycles]); + xCMP(eax, ptr[&runCycles]); + xMOV(eax, ptr[&backupEAX]); if (incstack) { u8* jptr = JB8(0); - ADD32ItoR(ESP, incstack); - //CALLFunc((u32)timeout); + xADD(esp, incstack); + //xCALL((void*)(u32)timeout); JMP32((uptr)SuperVUEndProgram - ((uptr)x86Ptr + 5)); x86SetJ8(jptr); @@ -2873,9 +2873,9 @@ void VuBaseBlock::Recompile() pcode = x86Ptr; #ifdef PCSX2_DEBUG - MOV32ItoM((uptr)&s_vufnheader, s_pFnHeader->startpc); - MOV32ItoM((uptr)&VU->VI[REG_TPC], startpc); - MOV32ItoM((uptr)&s_svulast, startpc); + xMOV(ptr32[&s_vufnheader], s_pFnHeader->startpc); + xMOV(ptr32[(&VU->VI[REG_TPC])], startpc); + xMOV(ptr32[&s_svulast], startpc); std::list::iterator itparent; for (itparent = parents.begin(); itparent != parents.end(); ++itparent) @@ -2883,12 +2883,12 @@ void VuBaseBlock::Recompile() if ((*itparent)->blocks.size() == 1 && (*itparent)->blocks.front()->startpc == startpc && ((*itparent)->insts.size() < 2 || (----(*itparent)->insts.end())->regs[0].pipe != VUPIPE_BRANCH)) { - MOV32ItoM((uptr)&skipparent, (*itparent)->startpc); + xMOV(ptr32[&skipparent], (*itparent)->startpc); break; } } - if (itparent == parents.end()) MOV32ItoM((uptr)&skipparent, -1); + if (itparent == parents.end()) xMOV(ptr32[&skipparent], -1); xMOV( ecx, s_vu ); xCALL( svudispfn ); @@ -2954,35 +2954,35 @@ void VuBaseBlock::Recompile() // flush flags if (s_PrevClipWrite != (uptr)&VU->VI[REG_CLIP_FLAG]) { - MOV32MtoR(EAX, s_PrevClipWrite); - MOV32RtoM((uptr)&VU->VI[REG_CLIP_FLAG], EAX); + xMOV(eax, ptr[(void*)(s_PrevClipWrite)]); + xMOV(ptr[(&VU->VI[REG_CLIP_FLAG])], eax); } if (s_PrevStatusWrite != (uptr)&VU->VI[REG_STATUS_FLAG]) { - MOV32MtoR(EAX, s_PrevStatusWrite); - MOV32RtoM((uptr)&VU->VI[REG_STATUS_FLAG], EAX); + xMOV(eax, ptr[(void*)(s_PrevStatusWrite)]); + xMOV(ptr[(&VU->VI[REG_STATUS_FLAG])], eax); } if (s_PrevMACWrite != (uptr)&VU->VI[REG_MAC_FLAG]) { - MOV32MtoR(EAX, s_PrevMACWrite); - MOV32RtoM((uptr)&VU->VI[REG_MAC_FLAG], EAX); + xMOV(eax, ptr[(void*)(s_PrevMACWrite)]); + xMOV(ptr[(&VU->VI[REG_MAC_FLAG])], eax); } // if( s_StatusRead != (uptr)&VU->VI[REG_STATUS_FLAG] ) { // // only lower 8 bits valid! -// MOVZX32M8toR(EAX, s_StatusRead); -// MOV32RtoM((uptr)&VU->VI[REG_STATUS_FLAG], EAX); +// xMOVZX(eax, ptr8[(u8*)(s_StatusRead)]); +// xMOV(ptr[(&VU->VI[REG_STATUS_FLAG])], eax); // } // if( s_MACRead != (uptr)&VU->VI[REG_MAC_FLAG] ) { // // only lower 8 bits valid! -// MOVZX32M8toR(EAX, s_MACRead); -// MOV32RtoM((uptr)&VU->VI[REG_MAC_FLAG], EAX); +// xMOVZX(eax, ptr8[(u8*)(s_MACRead)]); +// xMOV(ptr[(&VU->VI[REG_MAC_FLAG])], eax); // } if (s_PrevIWrite != (uptr)&VU->VI[REG_I]) { - MOV32ItoM((uptr)&VU->VI[REG_I], *(u32*)s_PrevIWrite); // never changes + xMOV(ptr32[(&VU->VI[REG_I])], *(u32*)s_PrevIWrite); // never changes } - ADD32ItoM((uptr)&s_TotalVUCycles, cycles); + xADD(ptr32[&s_TotalVUCycles], cycles); // compute branches, jumps, eop if (type & BLOCKTYPE_HASEOP) @@ -2990,10 +2990,10 @@ void VuBaseBlock::Recompile() // end _freeXMMregs(); _freeX86regs(); - AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag - //AND32ItoM((uptr)&VU->GetVifRegs().stat, ~VIF1_STAT_VEW); + xAND(ptr32[&VU0.VI[ REG_VPU_STAT ].UL], s_vu ? ~0x100 : ~0x001); // E flag + //xAND(ptr32[(&VU->GetVifRegs().stat)], ~VIF1_STAT_VEW); - if (!g_branch) MOV32ItoM((uptr)&VU->VI[REG_TPC], endpc); + if (!g_branch) xMOV(ptr32[(&VU->VI[REG_TPC])], endpc); JMP32((uptr)SuperVUEndProgram - ((uptr)x86Ptr + 5)); } @@ -3059,7 +3059,7 @@ void VuBaseBlock::Recompile() { x86regs[s_JumpX86].inuse = 0; x86regs[EAX].inuse = 1; - MOV32RtoR(EAX, s_JumpX86); + xMOV(eax, xRegister32(s_JumpX86)); s_JumpX86 = EAX; } @@ -3104,7 +3104,7 @@ void VuBaseBlock::Recompile() #endif // store the last block executed - MOV32ItoM((uptr)&g_nLastBlockExecuted, s_pCurBlock->startpc); + xMOV(ptr32[&g_nLastBlockExecuted], s_pCurBlock->startpc); switch (g_branch) { @@ -3130,8 +3130,8 @@ void VuBaseBlock::Recompile() SuperVUTestVU0Condition(8); // already onto stack - CALLFunc((uptr)SuperVUGetProgram); - ADD32ItoR(ESP, 8); + xCALL((void*)(uptr)SuperVUGetProgram); + xADD(esp, 8); JMPR(EAX); break; } @@ -3141,7 +3141,7 @@ void VuBaseBlock::Recompile() // s32 delta = (s32)(VU->code & 0x400 ? 0xfffffc00 | (VU->code & 0x3ff) : VU->code & 0x3ff) << 3; // ADD32ItoRmOffset(ESP, delta, 0); - ADD32ItoR(ESP, 8); // restore + xADD(esp, 8); // restore pChildJumps[0] = (u32*)((uptr)JMP32(0) | 0x80000000); break; } @@ -3338,12 +3338,12 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (s_ClipRead == 0) s_ClipRead = (uptr) & VU->VI[REG_CLIP_FLAG]; - CMP32ItoM((uptr)&g_nLastBlockExecuted, nParentCheckForExecution); + xCMP(ptr32[&g_nLastBlockExecuted], nParentCheckForExecution); u8* jptr = JNE8(0); - CMP32ItoM((uptr)&s_ClipRead, (uptr)&VU->VI[REG_CLIP_FLAG]); + xCMP(ptr32[&s_ClipRead], (uptr)&VU->VI[REG_CLIP_FLAG]); u8* jptr2 = JE8(0); - MOV32MtoR(EAX, pparentinst->pClipWrite); - MOV32RtoM(s_ClipRead, EAX); + xMOV(eax, ptr[(void*)(pparentinst->pClipWrite)]); + xMOV(ptr[(void*)(s_ClipRead)], eax); x86SetJ8(jptr); x86SetJ8(jptr2); } @@ -3376,14 +3376,14 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (pparentinst->pStatusWrite == 0) { pparentinst->pStatusWrite = (uptr)SuperVUStaticAlloc(4); - //MOV32ItoM(pparentinst->pStatusWrite, 0); + //xMOV(ptr32[(u32*)(pparentinst->pStatusWrite)], 0); } // if( s_pCurBlock->prevFlagsOutOfBlock && s_StatusRead != NULL ) { // // or instead since don't now which parent we came from -// MOV32MtoR(EAX, pparentinst->pStatusWrite); -// OR32RtoM(s_StatusRead, EAX); -// MOV32ItoM(pparentinst->pStatusWrite, 0); +// xMOV(eax, ptr[(void*)(pparentinst->pStatusWrite)]); +// xOR(ptr[(void*)(s_StatusRead)], eax); +// xMOV(ptr32[(u32*)(pparentinst->pStatusWrite)], 0); // } if (nParentCheckForExecution >= 0) @@ -3392,27 +3392,27 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // don't now which parent we came from, so have to check // uptr tempstatus = (uptr)SuperVUStaticAlloc(4); // if( s_StatusRead != NULL ) -// MOV32MtoR(EAX, s_StatusRead); +// xMOV(eax, ptr[(void*)(s_StatusRead)]); // else -// MOV32MtoR(EAX, (uptr)&VU->VI[REG_STATUS_FLAG]); +// xMOV(eax, ptr[(&VU->VI[REG_STATUS_FLAG])]); // s_StatusRead = tempstatus; if (s_StatusRead == 0) s_StatusRead = (uptr) & VU->VI[REG_STATUS_FLAG]; - CMP32ItoM((uptr)&g_nLastBlockExecuted, nParentCheckForExecution); + xCMP(ptr32[&g_nLastBlockExecuted], nParentCheckForExecution); u8* jptr = JNE8(0); - MOV32MtoR(EAX, pparentinst->pStatusWrite); - MOV32ItoM(pparentinst->pStatusWrite, 0); - MOV32RtoM(s_StatusRead, EAX); + xMOV(eax, ptr[(void*)(pparentinst->pStatusWrite)]); + xMOV(ptr32[(u32*)(pparentinst->pStatusWrite)], 0); + xMOV(ptr[(void*)(s_StatusRead)], eax); x86SetJ8(jptr); } else { uptr tempstatus = (uptr)SuperVUStaticAlloc(4); - MOV32MtoR(EAX, pparentinst->pStatusWrite); - MOV32RtoM(tempstatus, EAX); - MOV32ItoM(pparentinst->pStatusWrite, 0); + xMOV(eax, ptr[(void*)(pparentinst->pStatusWrite)]); + xMOV(ptr[(void*)(tempstatus)], eax); + xMOV(ptr32[(u32*)(pparentinst->pStatusWrite)], 0); s_StatusRead = tempstatus; } @@ -3428,9 +3428,9 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // if( pc >= (u32)s_pCurBlock->endpc-8 ) { // // towards the end, so variable might be leaded to another block (silent hill 4) // uptr tempstatus = (uptr)SuperVUStaticAlloc(4); -// MOV32MtoR(EAX, s_StatusRead); -// MOV32RtoM(tempstatus, EAX); -// MOV32ItoM(s_StatusRead, 0); +// xMOV(eax, ptr[(void*)(s_StatusRead)]); +// xMOV(ptr[(void*)(tempstatus)], eax); +// xMOV(ptr32[(u32*)(s_StatusRead)], 0); // s_StatusRead = tempstatus; // } } @@ -3451,14 +3451,14 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (pparentinst->pMACWrite == 0) { pparentinst->pMACWrite = (uptr)SuperVUStaticAlloc(4); - //MOV32ItoM(pparentinst->pMACWrite, 0); + //xMOV(ptr32[(u32*)(pparentinst->pMACWrite)], 0); } // if( s_pCurBlock->prevFlagsOutOfBlock && s_MACRead != NULL ) { // // or instead since don't now which parent we came from -// MOV32MtoR(EAX, pparentinst->pMACWrite); -// OR32RtoM(s_MACRead, EAX); -// MOV32ItoM(pparentinst->pMACWrite, 0); +// xMOV(eax, ptr[(void*)(pparentinst->pMACWrite)]); +// xOR(ptr[(void*)(s_MACRead)], eax); +// xMOV(ptr32[(u32*)(pparentinst->pMACWrite)], 0); // } if (nParentCheckForExecution >= 0) { @@ -3466,26 +3466,26 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // don't now which parent we came from, so have to check // uptr tempmac = (uptr)SuperVUStaticAlloc(4); // if( s_MACRead != NULL ) -// MOV32MtoR(EAX, s_MACRead); +// xMOV(eax, ptr[(void*)(s_MACRead)]); // else -// MOV32MtoR(EAX, (uptr)&VU->VI[REG_MAC_FLAG]); +// xMOV(eax, ptr[(&VU->VI[REG_MAC_FLAG])]); // s_MACRead = tempmac; if (s_MACRead == 0) s_MACRead = (uptr) & VU->VI[REG_MAC_FLAG]; - CMP32ItoM((uptr)&g_nLastBlockExecuted, nParentCheckForExecution); + xCMP(ptr32[&g_nLastBlockExecuted], nParentCheckForExecution); u8* jptr = JNE8(0); - MOV32MtoR(EAX, pparentinst->pMACWrite); - MOV32ItoM(pparentinst->pMACWrite, 0); - MOV32RtoM(s_MACRead, EAX); + xMOV(eax, ptr[(void*)(pparentinst->pMACWrite)]); + xMOV(ptr32[(u32*)(pparentinst->pMACWrite)], 0); + xMOV(ptr[(void*)(s_MACRead)], eax); x86SetJ8(jptr); } else { uptr tempMAC = (uptr)SuperVUStaticAlloc(4); - MOV32MtoR(EAX, pparentinst->pMACWrite); - MOV32RtoM(tempMAC, EAX); - MOV32ItoM(pparentinst->pMACWrite, 0); + xMOV(eax, ptr[(void*)(pparentinst->pMACWrite)]); + xMOV(ptr[(void*)(tempMAC)], eax); + xMOV(ptr32[(u32*)(pparentinst->pMACWrite)], 0); s_MACRead = tempMAC; } @@ -3497,9 +3497,9 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // if( pc >= (u32)s_pCurBlock->endpc-8 ) { // // towards the end, so variable might be leaked to another block (silent hill 4) // uptr tempMAC = (uptr)SuperVUStaticAlloc(4); -// MOV32MtoR(EAX, s_MACRead); -// MOV32RtoM(tempMAC, EAX); -// MOV32ItoM(s_MACRead, 0); +// xMOV(eax, ptr[(void*)(s_MACRead)]); +// xMOV(ptr[(void*)(tempMAC)], eax); +// xMOV(ptr32[(u32*)(s_MACRead)], 0); // s_MACRead = tempMAC; // } } @@ -3515,9 +3515,9 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu { // make sure to reset the mac and status flags! (katamari) if (pparentinst->pStatusWrite) - MOV32ItoM(pparentinst->pStatusWrite, 0); + xMOV(ptr32[(u32*)(pparentinst->pStatusWrite)], 0); if (pparentinst->pMACWrite) - MOV32ItoM(pparentinst->pMACWrite, 0); + xMOV(ptr32[(u32*)(pparentinst->pMACWrite)], 0); } pxAssert(s_ClipRead != 0); @@ -3530,7 +3530,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu s_pCurBlock->prevFlagsOutOfBlock = 0; if( IsDebugBuild ) - MOV32ItoR(EAX, pc); + xMOV(eax, pc); pxAssert(!(type & (INST_CLIP_WRITE | INST_STATUS_WRITE | INST_MAC_WRITE))); pc += 8; @@ -3544,12 +3544,12 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (pMACWrite == 0) { pMACWrite = (uptr)SuperVUStaticAlloc(4); - //MOV32ItoM(pMACWrite, 0); + //xMOV(ptr32[(u32*)(pMACWrite)], 0); } if (pStatusWrite == 0) { pStatusWrite = (uptr)SuperVUStaticAlloc(4); - //MOV32ItoM(pStatusWrite, 0); + //xMOV(ptr32[(u32*)(pStatusWrite)], 0); } } else @@ -3564,7 +3564,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if ((pClipWrite == 0) && ((regs[0].VIwrite | regs[1].VIwrite) & (1 << REG_CLIP_FLAG))) { pClipWrite = (uptr)SuperVUStaticAlloc(4); - //MOV32ItoM(pClipWrite, 0); + //xMOV(ptr32[(u32*)(pClipWrite)], 0); } #ifdef SUPERVU_X86CACHING @@ -3592,22 +3592,22 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (s_vu == 0 && (code_ptr[1] & 0x20000000)) // M flag { - OR8ItoM((uptr)&VU->flags, VUFLAG_MFLAGSET); + xOR(ptr8[(u8*)((uptr)&VU->flags)], VUFLAG_MFLAGSET); } if (code_ptr[1] & 0x10000000) // D flag { - TEST32ItoM((uptr)&VU0.VI[REG_FBRST].UL, s_vu ? 0x400 : 0x004); + xTEST(ptr32[&VU0.VI[REG_FBRST].UL], s_vu ? 0x400 : 0x004); u8* jptr = JZ8(0); - OR32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, s_vu ? 0x200 : 0x002); + xOR(ptr32[&VU0.VI[REG_VPU_STAT].UL], s_vu ? 0x200 : 0x002); xMOV( ecx, s_vu ? INTC_VU1 : INTC_VU0 ); xCALL( hwIntcIrq ); x86SetJ8(jptr); } if (code_ptr[1] & 0x08000000) // T flag { - TEST32ItoM((uptr)&VU0.VI[REG_FBRST].UL, s_vu ? 0x800 : 0x008); + xTEST(ptr32[&VU0.VI[REG_FBRST].UL], s_vu ? 0x800 : 0x008); u8* jptr = JZ8(0); - OR32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, s_vu ? 0x400 : 0x004); + xOR(ptr32[&VU0.VI[REG_VPU_STAT].UL], s_vu ? 0x400 : 0x004); xMOV( ecx, s_vu ? INTC_VU1 : INTC_VU0 ); xCALL( hwIntcIrq ); x86SetJ8(jptr); @@ -3674,25 +3674,25 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // new is written so flush old // if type & INST_Q_READ, already flushed - if (!(type & INST_Q_READ) && s_recWriteQ == 0) MOV32MtoR(EAX, (uptr)&s_writeQ); + if (!(type & INST_Q_READ) && s_recWriteQ == 0) xMOV(eax, ptr[&s_writeQ]); if (cacheq) - MOV32MtoR(x86temp, (uptr)&s_TotalVUCycles); + xMOV(xRegister32(x86temp), ptr[&s_TotalVUCycles]); if (!(type & INST_Q_READ)) { if (s_recWriteQ == 0) { - OR32RtoR(EAX, EAX); + xOR(eax, eax); pjmp = JS8(0); - MOV32MtoR(EAX, SuperVUGetVIAddr(REG_Q, 0)); - MOV32RtoM(SuperVUGetVIAddr(REG_Q, 1), EAX); + xMOV(eax, ptr[(void*)(SuperVUGetVIAddr(REG_Q, 0))]); + xMOV(ptr[(void*)(SuperVUGetVIAddr(REG_Q, 1))], eax); x86SetJ8(pjmp); } else if (s_needFlush & 1) { - MOV32MtoR(EAX, SuperVUGetVIAddr(REG_Q, 0)); - MOV32RtoM(SuperVUGetVIAddr(REG_Q, 1), EAX); + xMOV(eax, ptr[(void*)(SuperVUGetVIAddr(REG_Q, 0))]); + xMOV(ptr[(void*)(SuperVUGetVIAddr(REG_Q, 1))], eax); s_needFlush &= ~1; } } @@ -3701,8 +3701,8 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (cacheq) { pxAssert(s_pCurInst->pqcycles > 1); - ADD32ItoR(x86temp, s_pCurInst->info.cycle + s_pCurInst->pqcycles); - MOV32RtoM((uptr)&s_writeQ, x86temp); + xADD(xRegister32(x86temp), s_pCurInst->info.cycle + s_pCurInst->pqcycles); + xMOV(ptr[&s_writeQ], xRegister32(x86temp)); s_needFlush |= 1; } else @@ -3710,7 +3710,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // won't be writing back s_WriteToReadQ = 1; s_needFlush &= ~1; - MOV32ItoM((uptr)&s_writeQ, 0x80000001); + xMOV(ptr32[&s_writeQ], 0x80000001); } s_recWriteQ = s_pCurInst->info.cycle + s_pCurInst->pqcycles; @@ -3725,31 +3725,31 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // new is written so flush old if (!(type & INST_P_READ) && s_recWriteP == 0) - MOV32MtoR(EAX, (uptr)&s_writeP); - MOV32MtoR(x86temp, (uptr)&s_TotalVUCycles); + xMOV(eax, ptr[&s_writeP]); + xMOV(xRegister32(x86temp), ptr[&s_TotalVUCycles]); if (!(type & INST_P_READ)) { if (s_recWriteP == 0) { - OR32RtoR(EAX, EAX); + xOR(eax, eax); pjmp = JS8(0); - MOV32MtoR(EAX, SuperVUGetVIAddr(REG_P, 0)); - MOV32RtoM(SuperVUGetVIAddr(REG_P, 1), EAX); + xMOV(eax, ptr[(void*)(SuperVUGetVIAddr(REG_P, 0))]); + xMOV(ptr[(void*)(SuperVUGetVIAddr(REG_P, 1))], eax); x86SetJ8(pjmp); } else if (s_needFlush & 2) { - MOV32MtoR(EAX, SuperVUGetVIAddr(REG_P, 0)); - MOV32RtoM(SuperVUGetVIAddr(REG_P, 1), EAX); + xMOV(eax, ptr[(void*)(SuperVUGetVIAddr(REG_P, 0))]); + xMOV(ptr[(void*)(SuperVUGetVIAddr(REG_P, 1))], eax); s_needFlush &= ~2; } } // write new P pxAssert(s_pCurInst->pqcycles > 1); - ADD32ItoR(x86temp, s_pCurInst->info.cycle + s_pCurInst->pqcycles); - MOV32RtoM((uptr)&s_writeP, x86temp); + xADD(xRegister32(x86temp), s_pCurInst->info.cycle + s_pCurInst->pqcycles); + xMOV(ptr[&s_writeP], xRegister32(x86temp)); s_needFlush |= 2; s_recWriteP = s_pCurInst->info.cycle + s_pCurInst->pqcycles; @@ -3791,7 +3791,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu pxAssert(vfflush[0] >= 0); if (modewrite) { - SSE_MOVAPS_XMM_to_M128((uptr)&VU->VF[regs[1].VFwrite], (x86SSERegType)vfwrite[1]); + xMOVAPS(ptr[(&VU->VF[regs[1].VFwrite])], xRegisterSSE((x86SSERegType)vfwrite[1])); } vfregstore = 1; } @@ -3817,7 +3817,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (vfregstore) { // load - SSE_MOVAPS_M128_to_XMM(vfflush[0], (uptr)&VU->VF[regs[1].VFwrite]); + xMOVAPS(xRegisterSSE(vfflush[0]), ptr[(&VU->VF[regs[1].VFwrite])]); pxAssert(xmmregs[vfwrite[1]].mode & MODE_WRITE); @@ -3848,7 +3848,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu { pxAssert(vicached >= 0); int cachedreg = _allocX86reg(-1, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), vicached, MODE_READ); - MOV32RtoM((uptr)&s_VIBranchDelay, cachedreg); + xMOV(ptr[&s_VIBranchDelay], xRegister32(cachedreg)); } #endif @@ -3858,7 +3858,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // itinst2 = itinst; ++itinst2; // if( itinst2->regs[0].pipe == VUPIPE_BRANCH && (itinst->regs[0].VIwrite&itinst2->regs[0].VIread) ) { // -// CALLFunc((u32)branchfn); +// xCALL((void*)(u32)branchfn); // pxAssert( itinst->regs[0].VIwrite & 0xffff ); // Console.WriteLn("vi write before branch"); // for(s_CacheVIReg = 0; s_CacheVIReg < 16; ++s_CacheVIReg) { @@ -3868,7 +3868,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // // oldreg = _allocX86reg(-1, X86TYPE_VI|(s_vu?X86TYPE_VU1:0), s_CacheVIReg, MODE_READ); // s_CacheVIX86 = _allocX86reg(-1, X86TYPE_VITEMP, s_CacheVIReg, MODE_WRITE); -// MOV32RtoR(s_CacheVIX86, oldreg); +// xMOV(xRegister32(s_CacheVIX86), xRegister32(oldreg)); // } // } // else if( pc == s_pCurBlock->endpc-8 && s_CacheVIReg >= 0 ) { @@ -3938,8 +3938,8 @@ void recVUMI_BranchHandle() pxAssert(s_JumpX86 > 0); if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0 || SUPERVU_CHECKCONDITION) - MOV32ItoM(SuperVUGetVIAddr(REG_TPC, 0), bpc); - MOV32ItoR(s_JumpX86, 1); // use 1 to disable optimization to XOR + xMOV(ptr32[(u32*)(SuperVUGetVIAddr(REG_TPC, 0))], bpc); + xMOV(xRegister32(s_JumpX86), 1); // use 1 to disable optimization to XOR s_pCurBlock->pChildJumps[curjump] = (u32*)x86Ptr - 1; if (!(s_pCurInst->type & INST_BRANCH_DELAY)) @@ -3948,8 +3948,8 @@ void recVUMI_BranchHandle() x86SetJ8(j8Ptr[ 0 ]); if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0 || SUPERVU_CHECKCONDITION) - MOV32ItoM(SuperVUGetVIAddr(REG_TPC, 0), pc + 8); - MOV32ItoR(s_JumpX86, 1); // use 1 to disable optimization to XOR + xMOV(ptr32[(u32*)(SuperVUGetVIAddr(REG_TPC, 0))], pc + 8); + xMOV(xRegister32(s_JumpX86), 1); // use 1 to disable optimization to XOR s_pCurBlock->pChildJumps[curjump+1] = (u32*)x86Ptr - 1; x86SetJ8(j8Ptr[ 1 ]); @@ -3982,9 +3982,9 @@ void recVUMI_IBQ_prep() if (itreg >= 0) { - CMP16ItoR(itreg, 0); + xCMP(xRegister16(itreg), 0); } - else CMP16ItoM(SuperVUGetVIAddr(_It_, 1), 0); + else xCMP(ptr16[(u16*)(SuperVUGetVIAddr(_It_, 1))], 0); } else if (_It_ == 0) { @@ -4003,9 +4003,9 @@ void recVUMI_IBQ_prep() if (isreg >= 0) { - CMP16ItoR(isreg, 0); + xCMP(xRegister16(isreg), 0); } - else CMP16ItoM(SuperVUGetVIAddr(_Is_, 1), 0); + else xCMP(ptr16[(u16*)(SuperVUGetVIAddr(_Is_, 1))], 0); } else @@ -4034,7 +4034,7 @@ void recVUMI_IBQ_prep() if (s_pCurInst->vicached >= 0 && s_pCurInst->vicached == (s8)_Is_) { isreg = _allocX86reg(-1, X86TYPE_TEMP, 0, MODE_READ | MODE_WRITE); - MOV32MtoR(isreg, SuperVUGetVIAddr(_Is_, 1)); + xMOV(xRegister32(isreg), ptr[(void*)(SuperVUGetVIAddr(_Is_, 1))]); } else isreg = _allocX86reg(-1, X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _Is_, MODE_READ); @@ -4052,18 +4052,18 @@ void recVUMI_IBQ_prep() { if (itreg >= 0) { - CMP16RtoR(isreg, itreg); + xCMP(xRegister16(isreg), xRegister16(itreg)); } - else CMP16MtoR(isreg, SuperVUGetVIAddr(_It_, 1)); + else xCMP(xRegister16(isreg), ptr[(void*)(SuperVUGetVIAddr(_It_, 1))]); } else if (itreg >= 0) { - CMP16MtoR(itreg, SuperVUGetVIAddr(_Is_, 1)); + xCMP(xRegister16(itreg), ptr[(void*)(SuperVUGetVIAddr(_Is_, 1))]); } else { isreg = _allocX86reg(-1, X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _Is_, MODE_READ); - CMP16MtoR(isreg, SuperVUGetVIAddr(_It_, 1)); + xCMP(xRegister16(isreg), ptr[(void*)(SuperVUGetVIAddr(_It_, 1))]); } } } @@ -4093,12 +4093,12 @@ void recVUMI_IBGEZ(VURegs* vuu, s32 info) if (isreg >= 0) { - TEST16RtoR(isreg, isreg); + xTEST(xRegister16(isreg), xRegister16(isreg)); j8Ptr[ 0 ] = JS8(0); } else { - CMP16ItoM(SuperVUGetVIAddr(_Is_, 1), 0x0); + xCMP(ptr16[(u16*)(SuperVUGetVIAddr(_Is_, 1))], 0x0); j8Ptr[ 0 ] = JL8(0); } @@ -4123,12 +4123,12 @@ void recVUMI_IBGTZ(VURegs* vuu, s32 info) if (isreg >= 0) { - CMP16ItoR(isreg, 0); + xCMP(xRegister16(isreg), 0); j8Ptr[ 0 ] = JLE8(0); } else { - CMP16ItoM(SuperVUGetVIAddr(_Is_, 1), 0x0); + xCMP(ptr16[(u16*)(SuperVUGetVIAddr(_Is_, 1))], 0x0); j8Ptr[ 0 ] = JLE8(0); } recVUMI_BranchHandle(); @@ -4152,12 +4152,12 @@ void recVUMI_IBLEZ(VURegs* vuu, s32 info) if (isreg >= 0) { - CMP16ItoR(isreg, 0); + xCMP(xRegister16(isreg), 0); j8Ptr[ 0 ] = JG8(0); } else { - CMP16ItoM(SuperVUGetVIAddr(_Is_, 1), 0x0); + xCMP(ptr16[(u16*)(SuperVUGetVIAddr(_Is_, 1))], 0x0); j8Ptr[ 0 ] = JG8(0); } recVUMI_BranchHandle(); @@ -4181,12 +4181,12 @@ void recVUMI_IBLTZ(VURegs* vuu, s32 info) if (isreg >= 0) { - TEST16RtoR(isreg, isreg); + xTEST(xRegister16(isreg), xRegister16(isreg)); j8Ptr[ 0 ] = JNS8(0); } else { - CMP16ItoM(SuperVUGetVIAddr(_Is_, 1), 0x0); + xCMP(ptr16[(u16*)(SuperVUGetVIAddr(_Is_, 1))], 0x0); j8Ptr[ 0 ] = JGE8(0); } recVUMI_BranchHandle(); @@ -4204,7 +4204,7 @@ void recVUMI_B(VURegs* vuu, s32 info) // supervu will take care of the rest int bpc = _recbranchAddr(VU->code); if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0 || SUPERVU_CHECKCONDITION) - MOV32ItoM(SuperVUGetVIAddr(REG_TPC, 0), bpc); + xMOV(ptr32[(u32*)(SuperVUGetVIAddr(REG_TPC, 0))], bpc); // loops to self, so check condition if (bpc == s_pCurBlock->startpc && (s_vu == 0 || SUPERVU_CHECKCONDITION)) @@ -4215,7 +4215,7 @@ void recVUMI_B(VURegs* vuu, s32 info) if (s_pCurBlock->blocks.size() > 1) { s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); - MOV32ItoR(s_JumpX86, 1); + xMOV(xRegister32(s_JumpX86), 1); s_pCurBlock->pChildJumps[(s_pCurInst->type & INST_BRANCH_DELAY)?1:0] = (u32*)x86Ptr - 1; s_UnconditionalDelay = 1; } @@ -4227,7 +4227,7 @@ void recVUMI_BAL(VURegs* vuu, s32 info) { int bpc = _recbranchAddr(VU->code); if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0 || SUPERVU_CHECKCONDITION) - MOV32ItoM(SuperVUGetVIAddr(REG_TPC, 0), bpc); + xMOV(ptr32[(u32*)(SuperVUGetVIAddr(REG_TPC, 0))], bpc); // loops to self, so check condition if (bpc == s_pCurBlock->startpc && (s_vu == 0 || SUPERVU_CHECKCONDITION)) @@ -4238,13 +4238,13 @@ void recVUMI_BAL(VURegs* vuu, s32 info) if (_It_) { _deleteX86reg(X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _It_, 2); - MOV16ItoM(SuperVUGetVIAddr(_It_, 0), (pc + 8) >> 3); + xMOV(ptr16[(u16*)(SuperVUGetVIAddr(_It_, 0))], (pc + 8) >> 3); } if (s_pCurBlock->blocks.size() > 1) { s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); - MOV32ItoR(s_JumpX86, 1); + xMOV(xRegister32(s_JumpX86), 1); s_pCurBlock->pChildJumps[(s_pCurInst->type & INST_BRANCH_DELAY)?1:0] = (u32*)x86Ptr - 1; s_UnconditionalDelay = 1; } @@ -4255,20 +4255,20 @@ void recVUMI_BAL(VURegs* vuu, s32 info) void recVUMI_JR(VURegs* vuu, s32 info) { int isreg = _allocX86reg(-1, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); - LEA32RStoR(EAX, isreg, 3); + xLEA(eax, ptr[xAddressReg(isreg) * (1<<3)]); //Mask the address to something valid if (vuu == &VU0) - AND32ItoR(EAX, 0xfff); + xAND(eax, 0xfff); else - AND32ItoR(EAX, 0x3fff); + xAND(eax, 0x3fff); - if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0) MOV32RtoM(SuperVUGetVIAddr(REG_TPC, 0), EAX); + if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0) xMOV(ptr[(void*)(SuperVUGetVIAddr(REG_TPC, 0))], eax); if (!(s_pCurBlock->type & BLOCKTYPE_HASEOP)) { - PUSH32I(s_vu); - PUSH32R(EAX); + xPUSH(s_vu); + xPUSH(eax); } g_branch |= 0x10; // 0x08 is reserved } @@ -4278,26 +4278,26 @@ void recVUMI_JALR(VURegs* vuu, s32 info) _addNeededX86reg(X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _It_); int isreg = _allocX86reg(-1, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); - LEA32RStoR(EAX, isreg, 3); + xLEA(eax, ptr[xAddressReg(isreg) * (1<<3)]); //Mask the address to something valid if (vuu == &VU0) - AND32ItoR(EAX, 0xfff); + xAND(eax, 0xfff); else - AND32ItoR(EAX, 0x3fff); + xAND(eax, 0x3fff); if (_It_) { _deleteX86reg(X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _It_, 2); - MOV16ItoM(SuperVUGetVIAddr(_It_, 0), (pc + 8) >> 3); + xMOV(ptr16[(u16*)(SuperVUGetVIAddr(_It_, 0))], (pc + 8) >> 3); } - if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0) MOV32RtoM(SuperVUGetVIAddr(REG_TPC, 0), EAX); + if ((s_pCurBlock->type & BLOCKTYPE_HASEOP) || s_vu == 0) xMOV(ptr[(void*)(SuperVUGetVIAddr(REG_TPC, 0))], eax); if (!(s_pCurBlock->type & BLOCKTYPE_HASEOP)) { - PUSH32I(s_vu); - PUSH32R(EAX); + xPUSH(s_vu); + xPUSH(eax); } g_branch |= 4; @@ -4330,8 +4330,8 @@ void recVUMI_XGKICK(VURegs *VU, int info) x86regs[isreg].type = X86TYPE_VITEMP; x86regs[isreg].needed = 1; x86regs[isreg].mode = MODE_WRITE | MODE_READ; - SHL32ItoR(isreg, 4); - AND32ItoR(isreg, 0x3fff); + xSHL(xRegister32(isreg), 4); + xAND(xRegister32(isreg), 0x3fff); s_XGKICKReg = isreg; if (!SUPERVU_XGKICKDELAY || pc == s_pCurBlock->endpc) {