diff --git a/pcsx2/Hw.h b/pcsx2/Hw.h index 45511af670..ef1bb0b658 100644 --- a/pcsx2/Hw.h +++ b/pcsx2/Hw.h @@ -277,6 +277,7 @@ enum EERegisterAddresses SIF2_CHCR = 0x1000C800, SIF2_MADR = 0x1000C810, SIF2_QWC = 0x1000C820, + SIF2_TADR = 0x1000C830, //fromSPR D8_CHCR = 0x1000D000, @@ -286,6 +287,8 @@ enum EERegisterAddresses fromSPR_CHCR = 0x1000D000, fromSPR_MADR = 0x1000D010, fromSPR_QWC = 0x1000D020, + fromSPR_TADR = 0x1000D030, + fromSPR_SADR = 0x1000D080, //toSPR D9_CHCR = 0x1000D400, @@ -295,6 +298,8 @@ enum EERegisterAddresses toSPR_CHCR = 0x1000D400, toSPR_MADR = 0x1000D410, toSPR_QWC = 0x1000D420, + toSPR_TADR = 0x1000D430, + toSPR_SADR = 0x1000D480, DMAC_CTRL = 0x1000E000, DMAC_STAT = 0x1000E010, diff --git a/pcsx2/Vif.h b/pcsx2/Vif.h index 1110559a4e..a35b42c9aa 100644 --- a/pcsx2/Vif.h +++ b/pcsx2/Vif.h @@ -224,7 +224,7 @@ static VIFregisters& vif1Regs = (VIFregisters&)eeHw[0x3C00]; extern void dmaVIF0(); extern void dmaVIF1(); extern void mfifoVIF1transfer(int qwc); -extern bool VIF0transfer(u32 *data, int size); -extern bool VIF1transfer(u32 *data, int size); +extern bool VIF0transfer(u32 *data, int size, bool TTE=0); +extern bool VIF1transfer(u32 *data, int size, bool TTE=0); extern void vifMFIFOInterrupt(); extern bool CheckPath2GIF(EE_EventType channel); diff --git a/pcsx2/Vif1_Dma.cpp b/pcsx2/Vif1_Dma.cpp index a651a8d89f..d15c3bd56b 100644 --- a/pcsx2/Vif1_Dma.cpp +++ b/pcsx2/Vif1_Dma.cpp @@ -204,14 +204,25 @@ __fi void vif1SetupTransfer() bool ret; + static __aligned16 u128 masked_tag; + + masked_tag._u64[0] = 0; + masked_tag._u64[1] = *((u64*)ptag + 1); + + VIF_LOG("\tVIF1 SrcChain TTE=1, data = 0x%08x.%08x", masked_tag._u32[3], masked_tag._u32[2]); + if (vif1.vifstalled) { - ret = VIF1transfer((u32*)ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset); //Transfer Tag on stall + ret = VIF1transfer((u32*)&masked_tag + vif1.irqoffset, 4 - vif1.irqoffset, true); //Transfer Tag on stall + //ret = VIF1transfer((u32*)ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset); //Transfer Tag on stall } else - ret = VIF1transfer((u32*)ptag + 2, 2); //Transfer Tag + { + ret = VIF1transfer((u32*)&masked_tag, 4, true); //Transfer Tag + //ret = VIF1transfer((u32*)ptag + 2, 2); //Transfer Tag + } - if (!ret && vif1.irqoffset < 2) + if (!ret && vif1.irqoffset) { vif1.inprogress &= ~1; //Better clear this so it has to do it again (Jak 1) return; //IRQ set by VIFTransfer diff --git a/pcsx2/Vif1_MFIFO.cpp b/pcsx2/Vif1_MFIFO.cpp index 18817d9ced..d74d87301c 100644 --- a/pcsx2/Vif1_MFIFO.cpp +++ b/pcsx2/Vif1_MFIFO.cpp @@ -155,12 +155,25 @@ void mfifoVIF1transfer(int qwc) { bool ret; - if (vif1.vifstalled) - ret = VIF1transfer((u32*)ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset); //Transfer Tag on Stall - else - ret = VIF1transfer((u32*)ptag + 2, 2); //Transfer Tag + static __aligned16 u128 masked_tag; - if ((ret == false) && vif1.irqoffset < 2) + masked_tag._u64[0] = 0; + masked_tag._u64[1] = *((u64*)ptag + 1); + + VIF_LOG("\tVIF1 SrcChain TTE=1, data = 0x%08x.%08x", masked_tag._u32[3], masked_tag._u32[2]); + + if (vif1.vifstalled) + { + ret = VIF1transfer((u32*)&masked_tag + vif1.irqoffset, 4 - vif1.irqoffset, true); //Transfer Tag on stall + //ret = VIF1transfer((u32*)ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset); //Transfer Tag on stall + } + else + { + ret = VIF1transfer((u32*)&masked_tag, 4, true); //Transfer Tag + //ret = VIF1transfer((u32*)ptag + 2, 2); //Transfer Tag + } + + if (!ret && vif1.irqoffset) { return; //IRQ set by VIFTransfer diff --git a/pcsx2/Vif_Transfer.cpp b/pcsx2/Vif_Transfer.cpp index 91ef28364f..f10f82768a 100644 --- a/pcsx2/Vif_Transfer.cpp +++ b/pcsx2/Vif_Transfer.cpp @@ -108,7 +108,7 @@ _vifT void vifTransferLoop(u32* &data) { if (pSize) vifX.vifstalled = true; } -_vifT static __fi bool vifTransfer(u32 *data, int size) { +_vifT static __fi bool vifTransfer(u32 *data, int size, bool TTE) { vifStruct& vifX = GetVifX; // irqoffset necessary to add up the right qws, or else will spin (spiderman) @@ -139,6 +139,8 @@ _vifT static __fi bool vifTransfer(u32 *data, int size) { vifX.irqoffset = transferred % 4; // cannot lose the offset + if (TTE) return !vifX.vifstalled; + transferred = transferred >> 2; vifXch.madr +=(transferred << 4); @@ -161,9 +163,10 @@ _vifT static __fi bool vifTransfer(u32 *data, int size) { return !vifX.vifstalled; } -bool VIF0transfer(u32 *data, int size) { - return vifTransfer<0>(data, size); +// When TTE is set to 1, MADR and QWC are not updated as part of the transfer. +bool VIF0transfer(u32 *data, int size, bool TTE) { + return vifTransfer<0>(data, size, TTE); } -bool VIF1transfer(u32 *data, int size) { - return vifTransfer<1>(data, size); +bool VIF1transfer(u32 *data, int size, bool TTE) { + return vifTransfer<1>(data, size, TTE); } diff --git a/pcsx2/ps2/GIFpath.cpp b/pcsx2/ps2/GIFpath.cpp index ee0a4292bb..bebe2c486a 100644 --- a/pcsx2/ps2/GIFpath.cpp +++ b/pcsx2/ps2/GIFpath.cpp @@ -76,6 +76,7 @@ struct GIFTAG GIFTAG() {} wxString DumpRegsToString() const; + wxString ToString() const; }; wxString GIFTAG::DumpRegsToString() const @@ -105,6 +106,21 @@ wxString GIFTAG::DumpRegsToString() const return result; } +wxString GIFTAG::ToString() const +{ + static const char* GifTagModeLabel[] = + { + "Packed", "RegList", "Image", "Image2" + }; + + FastFormatUnicode result; + result.Write("NLOOP=0x%04X, EOP=%u, PRE=%u, PRIM=0x%03X, MODE=%s", + NLOOP, EOP, PRE, PRIM, GifTagModeLabel[FLG]); + + return result; +} + + // -------------------------------------------------------------------------------------- // GIFPath -- PS2 GIFtag info (one for each path). // -------------------------------------------------------------------------------------- @@ -622,7 +638,9 @@ __fi int GIFPath::CopyTag(const u128* pMem128, u32 size) SetTag((u8*)pMem128); copyTag(); - + + GifTagLog("\tSetTag: %ls", tag.ToString().c_str()); + if(nloop > 0) { switch(pathidx) diff --git a/pcsx2/ps2/eeHwTraceLog.inl b/pcsx2/ps2/eeHwTraceLog.inl index b39e807c6e..7f3fc8718b 100644 --- a/pcsx2/ps2/eeHwTraceLog.inl +++ b/pcsx2/ps2/eeHwTraceLog.inl @@ -21,15 +21,15 @@ static __ri bool _eelog_enabled( u32 addr ) { // Selective enable/disable ability for specific register maps - if (eeAddrInRange(RCNT0, addr)) return true; + if (eeAddrInRange(RCNT0, addr)) return false; if (eeAddrInRange(RCNT1, addr)) return true; if (eeAddrInRange(RCNT2, addr)) return true; if (eeAddrInRange(RCNT3, addr)) return true; - if (eeAddrInRange(SBUS, addr)) return true; + if (eeAddrInRange(SBUS, addr)) return false; // INTC! - if (addr == INTC_STAT || addr == INTC_MASK) return true; + if (addr == INTC_STAT || addr == INTC_MASK) return false; return true; } @@ -175,10 +175,13 @@ static __ri const char* _eelog_GetHwName( u32 addr, T val ) EasyCase(fromSPR_CHCR); EasyCase(fromSPR_MADR); EasyCase(fromSPR_QWC); + EasyCase(fromSPR_SADR); EasyCase(toSPR_CHCR); EasyCase(toSPR_MADR); EasyCase(toSPR_QWC); + EasyCase(toSPR_TADR); + EasyCase(toSPR_SADR); // DMAC! EasyCase(DMAC_CTRL);