mirror of https://github.com/PCSX2/pcsx2.git
reverted and changed some stuff that was causing compiling problems for linux; thanks again to Shanoah
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@59 a6443dda-0b58-4228-96e9-037be469359c
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13
pcsx2/GS.cpp
13
pcsx2/GS.cpp
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@ -123,7 +123,7 @@ u32 g_MTGSDebug = 0, g_MTGSId = 0;
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u32 CSRw;
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void gsWaitGS();
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extern HWND pDsp;
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extern long pDsp;
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typedef u8* PU8;
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PCSX2_ALIGNED16(u8 g_MTGSMem[0x2000]); // mtgs has to have its own memory
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@ -712,7 +712,6 @@ u64 gsRead64(u32 mem)
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void gsIrq() {
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hwIntcIrq(0);
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//SysPrintf("GSIRQ called\n");
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}
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static void GSRegHandlerSIGNAL(u32* data)
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@ -1031,7 +1030,7 @@ static u64 s_gstag=0; // used for querying the last tag
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int _GIFchain() {
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#ifdef GSPATH3FIX
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u32 qwc = (psHu32(GIF_MODE) & 0x4 && vif1Regs->mskpath3 && gif->qwc & ~7) ? 8 : gif->qwc;
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u32 qwc = (psHu32(GIF_MODE) & 0x4 && vif1Regs->mskpath3) ? min(8, (int)gif->qwc) : gif->qwc;
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#else
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u32 qwc = gif->qwc;
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#endif
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@ -1609,18 +1608,18 @@ void* GSThreadProc(void* lpParam)
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int qsize = (tag>>16);
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MTGS_RECREAD(g_pGSRingPos+16, (qsize<<4));
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// make sure that tag>>16 is the MAX size readable
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GSgifTransfer1((u32*)(g_pGSRingPos+0x10) - 0x1000 + 4*qsize, 0x4000-qsize*16);
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InterlockedExchangeAdd((long*)&g_pGSRingPos, 16 + (qsize<<4));
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GSgifTransfer1((u32*)(g_pGSRingPos+16) - 0x1000 + 4*qsize, 0x4000-qsize*16);
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InterlockedExchangeAdd((long*)&g_pGSRingPos, 16 + ((tag>>16)<<4));
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break;
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}
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case GS_RINGTYPE_P2:
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MTGS_RECREAD(g_pGSRingPos+16, ((tag>>16)<<4));
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GSgifTransfer2((u32*)(g_pGSRingPos+0x10), tag>>16);
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GSgifTransfer2((u32*)(g_pGSRingPos+16), tag>>16);
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InterlockedExchangeAdd((long*)&g_pGSRingPos, 16 + ((tag>>16)<<4));
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break;
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case GS_RINGTYPE_P3:
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MTGS_RECREAD(g_pGSRingPos+16, ((tag>>16)<<4));
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GSgifTransfer3((u32*)(g_pGSRingPos+0x10), tag>>16);
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GSgifTransfer3((u32*)(g_pGSRingPos+16), tag>>16);
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InterlockedExchangeAdd((long*)&g_pGSRingPos, 16 + ((tag>>16)<<4));
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break;
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case GS_RINGTYPE_VSYNC:
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@ -251,7 +251,6 @@ int LoadSPU2plugin(char *filename) {
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LoadSPU2sym1(irqCallback, "SPU2irqCallback");
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LoadSPU2symN(setClockPtr, "SPU2setClockPtr");
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LoadSPU2symN(setTimeStretcher, "SPU2setTimeStretcher");
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LoadSPU2symN(setupRecording, "SPU2setupRecording");
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@ -509,7 +508,7 @@ int LoadPlugins() {
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return 0;
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}
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HWND pDsp;
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uptr pDsp;
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static pluginsopened = 0;
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extern void spu2DMA4Irq();
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extern void spu2DMA7Irq();
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@ -117,6 +117,9 @@ extern void _vu0WaitMicro();
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static void recCFC2()
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{
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int mmreg;
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#ifdef __x86_64__
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int creg;
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#endif
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if (cpuRegs.code & 1) {
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iFlushCall(IS_X8664?(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86):FLUSH_NOCONST);
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@ -130,7 +133,7 @@ static void recCFC2()
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#ifdef __x86_64__
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mmreg = _allocX86reg(-1, X86TYPE_GPR, _Rt_, MODE_WRITE);
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if( (int creg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_READ)) >= 0 ) {
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if( (creg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_READ)) >= 0 ) {
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if(EEINST_ISLIVE1(_Rt_)) {
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if( _Fs_ < 16 ) {
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// zero extending
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@ -211,6 +214,9 @@ static void recCFC2()
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static void recCTC2()
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{
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#ifdef __x86_64__
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int mmreg;
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#endif
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if (cpuRegs.code & 1) {
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iFlushCall(IS_X8664?(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86):FLUSH_NOCONST);
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CALLFunc((uptr)_vu0WaitMicro);
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@ -276,7 +282,7 @@ static void recCTC2()
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assert( (g_cpuConstRegs[_Rt_].UL[0]&0xffff0000)==0);
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#ifdef __x86_64__
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if( (int mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE)) >= 0 )
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if( (mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE)) >= 0 )
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MOV32ItoR(mmreg, g_cpuConstRegs[_Rt_].UL[0]);
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else
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#else
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@ -358,7 +364,7 @@ static void recCTC2()
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default:
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{
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#ifdef __x86_64__
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if( (int mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE)) >= 0 )
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if( (mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE)) >= 0 )
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_eeMoveGPRtoR(mmreg, _Rt_);
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else
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#else
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