diff --git a/plugins/zerospu2/zerospu2.cpp b/plugins/zerospu2/zerospu2.cpp
index 6d9270c247..7443126aea 100644
--- a/plugins/zerospu2/zerospu2.cpp
+++ b/plugins/zerospu2/zerospu2.cpp
@@ -94,8 +94,10 @@ void InitADSR();
 
 // functions of main emu, called on spu irq
 void (*irqCallbackSPU2)()=0;
+#ifndef ENABLE_NEW_IOPDMA_SPU2
 void (*irqCallbackDMA4)()=0;
 void (*irqCallbackDMA7)()=0;
+#endif
 
 uptr g_pDMABaseAddr=0;
 
@@ -402,7 +404,9 @@ void CALLBACK SPU2async(u32 cycle)
 		if (SPUCycles - SPUStartCycle[1] >= SPUTargetCycle[1])
 		{
 			interrupt &= ~(1<<2);
+#ifndef ENABLE_NEW_IOPDMA_SPU2
 			irqCallbackDMA7();
+#endif
 		}
 		
 	}
@@ -412,7 +416,9 @@ void CALLBACK SPU2async(u32 cycle)
 		if (SPUCycles - SPUStartCycle[0] >= SPUTargetCycle[0])
 		{
 			interrupt &= ~(1<<1);
+#ifndef ENABLE_NEW_IOPDMA_SPU2
 			irqCallbackDMA4();
+#endif
 		}
 	}
 
@@ -600,10 +606,12 @@ void MixChannels(s32 core)
 						interrupt &= ~(0x2 * (core + 1));
 						WARN_LOG("Stopping double interrupt DMA7\n");
 					}
+#ifndef ENABLE_NEW_IOPDMA_SPU2
 					if (core == 0)
 						irqCallbackDMA4();
 					else
 						irqCallbackDMA7();
+#endif
 					
 				}
 				if (core == 1) Adma->Enabled = 2;
@@ -1386,6 +1394,13 @@ void CALLBACK SPU2setDMABaseAddr(uptr baseaddr)
 	g_pDMABaseAddr = baseaddr;
 }
 
+#ifdef ENABLE_NEW_IOPDMA_SPU2
+void CALLBACK SPU2irqCallback(void (*SPU2callback)())
+{
+	LOG_CALLBACK("SPU2irqCallback()\n");
+	irqCallbackSPU2 = SPU2callback;
+}
+#else
 void CALLBACK SPU2irqCallback(void (*SPU2callback)(),void (*DMA4callback)(),void (*DMA7callback)())
 {
 	LOG_CALLBACK("SPU2irqCallback()\n");
@@ -1393,6 +1408,7 @@ void CALLBACK SPU2irqCallback(void (*SPU2callback)(),void (*DMA4callback)(),void
 	irqCallbackDMA4 = DMA4callback;
 	irqCallbackDMA7 = DMA7callback;
 }
+#endif
 
 s32 CALLBACK SPU2test()
 {