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x86regs: iCore.h cleanup. (#7769) 

* VU: Make _x86regs.reg signed, as -1 is supposed to indicate that it is unassigned.

* VU: Convert a few defines to enums.

* microVU: Set bool to true rather than 1.

* xmm: Use std:array in a few spots, and make initializing some spots less verbose.

* iCore: Remove comment, as it's inaccurate. Leaving as s8 for consistency with xmm.
This commit is contained in:
arcum42 2023-01-06 21:40:09 -08:00 committed by GitHub
parent e4c9416c4a
commit fab7424ebb
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2 changed files with 36 additions and 37 deletions
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52
pcsx2/x86/iCore.h
View File

@ -61,38 +61,44 @@
#define PROCESS_CONSTT 2
// XMM caching helpers
#define XMMINFO_READLO 0x001
#define XMMINFO_READHI 0x002
#define XMMINFO_WRITELO 0x004
#define XMMINFO_WRITEHI 0x008
#define XMMINFO_WRITED 0x010
#define XMMINFO_READD 0x020
#define XMMINFO_READS 0x040
#define XMMINFO_READT 0x080
#define XMMINFO_READACC 0x200
#define XMMINFO_WRITEACC 0x400
#define XMMINFO_WRITET 0x800
enum xmminfo : u16
{
XMMINFO_READLO = 0x001,
XMMINFO_READHI = 0x002,
XMMINFO_WRITELO = 0x004,
XMMINFO_WRITEHI = 0x008,
XMMINFO_WRITED = 0x010,
XMMINFO_READD = 0x020,
XMMINFO_READS = 0x040,
XMMINFO_READT = 0x080,
XMMINFO_READACC = 0x200,
XMMINFO_WRITEACC = 0x400,
XMMINFO_WRITET = 0x800,
#define XMMINFO_64BITOP 0x1000
#define XMMINFO_FORCEREGS 0x2000
#define XMMINFO_FORCEREGT 0x4000
#define XMMINFO_NORENAME 0x8000 // disables renaming of Rs to Rt in Rt = Rs op imm
XMMINFO_64BITOP = 0x1000,
XMMINFO_FORCEREGS = 0x2000,
XMMINFO_FORCEREGT = 0x4000,
XMMINFO_NORENAME = 0x8000 // disables renaming of Rs to Rt in Rt = Rs op imm
};
////////////////////////////////////////////////////////////////////////////////
// X86 (32-bit) Register Allocation Tools
#define X86TYPE_TEMP 0
#define X86TYPE_GPR 1
#define X86TYPE_FPRC 2
#define X86TYPE_VIREG 3
#define X86TYPE_PCWRITEBACK 4
#define X86TYPE_PSX 5
#define X86TYPE_PSX_PCWRITEBACK 6
enum x86type : u8
{
X86TYPE_TEMP = 0,
X86TYPE_GPR = 1,
X86TYPE_FPRC = 2,
X86TYPE_VIREG = 3,
X86TYPE_PCWRITEBACK = 4,
X86TYPE_PSX = 5,
X86TYPE_PSX_PCWRITEBACK = 6
};
struct _x86regs
{
u8 inuse;
u8 reg; // value of 0 - not used
s8 reg;
u8 mode;
u8 needed;
u8 type; // X86TYPE_

21
pcsx2/x86/microVU_IR.h
View File

@ -15,6 +15,7 @@
#pragma once
#include "microVU.h"
#include <array>
union regInfo
{
@ -244,8 +245,8 @@ protected:
static const int xmmTotal = iREGCNT_XMM - 1; // PQ register is reserved
static const int gprTotal = iREGCNT_GPR;
microMapXMM xmmMap[xmmTotal];
microMapGPR gprMap[gprTotal];
std::array<microMapXMM, xmmTotal> xmmMap;
std::array<microMapGPR, gprTotal> gprMap;
int counter; // Current allocation count
int index; // VU0 or VU1
@ -356,7 +357,7 @@ public:
index = _index;
// mark gpr registers as usable
std::memset(gprMap, 0, sizeof(gprMap));
gprMap.fill({0, 0, false, false, false, false});
for (int i = 0; i < gprTotal; i++)
{
if (i == gprT1.GetId() || i == gprT2.GetId() ||
@ -561,11 +562,7 @@ public:
}
// needed gets cleared in iCore.
clear.VFreg = -1;
clear.count = 0;
clear.xyzw = 0;
clear.isNeeded = 0;
clear.isZero = 0;
clear = {-1, 0, 0, false, false};
}
for (int i = 0; i < gprTotal; i++)
@ -633,11 +630,7 @@ public:
pxmmregs[regId].inuse = false;
}
clear.VFreg = -1;
clear.count = 0;
clear.xyzw = 0;
clear.isNeeded = 0;
clear.isZero = 0;
clear = {-1, 0, 0, false, false};
}
void clearRegVF(int VFreg)
@ -783,7 +776,7 @@ public:
// To load a temp reg use the default param values, vfLoadReg = -1 and vfWriteReg = -1.
// To load a full reg which won't be modified and you want cached, specify vfLoadReg >= 0 and vfWriteReg = -1
// To load a reg which you don't want written back or cached, specify vfLoadReg >= 0 and vfWriteReg = 0
const xmm& allocReg(int vfLoadReg = -1, int vfWriteReg = -1, int xyzw = 0, bool cloneWrite = 1)
const xmm& allocReg(int vfLoadReg = -1, int vfWriteReg = -1, int xyzw = 0, bool cloneWrite = true)
{
//DevCon.WriteLn("vfLoadReg = %02d, vfWriteReg = %02d, xyzw = %x, clone = %d",vfLoadReg,vfWriteReg,xyzw,(int)cloneWrite);
counter++;