mirror of https://github.com/PCSX2/pcsx2.git
microVU: some lower opcode changes...
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@861 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes
parent
e0c3ecbc8f
commit
fa134fb61b
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@ -23,110 +23,108 @@
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// Micro VU Micromode Lower instructions
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//------------------------------------------------------------------
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#define testZero(xmmReg, xmmTemp, gprTemp) { \
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SSE_XORPS_XMM_to_XMM(xmmTemp, xmmTemp); /* Clear xmmTemp (make it 0) */ \
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SSE_CMPEQPS_XMM_to_XMM(xmmTemp, xmmReg); /* Set all F's if each vector is zero */ \
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SSE_MOVMSKPS_XMM_to_R32(gprTemp, xmmTemp); /* Move the sign bits */ \
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TEST32ItoR(gprTemp, 1); /* Test "Is Zero" bit */ \
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}
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microVUf(void) mVU_DIV() {
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microVU* mVU = mVUx;
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if (!recPass) { mVUanalyzeFDIV<vuIndex>(_Fs_, _Fsf_, _Ft_, _Ftf_); }
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else {
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u8 *pjmp, *pjmp1;
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u32 *ajmp32, *bjmp32;
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u8 *ajmp, *bjmp, *cjmp, *djmp;
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getReg5(xmmFs, _Fs_, _Fsf_);
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getReg5(xmmFt, _Ft_, _Ftf_);
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// FT can be zero here! so we need to check if its zero and set the correct flag.
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SSE_XORPS_XMM_to_XMM(xmmT1, xmmT1); // Clear xmmT1
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SSE_CMPEQPS_XMM_to_XMM(xmmT1, xmmFt); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); // Move the sign bits of the previous calculation
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testZero(xmmFt, xmmT1, gprT1); // Test if Ft is zero
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cjmp = JZ8(0); // Skip if not zero
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AND32ItoR(gprT1, 1); // Grab "Is Zero" bits from the previous calculation
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ajmp32 = JZ32(0); // Skip if none are
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SSE_XORPS_XMM_to_XMM(xmmT1, xmmT1); // Clear xmmT1
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SSE_CMPEQPS_XMM_to_XMM(xmmT1, xmmFs); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); // Move the sign bits of the previous calculation
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AND32ItoR(gprT1, 1); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0);
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testZero(xmmFs, xmmT1, gprT1); // Test if Fs is zero
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ajmp = JZ8(0);
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MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Set invalid flag (0/0)
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pjmp1 = JMP8(0);
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x86SetJ8(pjmp);
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bjmp = JMP8(0);
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x86SetJ8(ajmp);
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MOV32ItoM((uptr)&mVU->divFlag, 0x820); // Zero divide (only when not 0/0)
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x86SetJ8(pjmp1);
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x86SetJ8(bjmp);
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SSE_XORPS_XMM_to_XMM(xmmFs, xmmFt);
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SSE_ANDPS_M128_to_XMM(xmmFs, (uptr)mVU_signbit);
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SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // If division by zero, then xmmFs = +/- fmax
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bjmp32 = JMP32(0);
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x86SetJ32(ajmp32);
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MOV32ItoM((uptr)&mVU->divFlag, 0); // Clear I/D flags
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SSE_DIVSS_XMM_to_XMM(xmmFs, xmmFt);
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mVUclamp1<vuIndex>(xmmFs, xmmFt, 8);
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x86SetJ32(bjmp32);
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djmp = JMP8(0);
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x86SetJ8(cjmp);
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MOV32ItoM((uptr)&mVU->divFlag, 0); // Clear I/D flags
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SSE_DIVSS_XMM_to_XMM(xmmFs, xmmFt);
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mVUclamp1<vuIndex>(xmmFs, xmmFt, 8);
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x86SetJ8(djmp);
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mVUunpack_xyzw<vuIndex>(xmmFs, xmmFs, 0);
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mVUmergeRegs<vuIndex>(xmmPQ, xmmFs, writeQ ? 4 : 8);
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}
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}
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microVUf(void) mVU_SQRT() {
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microVU* mVU = mVUx;
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if (!recPass) { mVUanalyzeFDIV<vuIndex>(0, 0, _Ft_, _Ftf_); }
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else {
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//u8* pjmp;
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u8* ajmp;
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getReg5(xmmFt, _Ft_, _Ftf_);
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MOV32ItoM((uptr)&mVU->divFlag, 0); // Clear I/D flags
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//AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags
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/* Check for negative sqrt */
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//SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmFt);
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//AND32ItoR(gprT1, 1); //Check sign
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//pjmp = JZ8(0); //Skip if none are
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// OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); // Invalid Flag - Negative number sqrt
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//x86SetJ8(pjmp);
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SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmFt);
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AND32ItoR(gprT1, 1); //Check sign
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ajmp = JZ8(0); //Skip if none are
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MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Invalid Flag - Negative number sqrt
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SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt
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x86SetJ8(ajmp);
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SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt
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if (CHECK_VU_OVERFLOW) SSE_MINSS_XMM_to_XMM(xmmFt, xmmMax); // Clamp infinities (only need to do positive clamp since xmmFt is positive)
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SSE_SQRTSS_XMM_to_XMM(xmmFt, xmmFt);
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mVUunpack_xyzw<vuIndex>(xmmFt, xmmFt, 0);
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mVUmergeRegs<vuIndex>(xmmPQ, xmmFt, writeQ ? 4 : 8);
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}
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}
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microVUf(void) mVU_RSQRT() {
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microVU* mVU = mVUx;
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if (!recPass) { mVUanalyzeFDIV<vuIndex>(_Fs_, _Fsf_, _Ft_, _Ftf_); }
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else {
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u8 *ajmp8, *bjmp8;
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u8 *ajmp8, *bjmp8, *cjmp8, *djmp8;
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getReg5(xmmFs, _Fs_, _Fsf_);
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getReg5(xmmFt, _Ft_, _Ftf_);
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MOV32ItoM((uptr)&mVU->divFlag, 0); // Clear I/D flags
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//AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags
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/* Check for negative divide */
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//SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1);
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//AND32ItoR(gprT1, 1); //Check sign
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//ajmp8 = JZ8(0); //Skip if none are
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// OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); // Invalid Flag - Negative number sqrt
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//x86SetJ8(ajmp8);
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SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1);
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AND32ItoR(gprT1, 1); //Check sign
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ajmp8 = JZ8(0); //Skip if none are
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MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Invalid Flag - Negative number sqrt
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SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt
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x86SetJ8(ajmp8);
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SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt
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SSE_SQRTSS_XMM_to_XMM(xmmFt, xmmFt);
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testZero(xmmFt, xmmT1, gprT1); // Test if Ft is zero
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ajmp8 = JZ8(0); // Skip if not zero
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// Ft can still be zero here! so we need to check if its zero and set the correct flag.
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SSE_XORPS_XMM_to_XMM(xmmT1, xmmT1); // Clear t1reg
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SSE_CMPEQSS_XMM_to_XMM(xmmT1, xmmFt); // Set all F's if each vector is zero
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testZero(xmmFs, xmmT1, gprT1); // Test if Fs is zero
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bjmp8 = JZ8(0); // Skip if none are
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MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Set invalid flag (0/0)
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cjmp8 = JMP8(0);
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x86SetJ8(bjmp8);
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MOV32ItoM((uptr)&mVU->divFlag, 0x820); // Zero divide flag (only when not 0/0)
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x86SetJ8(cjmp8);
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SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); // Move the sign bits of the previous calculation
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AND32ItoR(gprT1, 1); // Grab "Is Zero" bits from the previous calculation
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ajmp8 = JZ8(0); // Skip if none are
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//OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820); // Zero divide flag
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SSE_ANDPS_M128_to_XMM(xmmFs, (uptr)mVU_signbit);
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SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // EEREC_TEMP = +/-Max
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bjmp8 = JMP8(0);
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SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // xmmFs = +/-Max
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djmp8 = JMP8(0);
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x86SetJ8(ajmp8);
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SSE_DIVSS_XMM_to_XMM(xmmFs, xmmFt);
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mVUclamp1<vuIndex>(xmmFs, xmmFt, 8);
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x86SetJ8(bjmp8);
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x86SetJ8(djmp8);
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mVUunpack_xyzw<vuIndex>(xmmFs, xmmFs, 0);
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mVUmergeRegs<vuIndex>(xmmPQ, xmmFs, writeQ ? 4 : 8);
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@ -140,6 +138,7 @@ microVUf(void) mVU_RSQRT() {
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SSE_MULSS_M32_to_XMM(xmmFt, (uptr)addr); \
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SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFt); \
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}
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microVUt(void) mVU_EATAN_() {
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microVU* mVU = mVUx;
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@ -159,6 +158,7 @@ microVUt(void) mVU_EATAN_() {
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SSE_ADDSS_M32_to_XMM(xmmPQ, (uptr)mVU_Pi4);
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6);
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}
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microVUf(void) mVU_EATAN() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -174,6 +174,7 @@ microVUf(void) mVU_EATAN() {
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mVU_EATAN_<vuIndex>();
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}
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}
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microVUf(void) mVU_EATANxy() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -190,6 +191,7 @@ microVUf(void) mVU_EATANxy() {
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mVU_EATAN_<vuIndex>();
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}
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}
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microVUf(void) mVU_EATANxz() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -206,12 +208,14 @@ microVUf(void) mVU_EATANxz() {
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mVU_EATAN_<vuIndex>();
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}
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}
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#define eexpHelper(addr) { \
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SSE_MULSS_XMM_to_XMM(xmmT1, xmmFs); \
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SSE_MOVAPS_XMM_to_XMM(xmmFt, xmmT1); \
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SSE_MULSS_M32_to_XMM(xmmFt, (uptr)addr); \
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SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFt); \
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}
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microVUf(void) mVU_EEXP() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -243,6 +247,7 @@ microVUf(void) mVU_EEXP() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUt(void) mVU_sumXYZ() {
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// regd.x = x ^ 2 + y ^ 2 + z ^ 2
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if( cpucaps.hasStreamingSIMD4Extensions ) {
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@ -258,6 +263,7 @@ microVUt(void) mVU_sumXYZ() {
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SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFs); // x ^ 2 + y ^ 2 + z ^ 2
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}
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}
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microVUf(void) mVU_ELENG() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -269,6 +275,7 @@ microVUf(void) mVU_ELENG() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUf(void) mVU_ERCPR() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -282,6 +289,7 @@ microVUf(void) mVU_ERCPR() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUf(void) mVU_ERLENG() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -296,6 +304,7 @@ microVUf(void) mVU_ERLENG() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUf(void) mVU_ERSADD() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -310,6 +319,7 @@ microVUf(void) mVU_ERSADD() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUf(void) mVU_ERSQRT() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -323,6 +333,7 @@ microVUf(void) mVU_ERSQRT() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUf(void) mVU_ESADD() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -333,12 +344,14 @@ microVUf(void) mVU_ESADD() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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#define esinHelper(addr) { \
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SSE_MULSS_XMM_to_XMM(xmmT1, xmmFt); \
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SSE_MOVAPS_XMM_to_XMM(xmmFs, xmmT1); \
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SSE_MULSS_M32_to_XMM(xmmFs, (uptr)addr); \
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SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFs); \
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}
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microVUf(void) mVU_ESIN() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -364,6 +377,7 @@ microVUf(void) mVU_ESIN() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUf(void) mVU_ESQRT() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -374,6 +388,7 @@ microVUf(void) mVU_ESQRT() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back
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}
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}
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microVUf(void) mVU_ESUM() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -400,6 +415,7 @@ microVUf(void) mVU_FCAND() {
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mVUallocVIb<vuIndex>(gprT1, 1);
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}
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}
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microVUf(void) mVU_FCEQ() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -411,6 +427,7 @@ microVUf(void) mVU_FCEQ() {
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mVUallocVIb<vuIndex>(gprT1, 1);
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}
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}
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microVUf(void) mVU_FCGET() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -420,6 +437,7 @@ microVUf(void) mVU_FCGET() {
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mVUallocVIb<vuIndex>(gprT1, _Ft_);
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}
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}
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microVUf(void) mVU_FCOR() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -431,6 +449,7 @@ microVUf(void) mVU_FCOR() {
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mVUallocVIb<vuIndex>(gprT1, 1);
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}
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}
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microVUf(void) mVU_FCSET() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -450,6 +469,7 @@ microVUf(void) mVU_FMAND() {
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mVUallocVIb<vuIndex>(gprT1, _Ft_);
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}
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}
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microVUf(void) mVU_FMEQ() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -462,6 +482,7 @@ microVUf(void) mVU_FMEQ() {
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mVUallocVIb<vuIndex>(gprT1, _Ft_);
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}
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}
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microVUf(void) mVU_FMOR() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -482,6 +503,7 @@ microVUf(void) mVU_FSAND() {
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mVUallocVIb<vuIndex>(gprT1, _Ft_);
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}
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}
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microVUf(void) mVU_FSEQ() {
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microVU* mVU = mVUx;
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if (!recPass) {}
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@ -493,6 +515,7 @@ microVUf(void) mVU_FSEQ() {
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mVUallocVIb<vuIndex>(gprT1, _Ft_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_FSOR() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -502,6 +525,7 @@ microVUf(void) mVU_FSOR() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Ft_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_FSSET() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -528,6 +552,7 @@ microVUf(void) mVU_IADD() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Fd_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IADDI() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -537,6 +562,7 @@ microVUf(void) mVU_IADDI() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Ft_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IADDIU() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -546,6 +572,7 @@ microVUf(void) mVU_IADDIU() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Ft_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IAND() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -558,6 +585,7 @@ microVUf(void) mVU_IAND() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Fd_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IOR() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -570,6 +598,7 @@ microVUf(void) mVU_IOR() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Fd_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ISUB() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -586,6 +615,7 @@ microVUf(void) mVU_ISUB() {
|
|||
else { PXORRtoR(mmVI(_Fd_), mmVI(_Fd_)); }
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ISUBIU() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -604,6 +634,7 @@ microVUf(void) mVU_MOVE() {
|
|||
mVUsaveReg<vuIndex>(xmmT1, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MFIR() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) { /*If (!_Ft_) nop();*/ }
|
||||
|
|
@ -615,6 +646,7 @@ microVUf(void) mVU_MFIR() {
|
|||
mVUsaveReg<vuIndex>(xmmT1, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MFP() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) { /*If (!_Ft_) nop();*/ }
|
||||
|
|
@ -623,6 +655,7 @@ microVUf(void) mVU_MFP() {
|
|||
mVUsaveReg<vuIndex>(xmmFt, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MTIR() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -631,6 +664,7 @@ microVUf(void) mVU_MTIR() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Ft_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MR32() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) { /*If (!_Ft_) nop();*/ }
|
||||
|
|
@ -659,6 +693,7 @@ microVUf(void) mVU_ILW() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ILWR() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) { /*If (!_Ft_) nop();*/ }
|
||||
|
|
@ -676,6 +711,7 @@ microVUf(void) mVU_ILWR() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ISW() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -700,6 +736,7 @@ microVUf(void) mVU_ISW() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ISWR() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -740,6 +777,7 @@ microVUf(void) mVU_LQ() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_LQD() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -760,6 +798,7 @@ microVUf(void) mVU_LQD() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_LQI() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -781,6 +820,7 @@ microVUf(void) mVU_LQI() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_SQ() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -798,6 +838,7 @@ microVUf(void) mVU_SQ() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_SQD() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -816,6 +857,7 @@ microVUf(void) mVU_SQD() {
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_SQI() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -848,6 +890,7 @@ microVUf(void) mVU_RINIT() {
|
|||
else MOV32ItoR(gprR, 0x3f800000);
|
||||
}
|
||||
}
|
||||
|
||||
microVUt(void) mVU_RGET_() {
|
||||
microVU* mVU = mVUx;
|
||||
if (_Ft_) {
|
||||
|
|
@ -857,11 +900,13 @@ microVUt(void) mVU_RGET_() {
|
|||
if (_W) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[3], gprR);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_RGET() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) { /*if (!_Ft_) nop();*/ }
|
||||
else { mVU_RGET_<vuIndex>(); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_RNEXT() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) { /*if (!_Ft_) nop();*/ }
|
||||
|
|
@ -883,6 +928,7 @@ microVUf(void) mVU_RNEXT() {
|
|||
mVU_RGET_<vuIndex>();
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_RXOR() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -900,6 +946,7 @@ microVUf(void) mVU_WAITP() {
|
|||
if (!recPass) {}
|
||||
else {}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_WAITQ() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
@ -914,6 +961,7 @@ microVUf(void) mVU_XTOP() {
|
|||
mVUallocVIb<vuIndex>(gprT1, _Ft_);
|
||||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_XITOP() {
|
||||
microVU* mVU = mVUx;
|
||||
if (!recPass) {}
|
||||
|
|
|
|||
Loading…
Reference in New Issue