mirror of https://github.com/PCSX2/pcsx2.git
microVU:
- Rewrote and simplified the TriAce gamefix VU interpreter: - Implemented a TriAce gamefix for vu0 interpreter git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4960 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes
parent
c234e1f6dd
commit
f423a9c41d
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@ -339,6 +339,36 @@ static __fi float vuDouble(u32 f)
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}
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#endif
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static __fi float vuADD_TriAceHack(u32 a, u32 b) {
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// On VU0 TriAce Games use ADDi and expects these bit-perfect results:
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//if (a == 0xb3e2a619 && b == 0x42546666) return vuDouble(0x42546666);
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//if (a == 0x8b5b19e9 && b == 0xc7f079b3) return vuDouble(0xc7f079b3);
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if (a == 0x4b1ed4a8 && b == 0x43a02666) return vuDouble(0x4b1ed5e7);
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//if (a == 0x7d1ca47b && b == 0x42f23333) return vuDouble(0x7d1ca47b);
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// In the 3rd case, some other rounding error is giving us incorrect
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// operands ('a' is wrong); and therefor an incorrect result.
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// We're getting: 0x4b1ed4a8 + 0x43a02666 = 0x4b1ed5e8
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// We should be getting: 0x4b1ed4a7 + 0x43a02666 = 0x4b1ed5e7
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// microVU gets the correct operands and result. The interps likely
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// don't get it due to rounding towards nearest in other calculations.
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if (0) {
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// microVU uses something like this to get TriAce games working,
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// but VU interpreters don't seem to need it currently:
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s32 aExp = (a >> 23) & 0xff;
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s32 bExp = (b >> 23) & 0xff;
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if (aExp - bExp >= 25) b &= 0x80000000;
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if (aExp - bExp <=-25) a &= 0x80000000;
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float ret = vuDouble(a) + vuDouble(b);
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DevCon.WriteLn("aExp = %d, bExp = %d", aExp, bExp);
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DevCon.WriteLn("0x%08x + 0x%08x = 0x%08x", a, b, (u32&)ret);
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DevCon.WriteLn("%f + %f = %f", vuDouble(a), vuDouble(b), ret);
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return ret;
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}
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return vuDouble(a) + vuDouble(b);
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}
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void _vuABS(VURegs * VU) {
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if (_Ft_ == 0) return;
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@ -367,11 +397,21 @@ static __fi void _vuADDi(VURegs * VU) {
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if (_Fd_ == 0) dst = &RDzero;
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else dst = &VU->VF[_Fd_];
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if (_X){ dst->i.x = VU_MACx_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.x) + vuDouble(VU->VI[REG_I].UL));} else VU_MACx_CLEAR(VU);
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if (_Y){ dst->i.y = VU_MACy_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.y) + vuDouble(VU->VI[REG_I].UL));} else VU_MACy_CLEAR(VU);
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if (_Z){ dst->i.z = VU_MACz_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.z) + vuDouble(VU->VI[REG_I].UL));} else VU_MACz_CLEAR(VU);
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if (_W){ dst->i.w = VU_MACw_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.w) + vuDouble(VU->VI[REG_I].UL));} else VU_MACw_CLEAR(VU);
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VU_STAT_UPDATE(VU);
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if (!CHECK_VUADDSUBHACK) {
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if (_X){ dst->i.x = VU_MACx_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.x) + vuDouble(VU->VI[REG_I].UL));} else VU_MACx_CLEAR(VU);
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if (_Y){ dst->i.y = VU_MACy_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.y) + vuDouble(VU->VI[REG_I].UL));} else VU_MACy_CLEAR(VU);
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if (_Z){ dst->i.z = VU_MACz_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.z) + vuDouble(VU->VI[REG_I].UL));} else VU_MACz_CLEAR(VU);
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if (_W){ dst->i.w = VU_MACw_UPDATE(VU, vuDouble(VU->VF[_Fs_].i.w) + vuDouble(VU->VI[REG_I].UL));} else VU_MACw_CLEAR(VU);
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VU_STAT_UPDATE(VU);
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}
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else {
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if (_X){ dst->i.x = VU_MACx_UPDATE(VU, vuADD_TriAceHack(VU->VF[_Fs_].i.x, VU->VI[REG_I].UL));} else VU_MACx_CLEAR(VU);
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if (_Y){ dst->i.y = VU_MACy_UPDATE(VU, vuADD_TriAceHack(VU->VF[_Fs_].i.y, VU->VI[REG_I].UL));} else VU_MACy_CLEAR(VU);
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if (_Z){ dst->i.z = VU_MACz_UPDATE(VU, vuADD_TriAceHack(VU->VF[_Fs_].i.z, VU->VI[REG_I].UL));} else VU_MACz_CLEAR(VU);
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if (_W){ dst->i.w = VU_MACw_UPDATE(VU, vuADD_TriAceHack(VU->VF[_Fs_].i.w, VU->VI[REG_I].UL));} else VU_MACw_CLEAR(VU);
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VU_STAT_UPDATE(VU);
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}
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}/*Reworked from define to function. asadr*/
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static __fi void _vuADDq(VURegs * VU) {
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@ -214,8 +214,7 @@ void mVUmergeRegs(const xmm& dest, const xmm& src, int xyzw, bool modXYZW)
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//------------------------------------------------------------------
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// Backup Volatile Regs (EAX, ECX, EDX, MM0~7, XMM0~7, are all volatile according to 32bit Win/Linux ABI)
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__fi void mVUbackupRegs(microVU& mVU, bool toMemory = false)
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{
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__fi void mVUbackupRegs(microVU& mVU, bool toMemory = false) {
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if (toMemory) {
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for(int i = 0; i < 8; i++) {
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xMOVAPS(ptr128[&mVU.xmmBackup[i][0]], xmm(i));
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@ -228,8 +227,7 @@ __fi void mVUbackupRegs(microVU& mVU, bool toMemory = false)
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}
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// Restore Volatile Regs
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__fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false)
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{
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__fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false) {
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if (fromMemory) {
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for(int i = 0; i < 8; i++) {
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xMOVAPS(xmm(i), ptr128[&mVU.xmmBackup[i][0]]);
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@ -238,6 +236,20 @@ __fi void mVUrestoreRegs(microVU& mVU, bool fromMemory = false)
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else xMOVAPS(xmmPQ, ptr128[&mVU.xmmBackup[xmmPQ.Id][0]]);
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}
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_mVUt void __fc mVUprintRegs() {
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microVU& mVU = mVUx;
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for(int i = 0; i < 8; i++) {
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Console.WriteLn("xmm%d = [0x%08x,0x%08x,0x%08x,0x%08x]", i,
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mVU.xmmBackup[i][0], mVU.xmmBackup[i][1],
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mVU.xmmBackup[i][2], mVU.xmmBackup[i][3]);
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}
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for(int i = 0; i < 8; i++) {
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Console.WriteLn("xmm%d = [%f,%f,%f,%f]", i,
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(float&)mVU.xmmBackup[i][0], (float&)mVU.xmmBackup[i][1],
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(float&)mVU.xmmBackup[i][2], (float&)mVU.xmmBackup[i][3]);
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}
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}
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// Gets called by mVUaddrFix at execution-time
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static void __fc mVUwarningRegAccess(u32 prog, u32 pc) {
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Console.Error("microVU0 Warning: Accessing VU1 Regs! [%04x] [%x]", pc, prog);
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@ -288,12 +300,13 @@ __fi void mVUaddrFix(mV, const x32& gprReg)
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// Micro VU - Custom SSE Instructions
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//------------------------------------------------------------------
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struct SSEMaskPair { u32 mask1[4], mask2[4]; };
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struct SSEMasks { u32 MIN_MAX_1[4], MIN_MAX_2[4], ADD_SS[4]; };
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static const __aligned16 SSEMaskPair MIN_MAX =
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static const __aligned16 SSEMasks sseMasks =
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{
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{0xffffffff, 0x80000000, 0xffffffff, 0x80000000},
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{0x00000000, 0x40000000, 0x00000000, 0x40000000}
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{0x00000000, 0x40000000, 0x00000000, 0x40000000},
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{0x80000000, 0xffffffff, 0xffffffff, 0xffffffff}
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};
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@ -306,21 +319,21 @@ void MIN_MAX_PS(microVU& mVU, const xmm& to, const xmm& from, const xmm& t1in, c
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if (0) { // use double comparison
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// ZW
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xPSHUF.D(t1, to, 0xfa);
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xPAND (t1, ptr128[MIN_MAX.mask1]);
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xPOR (t1, ptr128[MIN_MAX.mask2]);
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xPAND (t1, ptr128[sseMasks.MIN_MAX_1]);
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xPOR (t1, ptr128[sseMasks.MIN_MAX_2]);
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xPSHUF.D(t2, from, 0xfa);
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xPAND (t2, ptr128[MIN_MAX.mask1]);
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xPOR (t2, ptr128[MIN_MAX.mask2]);
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xPAND (t2, ptr128[sseMasks.MIN_MAX_1]);
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xPOR (t2, ptr128[sseMasks.MIN_MAX_2]);
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if (min) xMIN.PD(t1, t2);
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else xMAX.PD(t1, t2);
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// XY
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xPSHUF.D(t2, from, 0x50);
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xPAND (t2, ptr128[MIN_MAX.mask1]);
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xPOR (t2, ptr128[MIN_MAX.mask2]);
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xPAND (t2, ptr128[sseMasks.MIN_MAX_1]);
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xPOR (t2, ptr128[sseMasks.MIN_MAX_2]);
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xPSHUF.D(to, to, 0x50);
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xPAND (to, ptr128[MIN_MAX.mask1]);
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xPOR (to, ptr128[MIN_MAX.mask2]);
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xPAND (to, ptr128[sseMasks.MIN_MAX_1]);
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xPOR (to, ptr128[sseMasks.MIN_MAX_2]);
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if (min) xMIN.PD(to, t2);
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else xMAX.PD(to, t2);
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@ -355,83 +368,100 @@ void MIN_MAX_SS(mV, const xmm& to, const xmm& from, const xmm& t1in, bool min)
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{
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const xmm& t1 = t1in.IsEmpty() ? mVU.regAlloc->allocReg() : t1in;
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xSHUF.PS(to, from, 0);
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xPAND (to, ptr128[MIN_MAX.mask1]);
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xPOR (to, ptr128[MIN_MAX.mask2]);
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xPAND (to, ptr128[sseMasks.MIN_MAX_1]);
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xPOR (to, ptr128[sseMasks.MIN_MAX_2]);
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xPSHUF.D(t1, to, 0xee);
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if (min) xMIN.PD(to, t1);
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else xMAX.PD(to, t1);
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if (t1 != t1in) mVU.regAlloc->clearNeeded(t1);
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}
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// Warning: Modifies all vectors in 'to' and 'from', and Modifies xmmT1 and xmmT2
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void ADD_SS(microVU& mVU, const xmm& to, const xmm& from, const xmm& t1in, const xmm& t2in)
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// Not Used! - TriAce games only need a portion of this code to boot (see function below)
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// What this code attempts to do is do a floating point ADD with only 1 guard bit,
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// whereas FPU calculations that follow the IEEE standard have 3 guard bits (guard|round|sticky)
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// Warning: Modifies all vectors in 'to' and 'from', and Modifies t1in
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void ADD_SS_Single_Guard_Bit(microVU& mVU, const xmm& to, const xmm& from, const xmm& t1in)
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{
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const xmm& t1 = t1in.IsEmpty() ? mVU.regAlloc->allocReg() : t1in;
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const xmm& t2 = t2in.IsEmpty() ? mVU.regAlloc->allocReg() : t2in;
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xMOVAPS(t1, to);
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xMOVAPS(t2, from);
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xMOVD(ecx, to);
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xSHR(ecx, 23);
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xMOVD(eax, from);
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xSHR(eax, 23);
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xAND(ecx, 0xff);
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xAND(eax, 0xff);
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xSUB(ecx, eax); //ecx = exponent difference
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xMOVD(eax, to);
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xMOVD(ecx, from);
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xSHR (eax, 23);
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xSHR (ecx, 23);
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xAND (eax, 0xff);
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xAND (ecx, 0xff);
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xSUB (ecx, eax); // Exponent Difference
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xCMP(ecx, 25);
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xForwardJGE8 case2;
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xCMP(ecx, 0);
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xForwardJG8 case3;
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xForwardJE8 toend1;
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xCMP(ecx, -25);
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xForwardJLE8 case4;
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xForwardJL8 case_neg;
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xForwardJE8 case_end1;
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// negative small
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xNOT(ecx); // -ecx - 1
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xMOV(eax, 0xffffffff);
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xSHL(eax, cl);
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xPCMP.EQB(to, to);
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xMOVDZX(from, eax);
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xMOVSS(to, from);
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xPCMP.EQB(from, from);
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xForwardJump8 toend2;
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xCMP (ecx, 24);
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xForwardJLE8 case_pos_small;
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case2.SetTarget(); // positive large
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xMOV(eax, 0x80000000);
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xPCMP.EQB(from, from);
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xMOVDZX(to, eax);
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xMOVSS(from, to);
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xPCMP.EQB(to, to);
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xForwardJump8 toend3;
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// case_pos_big:
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xPAND(to, ptr128[sseMasks.ADD_SS]);
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xForwardJump8 case_end2;
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case3.SetTarget(); // positive small
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xDEC(ecx);
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xMOV(eax, 0xffffffff);
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xSHL(eax, cl);
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xPCMP.EQB(from, from);
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xMOVDZX(to, eax);
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xMOVSS(from, to);
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xPCMP.EQB(to, to);
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xForwardJump8 toend4;
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case_pos_small.SetTarget();
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xDEC (ecx);
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xMOV (eax, 0xffffffff);
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xSHL (eax, cl);
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xMOVDZX(t1, eax);
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xPAND (to, t1);
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xForwardJump8 case_end3;
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case4.SetTarget(); // negative large
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xMOV(eax, 0x80000000);
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xPCMP.EQB(to, to);
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xMOVDZX(from, eax);
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xMOVSS(to, from);
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xPCMP.EQB(from, from);
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case_neg.SetTarget();
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xCMP (ecx, -24);
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xForwardJGE8 case_neg_small;
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toend1.SetTarget();
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toend2.SetTarget();
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toend3.SetTarget();
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toend4.SetTarget();
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// case_neg_big:
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xPAND(from, ptr128[sseMasks.ADD_SS]);
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xForwardJump8 case_end4;
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case_neg_small.SetTarget();
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xNOT (ecx); // -ecx - 1
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xMOV (eax, 0xffffffff);
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xSHL (eax, cl);
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xMOVDZX(t1, eax);
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xPAND (from, t1);
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case_end1.SetTarget();
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case_end2.SetTarget();
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case_end3.SetTarget();
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case_end4.SetTarget();
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xAND.PS(to, t1); // to contains mask
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xAND.PS(from, t2); // from contains mask
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xADD.SS(to, from);
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if (t1 != t1in) mVU.regAlloc->clearNeeded(t1);
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if (t2 != t2in) mVU.regAlloc->clearNeeded(t2);
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}
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// Turns out only this is needed to get TriAce games booting with mVU
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// Modifies from's lower vector
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void ADD_SS_TriAceHack(microVU& mVU, const xmm& to, const xmm& from)
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{
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xMOVD(eax, to);
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xMOVD(ecx, from);
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xSHR (eax, 23);
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xSHR (ecx, 23);
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xAND (eax, 0xff);
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xAND (ecx, 0xff);
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xSUB (ecx, eax); // Exponent Difference
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xCMP (ecx, -25);
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xForwardJLE8 case_neg_big;
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xCMP (ecx, 25);
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xForwardJL8 case_end1;
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// case_pos_big:
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xPAND(to, ptr128[sseMasks.ADD_SS]);
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xForwardJump8 case_end2;
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case_neg_big.SetTarget();
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xPAND(from, ptr128[sseMasks.ADD_SS]);
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case_end1.SetTarget();
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case_end2.SetTarget();
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xADD.SS(to, from);
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}
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#define clampOp(opX, isPS) { \
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@ -464,7 +494,7 @@ void SSE_MINSS(mV, const xmm& to, const xmm& from, const xmm& t1 = xEmptyReg, co
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void SSE_ADD2SS(mV, const xmm& to, const xmm& from, const xmm& t1 = xEmptyReg, const xmm& t2 = xEmptyReg)
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{
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if (!CHECK_VUADDSUBHACK) { clampOp(xADD.SS, 0); }
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else { ADD_SS(mVU, to, from, t1, t2); }
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else { ADD_SS_TriAceHack(mVU, to, from); }
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}
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// Does same as SSE_ADDPS since tri-ace games only need SS implementation of VUADDSUBHACK...
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