mirror of https://github.com/PCSX2/pcsx2.git
starting to recode the FPU rec opcodes to set correct flags.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@93 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
cottonvibes
Gregory Hainaut
parent
08e4bab2c4
commit
f35841761d
101
pcsx2/x86/iFPU.c
101
pcsx2/x86/iFPU.c
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@ -27,7 +27,6 @@
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#include "stdio.h" //Linux needs this?
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#include "stdlib.h" //Linux needs this?
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#define REC_FPUBRANCH(f) \
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void f(); \
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void rec##f() { \
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@ -56,6 +55,17 @@
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#define _Fs_ _Rd_
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#define _Fd_ _Sa_
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// FCR31 Flags
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#define FPUflagC 0X00800000
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#define FPUflagI 0X00020000
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#define FPUflagD 0X00010000
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#define FPUflagO 0X00008000
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#define FPUflagU 0X00004000
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#define FPUflagSI 0X00000040
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#define FPUflagSD 0X00000020
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#define FPUflagSO 0X00000010
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#define FPUflagSU 0X00000008
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extern PCSX2_ALIGNED16_DECL(u32 g_minvals[4]);
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extern PCSX2_ALIGNED16_DECL(u32 g_maxvals[4]);
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@ -927,6 +937,7 @@ int recNonCommutativeOp(int info, int regd, int op)
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void recADD_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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ClampValues(recCommutativeOp(info, EEREC_D, 0));
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}
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@ -935,7 +946,8 @@ FPURECOMPILE_CONSTCODE(ADD_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
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////////////////////////////////////////////////////
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void recSUB_S_xmm(int info)
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{
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ClampValues(recNonCommutativeOp(info, EEREC_D, 0));
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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ClampValues(recNonCommutativeOp(info, EEREC_D, 0));
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}
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FPURECOMPILE_CONSTCODE(SUB_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
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@ -943,6 +955,7 @@ FPURECOMPILE_CONSTCODE(SUB_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
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////////////////////////////////////////////////////
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void recMUL_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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ClampValues(recCommutativeOp(info, EEREC_D, 1));
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}
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@ -951,6 +964,7 @@ FPURECOMPILE_CONSTCODE(MUL_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
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////////////////////////////////////////////////////
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void recDIV_S_xmm(int info)
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{
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AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags
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ClampValues2(recNonCommutativeOp(info, EEREC_D, 1));
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}
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@ -961,51 +975,51 @@ static u32 PCSX2_ALIGNED16(s_pos[4]) = { 0x7fffffff, 0, 0, 0 };
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void recSQRT_S_xmm(int info)
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{
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int tempReg;
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u8* pjmp;
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SysPrintf("FPU: SQRT \n");
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if( info & PROCESS_EE_T ) {
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//if( CHECK_OVERFLOW ) {
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if( EEREC_D == EEREC_T ) SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
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else {
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SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_T);
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SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
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}
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tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0);
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if (tempReg == -1) {SysPrintf("FPU: SQRT Allocation Error! \n"); tempReg = EAX;}
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SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D);
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//}
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/*else {
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SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_T);
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}*/
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if( info & PROCESS_EE_T ) {
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if ( EEREC_D != EEREC_T ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_T);
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}
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else {
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//if( CHECK_OVERFLOW ) {
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SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Ft_]);
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SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
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else SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Ft_]);
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SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D);
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/*}
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else {
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SSE_SQRTSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Ft_]);
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}*/
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}
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ClampValues(EEREC_D);
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AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags
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/*--- Check for negative SQRT ---*/
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XOR32RtoR(tempReg, tempReg);
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SSE_MOVMSKPS_XMM_to_R32(tempReg, EEREC_D);
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AND32ItoR(tempReg, 1); //Check sign
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pjmp = JZ8(0); //Skip if none are
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OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags
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SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]); // Make EEREC_D Positive
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x86SetJ8(pjmp);
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if (CHECK_FPU_OVERFLOW) // Only need to do positive clamp, since EEREC_D is positive
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SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)&g_maxvals[0]);
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SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D);
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//ClampValues(EEREC_D); // No need to clamp again since SQRT of a number will always be smaller than the original number
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_freeX86reg(tempReg);
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}
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FPURECOMPILE_CONSTCODE(SQRT_S, XMMINFO_WRITED|XMMINFO_READT);
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void recABS_S_xmm(int info)
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{
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if( info & PROCESS_EE_S ) {
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if( EEREC_D != EEREC_S ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S);
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SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
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}
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else {
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SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
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SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
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//xmmregs[EEREC_D].mode &= ~MODE_WRITE;
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}
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ClampValues(EEREC_D);
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else SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
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SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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if (CHECK_FPU_OVERFLOW) // Only need to do positive clamp, since EEREC_D is positive
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SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)&g_maxvals[0]);
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}
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FPURECOMPILE_CONSTCODE(ABS_S, XMMINFO_WRITED|XMMINFO_READS);
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@ -1030,6 +1044,7 @@ void recNEG_S_xmm(int info) {
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SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
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}
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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SSE_XORPS_M128_to_XMM(EEREC_D, (uptr)&s_neg[0]);
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ClampValues(EEREC_D);
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}
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@ -1039,6 +1054,7 @@ FPURECOMPILE_CONSTCODE(NEG_S, XMMINFO_WRITED|XMMINFO_READS);
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void recRSQRT_S_xmm(int info)
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{
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int t0reg = _allocTempXMMreg(XMMT_FPS, -1);
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AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags
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switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) {
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case PROCESS_EE_S:
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if( EEREC_D == EEREC_S ) {
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@ -1089,19 +1105,22 @@ FPURECOMPILE_CONSTCODE(RSQRT_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
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void recADDA_S_xmm(int info)
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{
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AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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ClampValues(recCommutativeOp(info, EEREC_ACC, 0));
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}
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FPURECOMPILE_CONSTCODE(ADDA_S, XMMINFO_WRITEACC|XMMINFO_READS|XMMINFO_READT);
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void recSUBA_S_xmm(int info) {
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ClampValues(recNonCommutativeOp(info, EEREC_ACC, 0));
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void recSUBA_S_xmm(int info) {
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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ClampValues(recNonCommutativeOp(info, EEREC_ACC, 0));
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}
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FPURECOMPILE_CONSTCODE(SUBA_S, XMMINFO_WRITEACC|XMMINFO_READS|XMMINFO_READT);
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void recMULA_S_xmm(int info) {
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ClampValues(recCommutativeOp(info, EEREC_ACC, 1));
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void recMULA_S_xmm(int info) {
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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ClampValues(recCommutativeOp(info, EEREC_ACC, 1));
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}
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FPURECOMPILE_CONSTCODE(MULA_S, XMMINFO_WRITEACC|XMMINFO_READS|XMMINFO_READT);
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@ -1200,6 +1219,7 @@ void recMADDtemp(int info, int regd)
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void recMADD_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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recMADDtemp(info, EEREC_D);
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}
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@ -1207,6 +1227,7 @@ FPURECOMPILE_CONSTCODE(MADD_S, XMMINFO_WRITED|XMMINFO_READACC|XMMINFO_READS|XMMI
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void recMADDA_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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recMADDtemp(info, EEREC_ACC);
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}
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@ -1335,6 +1356,7 @@ void recMSUBtemp(int info, int regd)
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void recMSUB_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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recMSUBtemp(info, EEREC_D);
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}
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@ -1342,6 +1364,7 @@ FPURECOMPILE_CONSTCODE(MSUB_S, XMMINFO_WRITED|XMMINFO_READACC|XMMINFO_READS|XMMI
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void recMSUBA_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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recMSUBtemp(info, EEREC_ACC);
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}
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@ -1430,6 +1453,7 @@ void recCVT_W()
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void recMAX_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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recCommutativeOp(info, EEREC_D, 2);
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}
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@ -1437,6 +1461,7 @@ FPURECOMPILE_CONSTCODE(MAX_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
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void recMIN_S_xmm(int info)
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{
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//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
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recCommutativeOp(info, EEREC_D, 3);
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}
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