mirror of https://github.com/PCSX2/pcsx2.git
modified the Check Overflow speedhacks. now we have "disable VU Overflow checks" and "disable FPU Overflow checks".
they both do the same thing, but one is for the VU recs, and the other is for the FPU recs. heres how they work: when Unchecked, pcsx2 performs overflow checks normally. when Checked, pcsx2 doesn't perform overflow checks, and thus gains a speed boost. when Greyed, pcsx2 performs additional checks which helps stop SPS (spikey polygon syndrome; i.e. messed up polygons on screen) Note: FPU recs need some work, they're not setting correct flags. I'll probably implement this by the end of the week. Hopefully it will fix some games that use those flags. git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@79 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
parent
48fffbba41
commit
f1ac20f12a
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@ -55,6 +55,8 @@
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//------------ SPEED/MISC HACKS!!! ---------------
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#define CHECK_OVERFLOW (!(Config.Hacks & 0x2))
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#define CHECK_EXTRA_OVERFLOW (Config.Hacks & 0x40) // If enabled, Operands are checked for infinities before being used in the VU recs
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#define CHECK_FPU_OVERFLOW (!(Config.Hacks & 0x800))
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#define CHECK_FPU_EXTRA_OVERFLOW (Config.Hacks & 0x1000) // If enabled, Operands are checked for infinities before being used in the FPU recs
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#define CHECK_EESYNC_HACK (Config.Hacks & 0x1)
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#define CHECK_IOPSYNC_HACK (Config.Hacks & 0x10)
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#define CHECK_EE_IOP_EXTRA (Config.Hacks & 0x20)
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@ -722,16 +722,19 @@ BOOL APIENTRY HacksProc(HWND hDlg, UINT message, WPARAM wParam, LPARAM lParam) {
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switch (message) {
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case WM_INITDIALOG:
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if(Config.Hacks & 0x1) CheckDlgButton(hDlg, IDC_SYNCHACK, TRUE);
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if(Config.Hacks & 0x2) CheckDlgButton(hDlg, IDC_OVERFLOWHACK, TRUE);
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if(Config.Hacks & 0x2) CheckDlgButton(hDlg, IDC_VU_OVERFLOWHACK, TRUE);
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if(Config.Hacks & 0x4) CheckDlgButton(hDlg, IDC_SOUNDHACK, TRUE);
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if(Config.Hacks & 0x8) CheckDlgButton(hDlg, IDC_DENORMALS, TRUE);
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if(Config.Hacks & 0x10) CheckDlgButton(hDlg, IDC_SYNCHACK2, TRUE);
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if(Config.Hacks & 0x20) CheckDlgButton(hDlg, IDC_SYNCHACK3, TRUE);
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if(Config.Hacks & 0x40) CheckDlgButton(hDlg, IDC_OVERFLOWHACK_EXTRA, TRUE);
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if(Config.Hacks & 0x40) CheckDlgButton(hDlg, IDC_VU_OVERFLOWHACK, 2);
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if(Config.Hacks & 0x80) CheckDlgButton(hDlg, IDC_FASTBRANCHES, TRUE);
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if(Config.Hacks & 0x100) CheckDlgButton(hDlg, IDC_VUCLIPHACK, TRUE);
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if(Config.Hacks & 0x200) CheckDlgButton(hDlg, IDC_FPUCLAMPHACK, TRUE);
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if(Config.Hacks & 0x400) CheckDlgButton(hDlg, IDC_DENORMALS, 2);
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if(Config.Hacks & 0x800) CheckDlgButton(hDlg, IDC_FPU_OVERFLOWHACK, TRUE);
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if(Config.Hacks & 0x1000) CheckDlgButton(hDlg, IDC_FPU_OVERFLOWHACK, 2);
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return TRUE;
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@ -739,16 +742,16 @@ BOOL APIENTRY HacksProc(HWND hDlg, UINT message, WPARAM wParam, LPARAM lParam) {
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if (LOWORD(wParam) == IDOK) {
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Config.Hacks = 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_SYNCHACK) ? 0x1 : 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_OVERFLOWHACK) ? 0x2 : 0;
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Config.Hacks |= ( IsDlgButtonChecked(hDlg, IDC_VU_OVERFLOWHACK) == 2 ) ? 0x40 : (IsDlgButtonChecked(hDlg, IDC_VU_OVERFLOWHACK) ? 0x2 : 0); // 0x40 == greyed checkbox (extra overflow checking); 0x2 == checked (disable overflow checking)
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_SOUNDHACK) ? 0x4 : 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_SYNCHACK2) ? 0x10 : 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_SYNCHACK3) ? 0x20 : 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_OVERFLOWHACK_EXTRA) ? 0x40 : 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_FASTBRANCHES) ? 0x80 : 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_VUCLIPHACK) ? 0x100 : 0;
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Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_FPUCLAMPHACK) ? 0x200 : 0;
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Config.Hacks |= ( IsDlgButtonChecked(hDlg, IDC_DENORMALS) == 2 ) ? 0x408 : (IsDlgButtonChecked(hDlg, IDC_DENORMALS) ? 0x8 : 0); // 0x408 == greyed checkbox (DaZ SSE flag; so the CPU sets denormals to zero)
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Config.Hacks |= ( IsDlgButtonChecked(hDlg, IDC_FPU_OVERFLOWHACK) == 2 ) ? 0x1000 : (IsDlgButtonChecked(hDlg, IDC_FPU_OVERFLOWHACK) ? 0x800 : 0); // 0x1000 == greyed checkbox (extra overflow checking); 0x800 == checked (disable overflow checking)
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g_sseVUMXCSR = CHECK_DENORMALS;
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SetCPUState(g_sseMXCSR, g_sseVUMXCSR);
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@ -938,38 +938,38 @@ BEGIN
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CONTROL 132,IDC_PS2SILVER_RECT,"Static",SS_BITMAP,0,167,70,74
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END
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IDD_HACKS DIALOGEX 0, 0, 406, 273
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IDD_HACKS DIALOGEX 0, 0, 511, 275
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STYLE DS_SETFONT | DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION | WS_SYSMENU
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CAPTION "PCSX2 Speed Hacks"
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FONT 8, "MS Shell Dlg", 400, 0, 0x1
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BEGIN
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DEFPUSHBUTTON "OK",IDOK,146,252,50,14
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PUSHBUTTON "Cancel",IDCANCEL,202,252,50,14
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CONTROL "EE Sync Hack (x2) - Doubles the cycle rate of the EE.",IDC_SYNCHACK,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,114,252,10
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CONTROL "Disable All Overflow Checks - Doesn't check for overflow at all in the VU Recs.",IDC_OVERFLOWHACK,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,63,373,10
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CTEXT "These hacks will effect the speed of PCSX2 but possibly comprimise on compatability",IDC_HACKDESC,7,7,392,8
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DEFPUSHBUTTON "OK",IDOK,195,254,50,14
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PUSHBUTTON "Cancel",IDCANCEL,251,254,50,14
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CONTROL "EE Sync Hack (x2) - Doubles the cycle rate of the EE. ( Big Speedup in most games! )",IDC_SYNCHACK,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,15,111,418,10
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CONTROL "Disable VU Overflow Checks - *Checked = Disables overflow checks. ( Speedup! ) *Greyed = Extra overflow checks. ( Helps SPS, Slow! )",IDC_VU_OVERFLOWHACK,
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"Button",BS_AUTO3STATE | WS_TABSTOP,14,49,475,10
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CTEXT "These hacks will effect the speed of PCSX2 but possibly comprimise on compatability",IDC_HACKDESC,7,7,497,8
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CONTROL "Tighter SPU2 Sync ( FFXII vids) - Slower, not very useful anymore.",IDC_SOUNDHACK,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,197,323,10
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CONTROL "IOP Sync Hack (x2) - Doubles the cycle rate of the IOP.",IDC_SYNCHACK2,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,128,270,10
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CONTROL "EE/IOP Sync Hack (x3) - Makes EE and IOP hacks triple the cycle rate ( Not Recommended! )",IDC_SYNCHACK3,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,142,359,10
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CONTROL "Enable Extra Overflow Checks - Enable extra overflow checks used to help stop SPS. ( Slow! )",IDC_OVERFLOWHACK_EXTRA,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,50,377,10
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,15,194,421,10
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CONTROL "IOP Sync Hack (x2) - Doubles the cycle rate of the IOP. ( Speedup but breaks some games. )",IDC_SYNCHACK2,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,15,125,410,10
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CONTROL "EE/IOP Sync Hack (x3) - Makes EE and IOP hacks triple the cycle rate. ( Sometimes speeds games a bit more, but can break games. )",IDC_SYNCHACK3,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,139,464,11
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CONTROL "Disable FPU Overflow Checks - *Checked = Disables overflow checks. ( Speedup! ) *Greyed = Extra overflow checks. ( Helps SPS, Slow! )",IDC_FPU_OVERFLOWHACK,
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"Button",BS_AUTO3STATE | WS_TABSTOP,14,63,483,10
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CONTROL "EE/IOP Fast Branches - Quick branching ( Very small speedup; Not Recommended! )",IDC_FASTBRANCHES,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,183,351,10
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CTEXT "If you have problems, disable all these and try again",IDC_STATIC,7,22,392,8
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GROUPBOX "Overflow and Underflow",IDC_STATIC,7,36,392,60
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CONTROL "Disable Underflow Checks - ( Checked = Small Speedup. ) ( Grey = DaZ Flag; Big Speedup for Intel CPU's! )",IDC_DENORMALS,
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"Button",BS_AUTO3STATE | WS_TABSTOP,14,76,377,10
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GROUPBOX "Sync Hacks",IDC_STATIC,7,101,392,59
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GROUPBOX "Miscellaneous / Special Game Fixes",IDC_STATIC,7,168,392,76
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,15,180,423,10
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CTEXT "If you have problems, disable all these and try again",IDC_STATIC,7,22,497,8
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GROUPBOX "Overflow and Underflow",IDC_STATIC,7,36,497,58
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CONTROL "Disable Underflow Checks - *Checked = Disables underflow checks. ( Speedup! ) *Greyed = DaZ flag. ( Big Speedup on Intel CPU's )",IDC_DENORMALS,
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"Button",BS_AUTO3STATE | WS_TABSTOP,14,77,483,10
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GROUPBOX "Sync Hacks",IDC_STATIC,7,98,497,63
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GROUPBOX "Miscellaneous / Special Game Fixes",IDC_STATIC,7,165,497,76
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CONTROL "VU Clip Hack - Special fix for God of War; Breaks Rockstar games!",IDC_VUCLIPHACK,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,227,323,10
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CONTROL "FPU Clamp Hack - Special fix for Gran Turismo 4 and possibly other games",IDC_FPUCLAMPHACK,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,212,323,10
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,15,224,421,10
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CONTROL "FPU Clamp Hack - Special fix for Gran Turismo 4 and possibly other games.",IDC_FPUCLAMPHACK,
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"Button",BS_AUTOCHECKBOX | WS_TABSTOP,15,209,428,10
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END
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@ -990,9 +990,9 @@ BEGIN
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IDD_HACKS, DIALOG
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BEGIN
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LEFTMARGIN, 7
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RIGHTMARGIN, 399
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RIGHTMARGIN, 504
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TOPMARGIN, 7
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BOTTOMMARGIN, 266
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BOTTOMMARGIN, 268
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END
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END
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#endif // APSTUDIO_INVOKED
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@ -569,6 +569,7 @@
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#define IDC_CONVERTEDCODE 1278
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#define IDC_CUSTOM_CONSECUTIVE_FRAMES 1278
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#define IDC_OVERFLOWHACK 1278
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#define IDC_VU_OVERFLOWHACK 1278
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#define IDC_HACKDESC 1279
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#define IDC_CONVERT 1279
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#define IDC_EDITPATCH 1279
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#define IDC_ADDPATCH 1280
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#define IDC_FRAMESKIP_LABEL2 1280
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#define IDC_OVERFLOWHACK_EXTRA 1280
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#define IDC_FPU_OVERFLOWHACK 1280
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#define IDC_GROUP 1281
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#define IDC_ADDRAW 1281
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#define IDC_FRAMESKIP_LABEL3 1281
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#define IDC_DENORMALS 1301
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#define IDC_VUCLIPHACK 1302
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#define IDC_FRAMELIMIT_OPTIONS 1303
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#define IDC_VUCLAMPHACK 1303
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#define IDC_FPUCLAMPHACK 1303
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#define IDC_LOG 1500
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#define IDC_CPULOG 1500
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190
pcsx2/x86/iFPU.c
190
pcsx2/x86/iFPU.c
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@ -752,13 +752,15 @@ FPURECOMPILE_CONSTCODE(C_LE, XMMINFO_READS|XMMINFO_READT);
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// Doesnt seem to like negatives - Ruins katamari graphics
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// I REPEAT THE SIGN BIT (THATS 0x80000000) MUST *NOT* BE SET, jeez.
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static PCSX2_ALIGNED16(u32 s_overflowmask[]) = {0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff};
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static PCSX2_ALIGNED16(u32 s_overflowmask[]) = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
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static u32 s_signbit = 0x80000000;
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extern int g_VuNanHandling;
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void ClampValues(regd) {
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SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]);
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SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]);
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if (CHECK_FPU_OVERFLOW) {
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SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]);
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SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]);
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}
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/*
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int t5reg = _allocTempXMMreg(XMMT_FPS, -1);
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SSE_ANDPS_XMM_to_XMM(regd, t5reg);
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// not necessary since above ORPS handles that (i think) Lets enable it for now ;)
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SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]);
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SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]);
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// clamp infinities
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//SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]);
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SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]); // after above calculations, unordered floats will be positive
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_freeXMMreg(t5reg);
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}
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else {
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SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]);
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SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]);
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if (CHECK_FPU_OVERFLOW) {
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SSE_MAXSS_M32_to_XMM(regd, (uptr)&g_minvals[0]);
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SSE_MINSS_M32_to_XMM(regd, (uptr)&g_maxvals[0]);
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}
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}
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}
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@ -807,23 +811,67 @@ static void (*recComOpM32_to_XMM[] )(x86SSERegType, uptr) = {
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SSE_ADDSS_M32_to_XMM, SSE_MULSS_M32_to_XMM, SSE_MAXSS_M32_to_XMM, SSE_MINSS_M32_to_XMM };
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int recCommutativeOp(int info, int regd, int op) {
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if (CHECK_FPU_EXTRA_OVERFLOW) {
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int t0reg = _allocTempXMMreg(XMMT_FPS, -1);
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if (t0reg < 0) goto allocationError;
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switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) {
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case PROCESS_EE_S:
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if (regd != EEREC_S) SSE_MOVSS_XMM_to_XMM(regd, EEREC_S);
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SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]);
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ClampValues (regd);
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ClampValues (t0reg);
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recComOpXMM_to_XMM[op](regd, t0reg);
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break;
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case PROCESS_EE_T:
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if (regd != EEREC_T) SSE_MOVSS_XMM_to_XMM(regd, EEREC_T);
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SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Fs_]);
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ClampValues (regd);
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ClampValues (t0reg);
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recComOpXMM_to_XMM[op](regd, t0reg);
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break;
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case (PROCESS_EE_S|PROCESS_EE_T):
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if (regd == EEREC_S) {
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ClampValues (regd);
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ClampValues (EEREC_T);
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recComOpXMM_to_XMM[op](regd, EEREC_T);
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}
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else if (regd == EEREC_T) {
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ClampValues (regd);
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ClampValues (EEREC_S);
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recComOpXMM_to_XMM[op](regd, EEREC_S);
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}
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else {
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ClampValues (EEREC_S);
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ClampValues (EEREC_T);
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SSE_MOVSS_XMM_to_XMM(regd, EEREC_S);
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recComOpXMM_to_XMM[op](regd, EEREC_T);
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}
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break;
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default:
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SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]);
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SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]);
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ClampValues (regd);
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ClampValues (t0reg);
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recComOpXMM_to_XMM[op](regd, t0reg);
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break;
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}
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_freeXMMreg(t0reg);
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return regd;
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allocationError:
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SysPrintf("recCommutativeOp() allocation error! Skipping Pre-Opcode Overflow checks! \n");
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} // End of pre-opcode overflow checking
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switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) {
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case PROCESS_EE_S:
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if (regd == EEREC_S) recComOpM32_to_XMM[op](regd, (uptr)&fpuRegs.fpr[_Ft_]);
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else {
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SSE_MOVSS_XMM_to_XMM(regd, EEREC_S);
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recComOpM32_to_XMM[op](regd, (uptr)&fpuRegs.fpr[_Ft_]);
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}
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if (regd != EEREC_S) SSE_MOVSS_XMM_to_XMM(regd, EEREC_S);
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recComOpM32_to_XMM[op](regd, (uptr)&fpuRegs.fpr[_Ft_]);
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break;
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case PROCESS_EE_T:
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if (regd == EEREC_T) recComOpM32_to_XMM[op](regd, (uptr)&fpuRegs.fpr[_Fs_]);
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else {
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SSE_MOVSS_XMM_to_XMM(regd, EEREC_T);
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recComOpM32_to_XMM[op](regd, (uptr)&fpuRegs.fpr[_Fs_]);
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}
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if (regd != EEREC_T) SSE_MOVSS_XMM_to_XMM(regd, EEREC_T);
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recComOpM32_to_XMM[op](regd, (uptr)&fpuRegs.fpr[_Fs_]);
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break;
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case (PROCESS_EE_S|PROCESS_EE_T):
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// SysPrintf("Hello2 :)\n");
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if (regd == EEREC_S) recComOpXMM_to_XMM[op](regd, EEREC_T);
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else if (regd == EEREC_T) recComOpXMM_to_XMM[op](regd, EEREC_S);
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else {
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@ -832,17 +880,6 @@ int recCommutativeOp(int info, int regd, int op) {
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}
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break;
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default:
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SysPrintf("But we dont have regs2 :(\n");
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/*if (regd == EEREC_S) {
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recComOpXMM_to_XMM[op](regd, EEREC_T);
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}
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else if (regd == EEREC_T) {
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||||
recComOpXMM_to_XMM[op](regd, EEREC_S);
|
||||
}
|
||||
else {
|
||||
SSE_MOVSS_XMM_to_XMM(regd, EEREC_S);
|
||||
recComOpXMM_to_XMM[op](regd, EEREC_T);
|
||||
}*/
|
||||
SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]);
|
||||
recComOpM32_to_XMM[op](regd, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
break;
|
||||
|
@ -959,32 +996,18 @@ void recSQRT_S_xmm(int info)
|
|||
{
|
||||
SysPrintf("FPU: SQRT \n");
|
||||
if( info & PROCESS_EE_T ) {
|
||||
//if( CHECK_OVERFLOW ) {
|
||||
if( EEREC_D == EEREC_T ) SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
|
||||
else {
|
||||
SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_T);
|
||||
SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
|
||||
|
||||
}
|
||||
|
||||
if (CHECK_FPU_EXTRA_OVERFLOW) { ClampValues(EEREC_T); }
|
||||
if( EEREC_D != EEREC_T ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_T);
|
||||
SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
|
||||
SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D);
|
||||
//}
|
||||
/*else {
|
||||
SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_T);
|
||||
}*/
|
||||
}
|
||||
else {
|
||||
//if( CHECK_OVERFLOW ) {
|
||||
SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
|
||||
|
||||
if (CHECK_FPU_EXTRA_OVERFLOW) { ClampValues(EEREC_D); }
|
||||
SSE_SQRTSS_XMM_to_XMM(EEREC_D, EEREC_D);
|
||||
/*}
|
||||
else {
|
||||
SSE_SQRTSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
}*/
|
||||
}
|
||||
ClampValues(EEREC_D);
|
||||
//ClampValues(EEREC_D); // No need to clamp since sqrt of a number is always smaller than that number
|
||||
}
|
||||
|
||||
FPURECOMPILE_CONSTCODE(SQRT_S, XMMINFO_WRITED|XMMINFO_READT);
|
||||
|
@ -999,7 +1022,6 @@ void recABS_S_xmm(int info)
|
|||
else {
|
||||
SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
|
||||
SSE_ANDPS_M128_to_XMM(EEREC_D, (uptr)&s_pos[0]);
|
||||
//xmmregs[EEREC_D].mode &= ~MODE_WRITE;
|
||||
}
|
||||
ClampValues(EEREC_D);
|
||||
}
|
||||
|
@ -1037,43 +1059,51 @@ void recRSQRT_S_xmm(int info)
|
|||
int t0reg = _allocTempXMMreg(XMMT_FPS, -1);
|
||||
switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) {
|
||||
case PROCESS_EE_S:
|
||||
if( EEREC_D == EEREC_S ) {
|
||||
SSE_SQRTSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
}
|
||||
else {
|
||||
SSE_SQRTSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
SSE_ANDPS_M128_to_XMM(t0reg, (uptr)&s_pos[0]);
|
||||
if (CHECK_FPU_EXTRA_OVERFLOW) {
|
||||
ClampValues(EEREC_S);
|
||||
SSE_MINSS_M32_to_XMM(t0reg, (uptr)&g_maxvals[0]);
|
||||
}
|
||||
if( EEREC_D != EEREC_S ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S);
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, t0reg);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
|
||||
break;
|
||||
case PROCESS_EE_T:
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, EEREC_T);
|
||||
SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
|
||||
|
||||
case PROCESS_EE_T:
|
||||
SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
|
||||
SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T);
|
||||
SSE_ANDPS_M128_to_XMM(t0reg, (uptr)&s_pos[0]);
|
||||
if (CHECK_FPU_EXTRA_OVERFLOW) {
|
||||
ClampValues(EEREC_D);
|
||||
SSE_MINSS_M32_to_XMM(t0reg, (uptr)&g_maxvals[0]);
|
||||
}
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, t0reg);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
|
||||
break;
|
||||
case (PROCESS_EE_S | PROCESS_EE_T):
|
||||
SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T);
|
||||
SSE_ANDPS_M128_to_XMM(t0reg, (uptr)&s_pos[0]);
|
||||
if (CHECK_FPU_EXTRA_OVERFLOW) {
|
||||
ClampValues(EEREC_S);
|
||||
SSE_MINSS_M32_to_XMM(t0reg, (uptr)&g_maxvals[0]);
|
||||
}
|
||||
if( EEREC_D != EEREC_S ) SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S);
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, t0reg);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
|
||||
break;
|
||||
default:
|
||||
if( (info & PROCESS_EE_T) && (info & PROCESS_EE_S) ) {
|
||||
if( EEREC_D == EEREC_T ){
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, EEREC_T);
|
||||
SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
}
|
||||
else if( EEREC_D == EEREC_S ){
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, EEREC_T);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
} else {
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, EEREC_T);
|
||||
SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
}
|
||||
}else{
|
||||
SSE_SQRTSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]);
|
||||
SSE_ANDPS_M128_to_XMM(t0reg, (uptr)&s_pos[0]);
|
||||
SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]);
|
||||
if (CHECK_FPU_EXTRA_OVERFLOW) {
|
||||
ClampValues(EEREC_D);
|
||||
SSE_MINSS_M32_to_XMM(t0reg, (uptr)&g_maxvals[0]);
|
||||
}
|
||||
SSE_SQRTSS_XMM_to_XMM(t0reg, t0reg);
|
||||
SSE_DIVSS_XMM_to_XMM(EEREC_D, t0reg);
|
||||
|
||||
break;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue