diff --git a/pcsx2/x86/iFPU.c b/pcsx2/x86/iFPU.c
index e6c7735523..36766921cd 100644
--- a/pcsx2/x86/iFPU.c
+++ b/pcsx2/x86/iFPU.c
@@ -84,10 +84,6 @@ static u32 PCSX2_ALIGNED16(s_pos[4]) = { 0x7fffffff, 0xffffffff, 0xffffffff, 0xf
 static u32 fpucw = 0x007f;
 static u32 fpucws = 0;
 
-static u32 chop	   = 0x0000FFC0;
-static u32 nearest = 0x00009FC0; //might use the global one later
-
-
 void recCOP1_BC1()
 {
 	recCP1BC1[_Rt_]();
@@ -645,9 +641,7 @@ int recCommutativeOp(int info, int regd, int op)
 void recADD_S_xmm(int info)
 {
 	//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
-	SSE_LDMXCSR ((uptr)&chop);
     ClampValues2(recCommutativeOp(info, EEREC_D, 0));
-	SSE_LDMXCSR ((uptr)&nearest);
 	//REC_FPUOP(ADD_S);
 }
 
@@ -1519,9 +1513,7 @@ FPURECOMPILE_CONSTCODE(MSUBA_S, XMMINFO_WRITEACC|XMMINFO_READACC|XMMINFO_READS|X
 void recMUL_S_xmm(int info)
 {			
 	//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
-	SSE_LDMXCSR ((uptr)&chop);
-    ClampValues(recCommutativeOp(info, EEREC_D, 1));
-	SSE_LDMXCSR ((uptr)&nearest);
+    ClampValues(recCommutativeOp(info, EEREC_D, 1)); 
 }
 
 FPURECOMPILE_CONSTCODE(MUL_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
@@ -1529,9 +1521,7 @@ FPURECOMPILE_CONSTCODE(MUL_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);
 void recMULA_S_xmm(int info) 
 { 
 	//AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags
-	SSE_LDMXCSR ((uptr)&chop);
 	ClampValues(recCommutativeOp(info, EEREC_ACC, 1));
-	SSE_LDMXCSR ((uptr)&nearest);
 }
 
 FPURECOMPILE_CONSTCODE(MULA_S, XMMINFO_WRITEACC|XMMINFO_READS|XMMINFO_READT);
@@ -1617,9 +1607,7 @@ void recSUBop(int info, int regd)
 
 void recSUB_S_xmm(int info)
 {
-	SSE_LDMXCSR ((uptr)&chop);
 	recSUBop(info, EEREC_D);
-	SSE_LDMXCSR ((uptr)&nearest);
 }
 
 FPURECOMPILE_CONSTCODE(SUB_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT);