mirror of https://github.com/PCSX2/pcsx2.git
Remove pre-gcc4.1.0 code and a bunch of functions that were never used.
This commit is contained in:
Sacha
parent
c46749f236
commit
f0af6460a1
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@ -25,15 +25,7 @@
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DEALINGS IN THE SOFTWARE.
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*/
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#ifndef KJK_INTRIN_X86_H_
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#define KJK_INTRIN_X86_H_
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/*
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FIXME: review all "memory" clobbers, add/remove to match Visual C++
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behavior: some "obvious" memory barriers are not present in the Visual C++
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implementation - e.g. __stosX; on the other hand, some memory barriers that
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*are* present could have been missed
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*/
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#pragma once
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/*
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NOTE: this is a *compatibility* header. Some functions may look wrong at
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@ -44,9 +36,6 @@
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constraints and the uses of __volatile__ out of my... hat. Do not touch
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them. I hate cargo cult programming
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NOTE: be very careful with declaring "memory" clobbers. Some "obvious"
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barriers aren't there in Visual C++ (e.g. __stosX)
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NOTE: review all intrinsics with a return value, add/remove __volatile__
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where necessary. If an intrinsic whose value is ignored generates a no-op
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under Visual C++, __volatile__ must be omitted; if it always generates code
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@ -55,46 +44,22 @@
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blocks are safe. Oddities such as the non-volatile 'rdmsr' are intentional
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and follow Visual C++ behavior
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NOTE: on GCC 4.1.0, please use the __sync_* built-ins for barriers and
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atomic operations. Test the version like this:
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#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
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...
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NOTE: GCC and Clang both support __sync_* built-ins for barriers and
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atomic operations.
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Pay attention to the type of barrier. Make it match with what Visual C++
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would use in the same case
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*/
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#ifndef __SIZE_T
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#define __SIZE_T
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typedef unsigned int size_t;
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#endif
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/*** Stack frame juggling ***/
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#define _ReturnAddress() (__builtin_return_address(0))
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#define _AddressOfReturnAddress() (&(((void **)(__builtin_frame_address(0)))[1]))
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/* TODO: __getcallerseflags but how??? */
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/*** Atomic operations ***/
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#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
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#define _ReadWriteBarrier() __sync_synchronize()
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#else
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static void __inline__ __attribute__((always_inline)) _MemoryBarrier(void)
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{
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__asm__ __volatile__("" : : : "memory");
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}
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#define _ReadWriteBarrier() _MemoryBarrier()
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#endif
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/* BUGBUG: GCC only supports full barriers */
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#define _ReadBarrier _ReadWriteBarrier
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#define _WriteBarrier _ReadWriteBarrier
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#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
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static __inline__ __attribute__((always_inline)) char _InterlockedCompareExchange8(volatile char * const Destination, const char Exchange, const char Comperand)
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{
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return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
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@ -184,228 +149,6 @@ static __inline__ __attribute__((always_inline)) long _InterlockedXor(volatile l
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return __sync_fetch_and_xor(value, mask);
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}
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#else
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static __inline__ __attribute__((always_inline)) char _InterlockedCompareExchange8(volatile char * const Destination, const char Exchange, const char Comperand)
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{
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char retval = Comperand;
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__asm__("lock; cmpxchgb %b[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
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return retval;
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}
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static __inline__ __attribute__((always_inline)) short _InterlockedCompareExchange16(volatile short * const Destination, const short Exchange, const short Comperand)
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{
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short retval = Comperand;
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__asm__("lock; cmpxchgw %w[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
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return retval;
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}
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static __inline__ __attribute__((always_inline)) long _InterlockedCompareExchange(volatile long * const Destination, const long Exchange, const long Comperand)
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{
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long retval = Comperand;
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__asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "+a" (retval) : [Destination] "m" (*Destination), [Exchange] "q" (Exchange): "memory");
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return retval;
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}
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static __inline__ __attribute__((always_inline)) long long _InterlockedCompareExchange64(volatile long long * const Destination, const long long Exchange, const long long Comperand)
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{
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long long retval = Comperand;
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__asm__
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(
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"cmpxchg8b %[Destination]" :
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[retval] "+A" (retval) :
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[Destination] "m" (*Destination),
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"b" ((unsigned long)((Exchange >> 0) & 0xFFFFFFFF)),
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"c" ((unsigned long)((Exchange >> 32) & 0xFFFFFFFF)) :
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"memory"
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);
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return retval;
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}
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static __inline__ __attribute__((always_inline)) void * _InterlockedCompareExchangePointer(void * volatile * const Destination, void * const Exchange, void * const Comperand)
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{
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void * retval = (void *)Comperand;
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__asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval] "=a" (retval) : "[retval]" (retval), [Destination] "m" (*Destination), [Exchange] "q" (Exchange) : "memory");
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return retval;
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}
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static __inline__ __attribute__((always_inline)) long _InterlockedExchange(volatile long * const Target, const long Value)
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{
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long retval = Value;
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__asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
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return retval;
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}
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static __inline__ __attribute__((always_inline)) void * _InterlockedExchangePointer(void * volatile * const Target, void * const Value)
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{
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void * retval = Value;
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__asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) : [Target] "m" (*Target) : "memory");
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return retval;
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}
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static __inline__ __attribute__((always_inline)) long _InterlockedExchangeAdd(volatile long * const Addend, const long Value)
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{
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long retval = Value;
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__asm__("lock; xaddl %[retval], %[Addend]" : [retval] "+r" (retval) : [Addend] "m" (*Addend) : "memory");
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return retval;
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}
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static __inline__ __attribute__((always_inline)) char _InterlockedAnd8(volatile char * const value, const char mask)
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{
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char x;
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char y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange8(value, x & mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) short _InterlockedAnd16(volatile short * const value, const short mask)
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{
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short x;
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short y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange16(value, x & mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) long _InterlockedAnd(volatile long * const value, const long mask)
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{
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long x;
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long y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange(value, x & mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) char _InterlockedOr8(volatile char * const value, const char mask)
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{
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char x;
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char y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange8(value, x | mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) short _InterlockedOr16(volatile short * const value, const short mask)
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{
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short x;
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short y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange16(value, x | mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) long _InterlockedOr(volatile long * const value, const long mask)
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{
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long x;
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long y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange(value, x | mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) char _InterlockedXor8(volatile char * const value, const char mask)
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{
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char x;
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char y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange8(value, x ^ mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) short _InterlockedXor16(volatile short * const value, const short mask)
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{
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short x;
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short y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange16(value, x ^ mask, x);
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}
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while(y != x);
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return y;
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}
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static __inline__ __attribute__((always_inline)) long _InterlockedXor(volatile long * const value, const long mask)
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{
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long x;
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long y;
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y = *value;
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do
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{
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x = y;
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y = _InterlockedCompareExchange(value, x ^ mask, x);
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}
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while(y != x);
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return y;
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}
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#endif
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static __inline__ __attribute__((always_inline)) long _InterlockedAddLargeStatistic(volatile long long * const Addend, const long Value)
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{
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@ -447,389 +190,6 @@ static __inline__ __attribute__((always_inline)) unsigned char _interlockedbitte
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}
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/*** String operations ***/
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/* NOTE: we don't set a memory clobber in the __stosX functions because Visual C++ doesn't */
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static __inline__ __attribute__((always_inline)) void __stosb(unsigned char * Dest, const unsigned char Data, size_t Count)
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{
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__asm__ __volatile__
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(
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"rep; stosb" :
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[Dest] "=D" (Dest), [Count] "=c" (Count) :
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"[Dest]" (Dest), "a" (Data), "[Count]" (Count)
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);
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}
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static __inline__ __attribute__((always_inline)) void __stosw(unsigned short * Dest, const unsigned short Data, size_t Count)
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{
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__asm__ __volatile__
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(
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"rep; stosw" :
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[Dest] "=D" (Dest), [Count] "=c" (Count) :
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"[Dest]" (Dest), "a" (Data), "[Count]" (Count)
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);
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}
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static __inline__ __attribute__((always_inline)) void __stosd(unsigned long * Dest, const unsigned long Data, size_t Count)
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{
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__asm__ __volatile__
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(
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"rep; stosl" :
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[Dest] "=D" (Dest), [Count] "=c" (Count) :
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"[Dest]" (Dest), "a" (Data), "[Count]" (Count)
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);
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}
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static __inline__ __attribute__((always_inline)) void __movsb(unsigned char * Destination, const unsigned char * Source, size_t Count)
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{
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__asm__ __volatile__
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(
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"rep; movsb" :
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[Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
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"[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
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);
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}
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static __inline__ __attribute__((always_inline)) void __movsw(unsigned short * Destination, const unsigned short * Source, size_t Count)
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{
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__asm__ __volatile__
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(
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"rep; movsw" :
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[Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
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"[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
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);
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}
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static __inline__ __attribute__((always_inline)) void __movsd(unsigned long * Destination, const unsigned long * Source, size_t Count)
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{
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__asm__ __volatile__
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(
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"rep; movsd" :
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[Destination] "=D" (Destination), [Source] "=S" (Source), [Count] "=c" (Count) :
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"[Destination]" (Destination), "[Source]" (Source), "[Count]" (Count)
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);
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}
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/*** FS segment addressing ***/
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static __inline__ __attribute__((always_inline)) void __writefsbyte(const unsigned long Offset, const unsigned char Data)
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{
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__asm__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
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}
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static __inline__ __attribute__((always_inline)) void __writefsword(const unsigned long Offset, const unsigned short Data)
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{
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__asm__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
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}
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static __inline__ __attribute__((always_inline)) void __writefsdword(const unsigned long Offset, const unsigned long Data)
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{
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__asm__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
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}
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static __inline__ __attribute__((always_inline)) unsigned char __readfsbyte(const unsigned long Offset)
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{
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unsigned char value;
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__asm__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
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return value;
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}
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static __inline__ __attribute__((always_inline)) unsigned short __readfsword(const unsigned long Offset)
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{
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unsigned short value;
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__asm__("movw %%fs:%a[Offset], %w[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
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return value;
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}
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static __inline__ __attribute__((always_inline)) unsigned long __readfsdword(const unsigned long Offset)
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{
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unsigned long value;
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__asm__("movl %%fs:%a[Offset], %k[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
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return value;
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}
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static __inline__ __attribute__((always_inline)) void __incfsbyte(const unsigned long Offset)
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{
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__asm__("incb %%fs:%a[Offset]" : : [Offset] "ir" (Offset));
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}
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static __inline__ __attribute__((always_inline)) void __incfsword(const unsigned long Offset)
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{
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__asm__("incw %%fs:%a[Offset]" : : [Offset] "ir" (Offset));
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}
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static __inline__ __attribute__((always_inline)) void __incfsdword(const unsigned long Offset)
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{
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__asm__("incl %%fs:%a[Offset]" : : [Offset] "ir" (Offset));
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}
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/* NOTE: the bizarre implementation of __addfsxxx mimics the broken Visual C++ behavior */
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static __inline__ __attribute__((always_inline)) void __addfsbyte(const unsigned long Offset, const unsigned char Data)
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{
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if(!__builtin_constant_p(Offset))
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__asm__("addb %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset));
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else
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__asm__("addb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
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}
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static __inline__ __attribute__((always_inline)) void __addfsword(const unsigned long Offset, const unsigned short Data)
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{
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if(!__builtin_constant_p(Offset))
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__asm__("addw %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset));
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else
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__asm__("addw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
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}
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static __inline__ __attribute__((always_inline)) void __addfsdword(const unsigned long Offset, const unsigned int Data)
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{
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if(!__builtin_constant_p(Offset))
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__asm__("addl %k[Offset], %%fs:%a[Offset]" : : [Offset] "r" (Offset));
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else
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__asm__("addl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
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}
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/*** Bit manipulation ***/
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static __inline__ __attribute__((always_inline)) unsigned char _BitScanForward(unsigned long * const Index, const unsigned long Mask)
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{
|
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__asm__("bsfl %k[Mask], %k[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
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return Mask ? 1 : 0;
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}
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static __inline__ __attribute__((always_inline)) unsigned char _BitScanReverse(unsigned long * const Index, const unsigned long Mask)
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||||
{
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__asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
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return Mask ? 1 : 0;
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||||
}
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/* NOTE: again, the bizarre implementation follows Visual C++ */
|
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static __inline__ __attribute__((always_inline)) unsigned char _bittest(const long * const a, const long b)
|
||||
{
|
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unsigned char retval;
|
||||
|
||||
if(__builtin_constant_p(b))
|
||||
__asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
|
||||
else
|
||||
__asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*a), [b] "r" (b));
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned char _bittestandcomplement(long * const a, const long b)
|
||||
{
|
||||
unsigned char retval;
|
||||
|
||||
if(__builtin_constant_p(b))
|
||||
__asm__("btc %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
|
||||
else
|
||||
__asm__("btc %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*a), [b] "r" (b));
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned char _bittestandreset(long * const a, const long b)
|
||||
{
|
||||
unsigned char retval;
|
||||
|
||||
if(__builtin_constant_p(b))
|
||||
__asm__("btr %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
|
||||
else
|
||||
__asm__("btr %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*a), [b] "r" (b));
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned char _bittestandset(long * const a, const long b)
|
||||
{
|
||||
unsigned char retval;
|
||||
|
||||
if(__builtin_constant_p(b))
|
||||
__asm__("bts %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
|
||||
else
|
||||
__asm__("bts %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) : [a] "mr" (*a), [b] "r" (b));
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned char _rotl8(const unsigned char value, const unsigned char shift)
|
||||
{
|
||||
unsigned char retval;
|
||||
__asm__("rolb %b[shift], %b[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned short _rotl16(const unsigned short value, const unsigned char shift)
|
||||
{
|
||||
unsigned short retval;
|
||||
__asm__("rolw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned char _rotr8(const unsigned char value, const unsigned char shift)
|
||||
{
|
||||
unsigned char retval;
|
||||
__asm__("rorb %b[shift], %b[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned short _rotr16(const unsigned short value, const unsigned char shift)
|
||||
{
|
||||
unsigned short retval;
|
||||
__asm__("rorw %b[shift], %w[retval]" : [retval] "=rm" (retval) : "[retval]" (value), [shift] "Nc" (shift));
|
||||
return retval;
|
||||
}
|
||||
|
||||
/*
|
||||
NOTE: in __ll_lshift, __ll_rshift and __ull_rshift we use the "A"
|
||||
constraint (edx:eax) for the Mask argument, because it's the only way GCC
|
||||
can pass 64-bit operands around - passing the two 32 bit parts separately
|
||||
just confuses it. Also we declare Bit as an int and then truncate it to
|
||||
match Visual C++ behavior
|
||||
*/
|
||||
static __inline__ __attribute__((always_inline)) unsigned long long __ll_lshift(const unsigned long long Mask, const int Bit)
|
||||
{
|
||||
unsigned long long retval = Mask;
|
||||
|
||||
__asm__
|
||||
(
|
||||
"shldl %b[Bit], %%eax, %%edx; sall %b[Bit], %%eax" :
|
||||
"+A" (retval) :
|
||||
[Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
|
||||
);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) long long __ll_rshift(const long long Mask, const int Bit)
|
||||
{
|
||||
unsigned long long retval = Mask;
|
||||
|
||||
__asm__
|
||||
(
|
||||
"shldl %b[Bit], %%eax, %%edx; sarl %b[Bit], %%eax" :
|
||||
"+A" (retval) :
|
||||
[Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
|
||||
);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned long long __ull_rshift(const unsigned long long Mask, int Bit)
|
||||
{
|
||||
unsigned long long retval = Mask;
|
||||
|
||||
__asm__
|
||||
(
|
||||
"shrdl %b[Bit], %%eax, %%edx; shrl %b[Bit], %%eax" :
|
||||
"+A" (retval) :
|
||||
[Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
|
||||
);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
||||
/*** 64-bit math ***/
|
||||
static __inline__ __attribute__((always_inline)) long long __emul(const int a, const int b)
|
||||
{
|
||||
long long retval;
|
||||
__asm__("imull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned long long __emulu(const unsigned int a, const unsigned int b)
|
||||
{
|
||||
unsigned long long retval;
|
||||
__asm__("mull %[b]" : "=A" (retval) : [a] "a" (a), [b] "rm" (b));
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
||||
/*** Port I/O ***/
|
||||
static __inline__ __attribute__((always_inline)) unsigned char __inbyte(const unsigned short Port)
|
||||
{
|
||||
unsigned char byte;
|
||||
__asm__ __volatile__("inb %w[Port], %b[byte]" : [byte] "=a" (byte) : [Port] "Nd" (Port));
|
||||
return byte;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned short __inword(const unsigned short Port)
|
||||
{
|
||||
unsigned short word;
|
||||
__asm__ __volatile__("inw %w[Port], %w[word]" : [word] "=a" (word) : [Port] "Nd" (Port));
|
||||
return word;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned long __indword(const unsigned short Port)
|
||||
{
|
||||
unsigned long dword;
|
||||
__asm__ __volatile__("inl %w[Port], %k[dword]" : [dword] "=a" (dword) : [Port] "Nd" (Port));
|
||||
return dword;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port, unsigned char * Buffer, unsigned long Count)
|
||||
{
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"rep; insb" :
|
||||
[Buffer] "=D" (Buffer), [Count] "=c" (Count) :
|
||||
"d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
|
||||
"memory"
|
||||
);
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port, unsigned short * Buffer, unsigned long Count)
|
||||
{
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"rep; insw" :
|
||||
[Buffer] "=D" (Buffer), [Count] "=c" (Count) :
|
||||
"d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
|
||||
"memory"
|
||||
);
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port, unsigned long * Buffer, unsigned long Count)
|
||||
{
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"rep; insl" :
|
||||
[Buffer] "=D" (Buffer), [Count] "=c" (Count) :
|
||||
"d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
|
||||
"memory"
|
||||
);
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short const Port, const unsigned char Data)
|
||||
{
|
||||
__asm__ __volatile__("outb %b[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __outword(unsigned short const Port, const unsigned short Data)
|
||||
{
|
||||
__asm__ __volatile__("outw %w[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __outdword(unsigned short const Port, const unsigned long Data)
|
||||
{
|
||||
__asm__ __volatile__("outl %k[Data], %w[Port]" : : [Port] "Nd" (Port), [Data] "a" (Data));
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short const Port, const unsigned char * const Buffer, const unsigned long Count)
|
||||
{
|
||||
__asm__ __volatile__("rep; outsb" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short const Port, const unsigned short * const Buffer, const unsigned long Count)
|
||||
{
|
||||
__asm__ __volatile__("rep; outsw" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short const Port, const unsigned long * const Buffer, const unsigned long Count)
|
||||
{
|
||||
__asm__ __volatile__("rep; outsl" : : [Port] "d" (Port), [Buffer] "S" (Buffer), "c" (Count));
|
||||
}
|
||||
|
||||
|
||||
/*** System information ***/
|
||||
static __inline__ __attribute__((always_inline)) void __cpuid(int CPUInfo[], const int InfoType)
|
||||
{
|
||||
|
|
@ -864,106 +224,3 @@ static __inline__ __attribute__((always_inline)) void __debugbreak(void)
|
|||
__asm__("int $3");
|
||||
}
|
||||
#endif
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __int2c(void)
|
||||
{
|
||||
__asm__("int $0x2c");
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void _disable(void)
|
||||
{
|
||||
__asm__("cli");
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void _enable(void)
|
||||
{
|
||||
__asm__("sti");
|
||||
}
|
||||
|
||||
|
||||
/*** Protected memory management ***/
|
||||
static __inline__ __attribute__((always_inline)) unsigned long __readcr0(void)
|
||||
{
|
||||
unsigned long value;
|
||||
__asm__ __volatile__("mov %%cr0, %[value]" : [value] "=q" (value));
|
||||
return value;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned long __readcr2(void)
|
||||
{
|
||||
unsigned long value;
|
||||
__asm__ __volatile__("mov %%cr2, %[value]" : [value] "=q" (value));
|
||||
return value;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned long __readcr3(void)
|
||||
{
|
||||
unsigned long value;
|
||||
__asm__ __volatile__("mov %%cr3, %[value]" : [value] "=q" (value));
|
||||
return value;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned long __readcr4(void)
|
||||
{
|
||||
unsigned long value;
|
||||
__asm__ __volatile__("mov %%cr4, %[value]" : [value] "=q" (value));
|
||||
return value;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __writecr0(const unsigned long long Data)
|
||||
{
|
||||
__asm__("mov %[Data], %%cr0" : : [Data] "q" ((const unsigned long)(Data & 0xFFFFFFFF)) : "memory");
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __writecr3(const unsigned long long Data)
|
||||
{
|
||||
__asm__("mov %[Data], %%cr3" : : [Data] "q" ((const unsigned long)(Data & 0xFFFFFFFF)) : "memory");
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __writecr4(const unsigned long long Data)
|
||||
{
|
||||
__asm__("mov %[Data], %%cr4" : : [Data] "q" ((const unsigned long)(Data & 0xFFFFFFFF)) : "memory");
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __invlpg(void * const Address)
|
||||
{
|
||||
__asm__("invlpg %[Address]" : : [Address] "m" (*((unsigned char *)(Address))));
|
||||
}
|
||||
|
||||
|
||||
/*** System operations ***/
|
||||
static __inline__ __attribute__((always_inline)) unsigned long long __readmsr(const int reg)
|
||||
{
|
||||
unsigned long long retval;
|
||||
__asm__ __volatile__("rdmsr" : "=A" (retval) : "c" (reg));
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __writemsr(const unsigned long Register, const unsigned long long Value)
|
||||
{
|
||||
__asm__ __volatile__("wrmsr" : : "A" (Value), "c" (Register));
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) unsigned long long __readpmc(const int counter)
|
||||
{
|
||||
unsigned long long retval;
|
||||
__asm__ __volatile__("rdpmc" : "=A" (retval) : "c" (counter));
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* NOTE: an immediate value for 'a' will raise an ICE in Visual C++ */
|
||||
static __inline__ __attribute__((always_inline)) unsigned long __segmentlimit(const unsigned long a)
|
||||
{
|
||||
unsigned long retval;
|
||||
__asm__ __volatile__("lsl %[a], %[retval]" : [retval] "=r" (retval) : [a] "rm" (a));
|
||||
return retval;
|
||||
}
|
||||
|
||||
static __inline__ __attribute__((always_inline)) void __wbinvd(void)
|
||||
{
|
||||
__asm__ __volatile__("wbinvd");
|
||||
}
|
||||
|
||||
#endif /* KJK_INTRIN_X86_H_ */
|
||||
|
||||
/* EOF */
|
||||
|
|
|
|||
Loading…
Reference in New Issue