diff --git a/pcsx2/x86/iCore.cpp b/pcsx2/x86/iCore.cpp
index 510d300f35..896489fd04 100644
--- a/pcsx2/x86/iCore.cpp
+++ b/pcsx2/x86/iCore.cpp
@@ -57,7 +57,7 @@ char g_globalXMMLocked = 0;
 #endif
 
 _xmmregs xmmregs[XMMREGS], s_saveXMMregs[XMMREGS];
-PCSX2_ALIGNED16(u64 g_globalXMMData[2*XMMREGS];)
+PCSX2_ALIGNED16(u64 g_globalXMMData[2*XMMREGS]);
 
 // X86 caching
 _x86regs x86regs[X86REGS], s_saveX86regs[X86REGS];
diff --git a/pcsx2/x86/iFPU.c b/pcsx2/x86/iFPU.c
index e0af488f33..5686cbc747 100644
--- a/pcsx2/x86/iFPU.c
+++ b/pcsx2/x86/iFPU.c
@@ -24,6 +24,9 @@
 #include "ix86/ix86.h"
 #include "iR5900.h"
 #include "iFPU.h"
+#include "stdio.h" //Linux needs this?
+#include "stdlib.h" //Linux needs this?
+
 
 #define REC_FPUBRANCH(f) \
 	void f(); \
diff --git a/pcsx2/x86/iVUmicro.c b/pcsx2/x86/iVUmicro.c
index 1df39660b5..f7f2488691 100644
--- a/pcsx2/x86/iVUmicro.c
+++ b/pcsx2/x86/iVUmicro.c
@@ -1356,7 +1356,7 @@ const static PCSX2_ALIGNED16(u32 VU_Underflow_Mask2[4])		= {0x007fffff, 0x007fff
 const static PCSX2_ALIGNED16(u32 VU_Zero_Mask[4])			= {0x00000000, 0x00000000, 0x00000000, 0x00000000};
 const static PCSX2_ALIGNED16(u32 VU_Zero_Helper_Mask[4])	= {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
 const static PCSX2_ALIGNED16(u32 VU_Signed_Zero_Mask[4])	= {0x80000000, 0x80000000, 0x80000000, 0x80000000};
-PCSX2_ALIGNED16(u64 TEMPXMMData[2];)
+PCSX2_ALIGNED16(u64 TEMPXMMData[2]);
 
 // VU Flags
 // NOTE: Flags now compute under/over flows! :p
@@ -3712,8 +3712,8 @@ void recVUMI_CLIP(VURegs *VU, int info)
 /******************************/
 /*   VU Lower instructions    */
 /******************************/
-PCSX2_ALIGNED16(u64 DIV_TEMP_XMM[2];)
-PCSX2_ALIGNED16(u64 DIV_TEMP_XMM2[2];)
+PCSX2_ALIGNED16(u64 DIV_TEMP_XMM[2]);
+PCSX2_ALIGNED16(u64 DIV_TEMP_XMM2[2]);
 
 void recVUMI_DIV(VURegs *VU, int info)
 {
@@ -4221,7 +4221,7 @@ void recVUMI_SQRT( VURegs *VU, int info )
 	
 }
 
-PCSX2_ALIGNED16(u64 RSQRT_TEMP_XMM[2];)
+PCSX2_ALIGNED16(u64 RSQRT_TEMP_XMM[2]);
 
 void recVUMI_RSQRT(VURegs *VU, int info)
 {