mirror of https://github.com/PCSX2/pcsx2.git
ipu: Convert yuv2rgb sse2 inline assembly to intrinsics
It's more portable. Use _mm_shuffle_epi32 instead of _mm_movehl_ps - I think it avoids data bypass delays going from integer to float domains on older processors, and Agner's tables indicate that the instruction has the same latency and occasionally has higher throughput (depending on cpu). And switch the _mm_xor_si128 and _mm_unpacklo_epi8 around so the same constant can be used for both C bias and alpha.
This commit is contained in:
Jonathan Li
parent
571432a7aa
commit
eaa4abea45
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@ -1,5 +1,5 @@
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/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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* Copyright (C) 2002-2016 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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@ -58,357 +58,94 @@ void yuv2rgb_reference(void)
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}
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}
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#if defined(_M_X86_32)
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// TODO OSX optimize me
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#if defined(__clang__) && !defined(__linux__)
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void yuv2rgb_sse2() {
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yuv2rgb_reference();
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}
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#else
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// Everything below is bit accurate to the IPU specification (except maybe rounding).
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// Know the specification before you touch it.
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#define SSE_BYTES(x) {x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x}
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#define SSE_WORDS(x) {x, x, x, x, x, x, x, x}
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#define SSE_COEFFICIENTS(x) SSE_WORDS((s16)((x)<<2))
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struct SSE2_Tables
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// Suikoden Tactics FMV speed results: Reference - ~72fps, SSE2 - ~120fps
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// An AVX2 version is only slightly faster than an SSE2 version (+2-3fps)
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// (or I'm a poor optimiser), though it might be worth attempting again
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// once we've ported to 64 bits (the extra registers should help).
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__ri void yuv2rgb_sse2()
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{
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u16 C_bias[8]; // offset -64
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u8 Y_bias[16]; // offset -48
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u16 Y_mask[8]; // offset -32
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u16 round_1bit[8]; // offset -16
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s16 Y_coefficients[8]; // offset 0
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s16 GCr_coefficients[8];// offset 16
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s16 GCb_coefficients[8];// offset 32
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s16 RCr_coefficients[8];// offset 48
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s16 BCb_coefficients[8];// offset 64
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};
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enum
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{
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C_BIAS = -0x40,
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Y_BIAS = -0x30,
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Y_MASK = -0x20,
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ROUND_1BIT = -0x10,
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Y_COEFF = 0x00,
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GCr_COEFF = 0x10,
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GCb_COEFF = 0x20,
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RCr_COEFF = 0x30,
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BCb_COEFF = 0x40
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};
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static const __aligned16 SSE2_Tables sse2_tables =
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{
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SSE_WORDS(0x8000), // c_bias
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SSE_BYTES(IPU_Y_BIAS), // y_bias
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SSE_WORDS(0xff00), // y_mask
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const __m128i c_bias = _mm_set1_epi8(s8(IPU_C_BIAS));
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const __m128i y_bias = _mm_set1_epi8(IPU_Y_BIAS);
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const __m128i y_mask = _mm_set1_epi16(s16(0xFF00));
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// Specifying round off instead of round down as everywhere else
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// implies that this is right
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SSE_WORDS(1), // round_1bit
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const __m128i round_1bit = _mm_set1_epi16(0x0001);;
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SSE_COEFFICIENTS(IPU_Y_COEFF),
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SSE_COEFFICIENTS(IPU_GCR_COEFF),
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SSE_COEFFICIENTS(IPU_GCB_COEFF),
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SSE_COEFFICIENTS(IPU_RCR_COEFF),
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SSE_COEFFICIENTS(IPU_BCB_COEFF),
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};
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const __m128i y_coefficient = _mm_set1_epi16(s16(IPU_Y_COEFF << 2));
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const __m128i gcr_coefficient = _mm_set1_epi16(s16(u16(IPU_GCR_COEFF) << 2));
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const __m128i gcb_coefficient = _mm_set1_epi16(s16(u16(IPU_GCB_COEFF) << 2));
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const __m128i rcr_coefficient = _mm_set1_epi16(s16(IPU_RCR_COEFF << 2));
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const __m128i bcb_coefficient = _mm_set1_epi16(s16(IPU_BCB_COEFF << 2));
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static __aligned16 u16 yuv2rgb_temp[3][8];
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// Alpha set to 0x80 here. The threshold stuff is done later.
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const __m128i& alpha = c_bias;
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// This could potentially be improved for SSE4
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__ri void yuv2rgb_sse2(void)
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{
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#if defined(_MSC_VER) || defined(__INTEL_COMPILER)
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__asm {
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mov eax, 1
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xor esi, esi
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xor edi, edi
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for (int n = 0; n < 8; ++n) {
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// could skip the loadl_epi64 but most SSE instructions require 128-bit
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// alignment so two versions would be needed.
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__m128i cb = _mm_loadl_epi64(reinterpret_cast<__m128i*>(&decoder.mb8.Cb[n][0]));
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__m128i cr = _mm_loadl_epi64(reinterpret_cast<__m128i*>(&decoder.mb8.Cr[n][0]));
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// Use ecx and edx as base pointers, to allow for Mod/RM form on memOps.
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// This saves 2-3 bytes per instruction where these are used. :)
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mov ecx, offset yuv2rgb_temp
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mov edx, offset sse2_tables+64;
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// (Cb - 128) << 8, (Cr - 128) << 8
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cb = _mm_xor_si128(cb, c_bias);
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cr = _mm_xor_si128(cr, c_bias);
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cb = _mm_unpacklo_epi8(_mm_setzero_si128(), cb);
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cr = _mm_unpacklo_epi8(_mm_setzero_si128(), cr);
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align 16
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tworows:
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movq xmm3, qword ptr [decoder.mb8+256+esi]
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movq xmm1, qword ptr [decoder.mb8+320+esi]
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pxor xmm2, xmm2
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pxor xmm0, xmm0
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// could skip the movq but punpck requires 128-bit alignment
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// for some reason, so two versions would be needed,
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// bloating the function (further)
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punpcklbw xmm2, xmm3
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punpcklbw xmm0, xmm1
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// unfortunately I don't think this will matter despite being
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// technically potentially a little faster, but this is
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// equivalent to an add or sub
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pxor xmm2, xmmword ptr [edx+C_BIAS] // xmm2 <-- 8 x (Cb - 128) << 8
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pxor xmm0, xmmword ptr [edx+C_BIAS] // xmm0 <-- 8 x (Cr - 128) << 8
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__m128i rc = _mm_mulhi_epi16(cr, rcr_coefficient);
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__m128i gc = _mm_adds_epi16(_mm_mulhi_epi16(cr, gcr_coefficient), _mm_mulhi_epi16(cb, gcb_coefficient));
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__m128i bc = _mm_mulhi_epi16(cb, bcb_coefficient);
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movaps xmm1, xmm0
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movaps xmm3, xmm2
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pmulhw xmm1, xmmword ptr [edx+GCr_COEFF]
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pmulhw xmm3, xmmword ptr [edx+GCb_COEFF]
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pmulhw xmm0, xmmword ptr [edx+RCr_COEFF]
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pmulhw xmm2, xmmword ptr [edx+BCb_COEFF]
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paddsw xmm1, xmm3
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// store for the next line; looking at the code above
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// compared to the code below, I have to wonder whether
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// this was worth the hassle
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movaps xmmword ptr [ecx], xmm0
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movaps xmmword ptr [ecx+16], xmm1
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movaps xmmword ptr [ecx+32], xmm2
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jmp ihatemsvc
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for (int m = 0; m < 2; ++m) {
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__m128i y = _mm_load_si128(reinterpret_cast<__m128i*>(&decoder.mb8.Y[n * 2 + m][0]));
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y = _mm_subs_epu8(y, y_bias);
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// Y << 8 for pixels 0, 2, 4, 6, 8, 10, 12, 14
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__m128i y_even = _mm_slli_epi16(y, 8);
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// Y << 8 for pixels 1, 3, 5, 7 ,9, 11, 13, 15
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__m128i y_odd = _mm_and_si128(y, y_mask);
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align 16
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onerow:
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movaps xmm0, xmmword ptr [ecx]
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movaps xmm1, xmmword ptr [ecx+16]
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movaps xmm2, xmmword ptr [ecx+32]
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y_even = _mm_mulhi_epu16(y_even, y_coefficient);
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y_odd = _mm_mulhi_epu16(y_odd, y_coefficient);
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// If masm directives worked properly in inline asm, I'd be using them,
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// but I'm not inclined to write ~70 line #defines to simulate them.
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// Maybe the function's faster like this anyway because it's smaller?
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// I'd have to write a 70 line #define to benchmark it.
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__m128i r_even = _mm_adds_epi16(rc, y_even);
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__m128i r_odd = _mm_adds_epi16(rc, y_odd);
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__m128i g_even = _mm_adds_epi16(gc, y_even);
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__m128i g_odd = _mm_adds_epi16(gc, y_odd);
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__m128i b_even = _mm_adds_epi16(bc, y_even);
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__m128i b_odd = _mm_adds_epi16(bc, y_odd);
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ihatemsvc:
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movaps xmm3, xmm0
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movaps xmm4, xmm1
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movaps xmm5, xmm2
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// round
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r_even = _mm_srai_epi16(_mm_add_epi16(r_even, round_1bit), 1);
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r_odd = _mm_srai_epi16(_mm_add_epi16(r_odd, round_1bit), 1);
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g_even = _mm_srai_epi16(_mm_add_epi16(g_even, round_1bit), 1);
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g_odd = _mm_srai_epi16(_mm_add_epi16(g_odd, round_1bit), 1);
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b_even = _mm_srai_epi16(_mm_add_epi16(b_even, round_1bit), 1);
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b_odd = _mm_srai_epi16(_mm_add_epi16(b_odd, round_1bit), 1);
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movaps xmm6, xmmword ptr [decoder.mb8+edi]
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psubusb xmm6, xmmword ptr [edx+Y_BIAS]
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movaps xmm7, xmm6
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psllw xmm6, 8 // xmm6 <- Y << 8 for pixels 0,2,4,6,8,10,12,14
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pand xmm7, xmmword ptr [edx+Y_MASK] // xmm7 <- Y << 8 for pixels 1,3,5,7,9,11,13,15
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// combine even and odd bytes in original order
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__m128i r = _mm_packus_epi16(r_even, r_odd);
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__m128i g = _mm_packus_epi16(g_even, g_odd);
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__m128i b = _mm_packus_epi16(b_even, b_odd);
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pmulhuw xmm6, xmmword ptr [edx+Y_COEFF]
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pmulhuw xmm7, xmmword ptr [edx+Y_COEFF]
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r = _mm_unpacklo_epi8(r, _mm_shuffle_epi32(r, _MM_SHUFFLE(3, 2, 3, 2)));
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g = _mm_unpacklo_epi8(g, _mm_shuffle_epi32(g, _MM_SHUFFLE(3, 2, 3, 2)));
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b = _mm_unpacklo_epi8(b, _mm_shuffle_epi32(b, _MM_SHUFFLE(3, 2, 3, 2)));
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paddsw xmm0, xmm6
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paddsw xmm3, xmm7
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paddsw xmm1, xmm6
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paddsw xmm4, xmm7
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paddsw xmm2, xmm6
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paddsw xmm5, xmm7
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// Create RGBA (we could generate A here, but we don't) quads
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__m128i rg_l = _mm_unpacklo_epi8(r, g);
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__m128i ba_l = _mm_unpacklo_epi8(b, alpha);
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__m128i rgba_ll = _mm_unpacklo_epi16(rg_l, ba_l);
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__m128i rgba_lh = _mm_unpackhi_epi16(rg_l, ba_l);
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// 0x80; a constant is probably so much better
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pcmpeqb xmm7, xmm7
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psllw xmm7, 15
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psrlw xmm7, 8
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packuswb xmm7, xmm7
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__m128i rg_h = _mm_unpackhi_epi8(r, g);
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__m128i ba_h = _mm_unpackhi_epi8(b, alpha);
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__m128i rgba_hl = _mm_unpacklo_epi16(rg_h, ba_h);
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__m128i rgba_hh = _mm_unpackhi_epi16(rg_h, ba_h);
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// round
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movaps xmm6, xmmword ptr [edx+ROUND_1BIT]
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paddw xmm0, xmm6
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paddw xmm1, xmm6
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paddw xmm2, xmm6
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paddw xmm3, xmm6
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paddw xmm4, xmm6
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paddw xmm5, xmm6
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psraw xmm0, 1
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psraw xmm1, 1
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psraw xmm2, 1
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psraw xmm3, 1
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psraw xmm4, 1
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psraw xmm5, 1
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// combine even and odd bytes
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packuswb xmm0, xmm3
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packuswb xmm1, xmm4
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packuswb xmm2, xmm5
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movhlps xmm3, xmm0
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movhlps xmm4, xmm1
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movhlps xmm5, xmm2
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punpcklbw xmm0, xmm3 // Red bytes, back in order
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punpcklbw xmm1, xmm4 // Green ""
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punpcklbw xmm2, xmm5 // Blue ""
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movaps xmm3, xmm0
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movaps xmm4, xmm1
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movaps xmm5, xmm2
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// Create RGBA (we could generate A here, but we don't) quads
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punpcklbw xmm0, xmm1
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punpcklbw xmm2, xmm7
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movaps xmm1, xmm0
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punpcklwd xmm0, xmm2
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punpckhwd xmm1, xmm2
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punpckhbw xmm3, xmm4
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punpckhbw xmm5, xmm7
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movaps xmm4, xmm3
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punpcklwd xmm3, xmm5
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punpckhwd xmm4, xmm5
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// at last
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movaps xmmword ptr [decoder.rgb32+edi*4+0], xmm0
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movaps xmmword ptr [decoder.rgb32+edi*4+16], xmm1
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movaps xmmword ptr [decoder.rgb32+edi*4+32], xmm3
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movaps xmmword ptr [decoder.rgb32+edi*4+48], xmm4
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add edi, 16
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neg eax
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jl onerow // run twice
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add esi, 8
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cmp esi, 64
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jne tworows
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_mm_store_si128(reinterpret_cast<__m128i*>(&decoder.rgb32.c[n * 2 + m][0]), rgba_ll);
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_mm_store_si128(reinterpret_cast<__m128i*>(&decoder.rgb32.c[n * 2 + m][4]), rgba_lh);
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_mm_store_si128(reinterpret_cast<__m128i*>(&decoder.rgb32.c[n * 2 + m][8]), rgba_hl);
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_mm_store_si128(reinterpret_cast<__m128i*>(&decoder.rgb32.c[n * 2 + m][12]), rgba_hh);
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}
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}
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#elif defined(__GNUC__)
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// offset to the middle of the sse2 table, so that we can use 1-byte address displacement
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// to access all fields:
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static const u8* sse2_tableoffset = ((u8*)&sse2_tables) + 64;
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static const u8* mb8 = (u8*)&decoder.mb8;
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static u8* rgb32 = (u8*)&decoder.rgb32;
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__asm__ __volatile__ (
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".intel_syntax noprefix\n"
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"xor esi, esi\n"
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"xor edi, edi\n"
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".align 16\n"
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"tworows_%=:\n"
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"movq xmm3, qword ptr [%[mb8]+256+esi]\n"
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"movq xmm1, qword ptr [%[mb8]+320+esi]\n"
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"pxor xmm2, xmm2\n"
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"pxor xmm0, xmm0\n"
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// could skip the movq but punpck requires 128-bit alignment
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// for some reason, so two versions would be needed,
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// bloating the function (further)
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"punpcklbw xmm2, xmm3\n"
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"punpcklbw xmm0, xmm1\n"
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// unfortunately I don't think this will matter despite being
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// technically potentially a little faster, but this is
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// equivalent to an add or sub
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"pxor xmm2, xmmword ptr [%[sse2_tables]+%c[C_BIAS]]\n" // xmm2 <-- 8 x (Cb - 128) << 8
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"pxor xmm0, xmmword ptr [%[sse2_tables]+%c[C_BIAS]]\n" // xmm0 <-- 8 x (Cr - 128) << 8
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"movaps xmm1, xmm0\n"
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"movaps xmm3, xmm2\n"
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"pmulhw xmm1, xmmword ptr [%[sse2_tables]+%c[GCr_COEFF]]\n"
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"pmulhw xmm3, xmmword ptr [%[sse2_tables]+%c[GCb_COEFF]]\n"
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"pmulhw xmm0, xmmword ptr [%[sse2_tables]+%c[RCr_COEFF]]\n"
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"pmulhw xmm2, xmmword ptr [%[sse2_tables]+%c[BCb_COEFF]]\n"
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"paddsw xmm1, xmm3\n"
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// store for the next line; looking at the code above
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// compared to the code below, I have to wonder whether
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// this was worth the hassle
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"movaps xmmword ptr [%[yuv2rgb_temp]], xmm0\n"
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"movaps xmmword ptr [%[yuv2rgb_temp]+16], xmm1\n"
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"movaps xmmword ptr [%[yuv2rgb_temp]+32], xmm2\n"
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"jmp ihategcctoo_%=\n"
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".align 16\n"
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"onerow_%=:\n"
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"movaps xmm0, xmmword ptr [%[yuv2rgb_temp]]\n"
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"movaps xmm1, xmmword ptr [%[yuv2rgb_temp]+16]\n"
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"movaps xmm2, xmmword ptr [%[yuv2rgb_temp]+32]\n"
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"ihategcctoo_%=:\n"
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"movaps xmm3, xmm0\n"
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"movaps xmm4, xmm1\n"
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"movaps xmm5, xmm2\n"
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"movaps xmm6, xmmword ptr [%[mb8]+edi]\n"
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"psubusb xmm6, xmmword ptr [%[sse2_tables]+%c[Y_BIAS]]\n"
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"movaps xmm7, xmm6\n"
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"psllw xmm6, 8\n" // xmm6 <- Y << 8 for pixels 0,2,4,6,8,10,12,14
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"pand xmm7, xmmword ptr [%[sse2_tables]+%c[Y_MASK]]\n" // xmm7 <- Y << 8 for pixels 1,3,5,7,9,11,13,15
|
||||
|
||||
"pmulhuw xmm6, xmmword ptr [%[sse2_tables]+%c[Y_COEFF]]\n"
|
||||
"pmulhuw xmm7, xmmword ptr [%[sse2_tables]+%c[Y_COEFF]]\n"
|
||||
|
||||
"paddsw xmm0, xmm6\n"
|
||||
"paddsw xmm3, xmm7\n"
|
||||
"paddsw xmm1, xmm6\n"
|
||||
"paddsw xmm4, xmm7\n"
|
||||
"paddsw xmm2, xmm6\n"
|
||||
"paddsw xmm5, xmm7\n"
|
||||
|
||||
// 0x80; a constant is probably so much better
|
||||
"pcmpeqb xmm7, xmm7\n"
|
||||
"psllw xmm7, 15\n"
|
||||
"psrlw xmm7, 8\n"
|
||||
"packuswb xmm7, xmm7\n"
|
||||
|
||||
// round
|
||||
"movaps xmm6, xmmword ptr [%[sse2_tables]+%c[ROUND_1BIT]]\n"
|
||||
"paddw xmm0, xmm6\n"
|
||||
"paddw xmm1, xmm6\n"
|
||||
"paddw xmm2, xmm6\n"
|
||||
"paddw xmm3, xmm6\n"
|
||||
"paddw xmm4, xmm6\n"
|
||||
"paddw xmm5, xmm6\n"
|
||||
"psraw xmm0, 1\n"
|
||||
"psraw xmm1, 1\n"
|
||||
"psraw xmm2, 1\n"
|
||||
"psraw xmm3, 1\n"
|
||||
"psraw xmm4, 1\n"
|
||||
"psraw xmm5, 1\n"
|
||||
|
||||
// combine even and odd bytes
|
||||
"packuswb xmm0, xmm3\n"
|
||||
"packuswb xmm1, xmm4\n"
|
||||
"packuswb xmm2, xmm5\n"
|
||||
"movhlps xmm3, xmm0\n"
|
||||
"movhlps xmm4, xmm1\n"
|
||||
"movhlps xmm5, xmm2\n"
|
||||
"punpcklbw xmm0, xmm3\n" // Red bytes, back in order
|
||||
"punpcklbw xmm1, xmm4\n" // Green ""
|
||||
"punpcklbw xmm2, xmm5\n" // Blue ""
|
||||
"movaps xmm3, xmm0\n"
|
||||
"movaps xmm4, xmm1\n"
|
||||
"movaps xmm5, xmm2\n"
|
||||
|
||||
// Create RGBA (we could generate A here, but we don't) quads
|
||||
"punpcklbw xmm0, xmm1\n"
|
||||
"punpcklbw xmm2, xmm7\n"
|
||||
"movaps xmm1, xmm0\n"
|
||||
"punpcklwd xmm0, xmm2\n"
|
||||
"punpckhwd xmm1, xmm2\n"
|
||||
|
||||
"punpckhbw xmm3, xmm4\n"
|
||||
"punpckhbw xmm5, xmm7\n"
|
||||
"movaps xmm4, xmm3\n"
|
||||
"punpcklwd xmm3, xmm5\n"
|
||||
"punpckhwd xmm4, xmm5\n"
|
||||
|
||||
// at last
|
||||
"movaps xmmword ptr [%[rgb32]+edi*4+0], xmm0\n"
|
||||
"movaps xmmword ptr [%[rgb32]+edi*4+16], xmm1\n"
|
||||
"movaps xmmword ptr [%[rgb32]+edi*4+32], xmm3\n"
|
||||
"movaps xmmword ptr [%[rgb32]+edi*4+48], xmm4\n"
|
||||
|
||||
"add edi, 16\n"
|
||||
|
||||
// run twice the onerow <=> edi = 16 or 48 or 80 etc... <=> check bit 5
|
||||
"test edi, 16\n"
|
||||
"jnz onerow_%=\n"
|
||||
|
||||
"add esi, 8\n"
|
||||
"cmp esi, 64\n"
|
||||
"jne tworows_%=\n"
|
||||
".att_syntax\n"
|
||||
:
|
||||
:[C_BIAS]"i"(C_BIAS), [Y_BIAS]"i"(Y_BIAS), [Y_MASK]"i"(Y_MASK),
|
||||
[ROUND_1BIT]"i"(ROUND_1BIT), [Y_COEFF]"i"(Y_COEFF), [GCr_COEFF]"i"(GCr_COEFF),
|
||||
[GCb_COEFF]"i"(GCb_COEFF), [RCr_COEFF]"i"(RCr_COEFF), [BCb_COEFF]"i"(BCb_COEFF),
|
||||
// Use ecx and edx as base pointers, to allow for Mod/RM form on memOps.
|
||||
// This saves 2-3 bytes per instruction where these are used. :)
|
||||
[yuv2rgb_temp]"c"(yuv2rgb_temp), [sse2_tables]"d"(sse2_tableoffset),
|
||||
[mb8]"r"(mb8), [rgb32]"r"(rgb32)
|
||||
: "esi", "edi", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "memory"
|
||||
);
|
||||
#else
|
||||
# error Unsupported compiler
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/* PCSX2 - PS2 Emulator for PCs
|
||||
* Copyright (C) 2002-2010 PCSX2 Dev Team
|
||||
* Copyright (C) 2002-2016 PCSX2 Dev Team
|
||||
*
|
||||
* PCSX2 is free software: you can redistribute it and/or modify it under the terms
|
||||
* of the GNU Lesser General Public License as published by the Free Software Found-
|
||||
|
|
@ -16,9 +16,6 @@
|
|||
#pragma once
|
||||
|
||||
extern void yuv2rgb_reference();
|
||||
#ifdef _M_X86_32
|
||||
|
||||
#define yuv2rgb yuv2rgb_sse2
|
||||
extern void yuv2rgb_sse2();
|
||||
#else
|
||||
#define yuv2rgb yuv2rgb_reference
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue